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* [PATCH v2] drm/xe: Add wa_14028434957 to Graphics Version 35.11
@ 2026-10-09  7:52 Varun Gupta
  2026-10-09  8:02 ` sashiko-bot
                   ` (4 more replies)
  0 siblings, 5 replies; 9+ messages in thread
From: Varun Gupta @ 2026-10-09  7:52 UTC (permalink / raw)
  To: intel-xe; +Cc: matthew.d.roper, tejas.upadhyay, rodrigo.vivi

Prevent the SNIB AER latch from swallowing back-to-back uncorrectable
non-fatal errors.

Firmware bypasses the faulty AER path by routing these errors directly
via MSI. This patch intercepts the MSI and reuses the existing GFSP
error containment logic.

Because GFSP mailbox queries can sleep, handling is deferred to a
workqueue (nonfatal_msi_work) to ensure hardirq safety. If a reset is
required, the device is wedged (a stopgap until VR driver quiescing
support allows for an actual Secondary Bus Reset).

v2:
 - Return 'int' from xe_hw_error_init() to propagate failures.(Sashiko)
 - Use devm_add_action_or_reset() for teardown to prevent MMIO faults
   during PCI unbind.(Sashiko)
 - Add xe_pm_runtime guard in the worker thread.(Sashiko)

Assisted-by: LLM
Signed-off-by: Varun Gupta <varun.gupta@intel.com>
---
 drivers/gpu/drm/xe/xe_device_wa_oob.rules |  2 +
 drivers/gpu/drm/xe/xe_drm_ras_types.h     |  5 +++
 drivers/gpu/drm/xe/xe_hw_error.c          | 52 ++++++++++++++++++++++-
 drivers/gpu/drm/xe/xe_hw_error.h          |  2 +-
 drivers/gpu/drm/xe/xe_irq.c               |  4 +-
 5 files changed, 61 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_device_wa_oob.rules b/drivers/gpu/drm/xe/xe_device_wa_oob.rules
index d8dc41851425..29a7d96a5666 100644
--- a/drivers/gpu/drm/xe/xe_device_wa_oob.rules
+++ b/drivers/gpu/drm/xe/xe_device_wa_oob.rules
@@ -7,3 +7,5 @@
 14026633728	PLATFORM(CRESCENTISLAND)
 14026746987	PLATFORM(CRESCENTISLAND)
 14026779378	PLATFORM(CRESCENTISLAND)
+14028434957	PLATFORM(CRESCENTISLAND)
+
diff --git a/drivers/gpu/drm/xe/xe_drm_ras_types.h b/drivers/gpu/drm/xe/xe_drm_ras_types.h
index 0be218ba2db7..7a35390a9ffd 100644
--- a/drivers/gpu/drm/xe/xe_drm_ras_types.h
+++ b/drivers/gpu/drm/xe/xe_drm_ras_types.h
@@ -9,6 +9,8 @@
 #include <linux/atomic.h>
 #include <drm/xe_drm.h>
 
+#include <linux/workqueue.h>
+
 struct drm_ras_node;
 
 /* Error categories reported by hardware */
@@ -46,6 +48,9 @@ struct xe_drm_ras {
 
 	/** @disable_vram_page_offline: cached configfs policy, immutable after init */
 	bool disable_vram_page_offline;
+
+	/** @nonfatal_msi_work: Worker to process uncorrectable non-fatal errors */
+	struct work_struct nonfatal_msi_work;
 };
 
 #endif
diff --git a/drivers/gpu/drm/xe/xe_hw_error.c b/drivers/gpu/drm/xe/xe_hw_error.c
index 5f2abc9485ff..bde707a3fb64 100644
--- a/drivers/gpu/drm/xe/xe_hw_error.c
+++ b/drivers/gpu/drm/xe/xe_hw_error.c
@@ -5,6 +5,8 @@
 
 #include <linux/bitmap.h>
 
+#include <generated/xe_device_wa_oob.h>
+
 #include "regs/xe_gsc_regs.h"
 #include "regs/xe_hw_error_regs.h"
 #include "regs/xe_irq_regs.h"
@@ -14,7 +16,10 @@
 #include "xe_drm_ras.h"
 #include "xe_hw_error.h"
 #include "xe_mmio.h"
+#include "xe_pm.h"
+#include "xe_ras.h"
 #include "xe_survivability_mode.h"
+#include "xe_wa.h"
 
 #define GT_HW_ERROR_MAX_ERR_BITS		16
 #define HEC_UNCORR_FW_ERR_BITS			4
@@ -173,6 +178,29 @@ static void csc_hw_error_work(struct work_struct *work)
 	xe_survivability_mode_runtime_enable(xe);
 }
 
+static void nonfatal_msi_work(struct work_struct *work)
+{
+	struct xe_drm_ras *ras = container_of(work, typeof(*ras), nonfatal_msi_work);
+	struct xe_device *xe = container_of(ras, typeof(*xe), ras);
+
+	guard(xe_pm_runtime)(xe);
+	enum xe_ras_recovery_action action = xe_ras_process_errors(xe);
+
+	/*
+	 * TODO: Request an SBR instead of wedging, once VR driver
+	 * quiescing support is in place.
+	 */
+	if (action != XE_RAS_RECOVERY_ACTION_RECOVERED)
+		xe_device_declare_wedged(xe);
+}
+
+static void hw_error_fini(void *arg)
+{
+	struct xe_device *xe = arg;
+
+	cancel_work_sync(&xe->ras.nonfatal_msi_work);
+}
+
 static void csc_hw_error_handler(struct xe_tile *tile, const enum hardware_error hw_err)
 {
 	const enum drm_xe_ras_error_severity severity = hw_err_to_severity(hw_err);
@@ -436,6 +464,15 @@ static void hw_error_source_handler(struct xe_tile *tile, const enum hardware_er
 	 * here for those platforms.
 	 */
 	if (xe->info.has_sysctrl) {
+		/*
+		 * Defer non-fatal MSI handling to process context because the GFSP
+		 * query can sleep.
+		 */
+		if (hw_err == HARDWARE_ERROR_NONFATAL && XE_DEVICE_WA(xe, 14028434957)) {
+			schedule_work(&xe->ras.nonfatal_msi_work);
+			return;
+		}
+
 		drm_err_ratelimited(&xe->drm, HW_ERR "Invalid error routing\n");
 		return;
 	}
@@ -541,15 +578,26 @@ static void process_hw_errors(struct xe_device *xe)
  *
  * Initialize and check for errors that occurred during boot
  * prior to driver load
+ *
+ * Return: 0 on success, negative error code on failure.
  */
-void xe_hw_error_init(struct xe_device *xe)
+int xe_hw_error_init(struct xe_device *xe)
 {
 	struct xe_tile *tile = xe_device_get_root_tile(xe);
+	int err;
+
+	INIT_WORK(&xe->ras.nonfatal_msi_work, nonfatal_msi_work);
+
+	err = devm_add_action_or_reset(xe->drm.dev, hw_error_fini, xe);
+	if (err)
+		return err;
 
 	if (!IS_DGFX(xe) || IS_SRIOV_VF(xe))
-		return;
+		return 0;
 
 	INIT_WORK(&tile->csc_hw_error_work, csc_hw_error_work);
 
 	process_hw_errors(xe);
+
+	return 0;
 }
diff --git a/drivers/gpu/drm/xe/xe_hw_error.h b/drivers/gpu/drm/xe/xe_hw_error.h
index 5e3a11424108..a9af4c947d77 100644
--- a/drivers/gpu/drm/xe/xe_hw_error.h
+++ b/drivers/gpu/drm/xe/xe_hw_error.h
@@ -11,5 +11,5 @@ struct xe_tile;
 struct xe_device;
 
 void xe_hw_error_irq_handler(struct xe_tile *tile, const u32 master_ctl);
-void xe_hw_error_init(struct xe_device *xe);
+int xe_hw_error_init(struct xe_device *xe);
 #endif
diff --git a/drivers/gpu/drm/xe/xe_irq.c b/drivers/gpu/drm/xe/xe_irq.c
index 9e49e2241da4..5ea50d203db1 100644
--- a/drivers/gpu/drm/xe/xe_irq.c
+++ b/drivers/gpu/drm/xe/xe_irq.c
@@ -811,7 +811,9 @@ int xe_irq_install(struct xe_device *xe)
 	int nvec = 1;
 	int err;
 
-	xe_hw_error_init(xe);
+	err = xe_hw_error_init(xe);
+	if (err)
+		return err;
 
 	xe_irq_reset(xe);
 
-- 
2.43.0


^ permalink raw reply related	[flat|nested] 9+ messages in thread
end of thread, other threads:[~2026-10-12  5:28 UTC | newest]

Thread overview: 9+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-10-09  7:52 [PATCH v2] drm/xe: Add wa_14028434957 to Graphics Version 35.11 Varun Gupta
2026-10-09  8:02 ` sashiko-bot
2026-10-09  9:07   ` Gupta, Varun
2026-10-09  8:46 ` ✓ CI.KUnit: success for drm/xe: Add wa_14028434957 to Graphics Version 35.11 (rev2) Patchwork
2026-10-09  9:46 ` ✓ Xe.CI.BAT: " Patchwork
2026-10-09 11:55 ` ✗ Xe.CI.FULL: failure " Patchwork
2026-10-12  5:12 ` [PATCH v2] drm/xe: Add wa_14028434957 to Graphics Version 35.11 Upadhyay, Tejas
2026-10-12  5:15   ` Tauro, Riana
2026-10-12  5:27     ` Gupta, Varun

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