* [PATCH v3 0/2] phy: add support for TH1520 USB PHY @ 2026-10-09 9:04 ` Icenowy Zheng 0 siblings, 0 replies; 14+ messages in thread From: Icenowy Zheng @ 2026-10-09 9:04 UTC (permalink / raw) To: Vinod Koul, Neil Armstrong, Manivannan Sadhasivam, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Philipp Zabel, Wei Fu, Drew Fustini Cc: linux-phy, devicetree, linux-kernel, linux-riscv, Icenowy Zheng, Han Gao, Icenowy Zheng This patchset is splitted from the "Add TH1520 USB support" patchset, with only the PHY binding/driver part. Conor, could you re-check whether your R-b still apply? (Although I think this should be trivial because only reg is added to the required properties list when comparing with v1). Icenowy Zheng (2): dt-bindings: phy: add binding for T-Head TH1520 USB PHY phy: add a driver for T-Head TH1520 USB PHY .../bindings/phy/thead,th1520-usb-phy.yaml | 75 ++++++++ drivers/phy/Kconfig | 1 + drivers/phy/Makefile | 1 + drivers/phy/thead/Kconfig | 12 ++ drivers/phy/thead/Makefile | 2 + drivers/phy/thead/phy-th1520-usb.c | 181 ++++++++++++++++++ 6 files changed, 272 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/thead,th1520-usb-phy.yaml create mode 100644 drivers/phy/thead/Kconfig create mode 100644 drivers/phy/thead/Makefile create mode 100644 drivers/phy/thead/phy-th1520-usb.c -- 2.55.0 ^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v3 0/2] phy: add support for TH1520 USB PHY @ 2026-10-09 9:04 ` Icenowy Zheng 0 siblings, 0 replies; 14+ messages in thread From: Icenowy Zheng @ 2026-10-09 9:04 UTC (permalink / raw) To: Vinod Koul, Neil Armstrong, Manivannan Sadhasivam, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Philipp Zabel, Wei Fu, Drew Fustini Cc: devicetree, linux-kernel, Icenowy Zheng, Han Gao, linux-phy, linux-riscv This patchset is splitted from the "Add TH1520 USB support" patchset, with only the PHY binding/driver part. Conor, could you re-check whether your R-b still apply? (Although I think this should be trivial because only reg is added to the required properties list when comparing with v1). Icenowy Zheng (2): dt-bindings: phy: add binding for T-Head TH1520 USB PHY phy: add a driver for T-Head TH1520 USB PHY .../bindings/phy/thead,th1520-usb-phy.yaml | 75 ++++++++ drivers/phy/Kconfig | 1 + drivers/phy/Makefile | 1 + drivers/phy/thead/Kconfig | 12 ++ drivers/phy/thead/Makefile | 2 + drivers/phy/thead/phy-th1520-usb.c | 181 ++++++++++++++++++ 6 files changed, 272 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/thead,th1520-usb-phy.yaml create mode 100644 drivers/phy/thead/Kconfig create mode 100644 drivers/phy/thead/Makefile create mode 100644 drivers/phy/thead/phy-th1520-usb.c -- 2.55.0 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v3 0/2] phy: add support for TH1520 USB PHY @ 2026-10-09 9:04 ` Icenowy Zheng 0 siblings, 0 replies; 14+ messages in thread From: Icenowy Zheng @ 2026-10-09 9:04 UTC (permalink / raw) To: Vinod Koul, Neil Armstrong, Manivannan Sadhasivam, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Philipp Zabel, Wei Fu, Drew Fustini Cc: linux-phy, devicetree, linux-kernel, linux-riscv, Icenowy Zheng, Han Gao, Icenowy Zheng This patchset is splitted from the "Add TH1520 USB support" patchset, with only the PHY binding/driver part. Conor, could you re-check whether your R-b still apply? (Although I think this should be trivial because only reg is added to the required properties list when comparing with v1). Icenowy Zheng (2): dt-bindings: phy: add binding for T-Head TH1520 USB PHY phy: add a driver for T-Head TH1520 USB PHY .../bindings/phy/thead,th1520-usb-phy.yaml | 75 ++++++++ drivers/phy/Kconfig | 1 + drivers/phy/Makefile | 1 + drivers/phy/thead/Kconfig | 12 ++ drivers/phy/thead/Makefile | 2 + drivers/phy/thead/phy-th1520-usb.c | 181 ++++++++++++++++++ 6 files changed, 272 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/thead,th1520-usb-phy.yaml create mode 100644 drivers/phy/thead/Kconfig create mode 100644 drivers/phy/thead/Makefile create mode 100644 drivers/phy/thead/phy-th1520-usb.c -- 2.55.0 -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy ^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v3 1/2] dt-bindings: phy: add binding for T-Head TH1520 USB PHY 2026-10-09 9:04 ` Icenowy Zheng (?) @ 2026-10-09 9:04 ` Icenowy Zheng -1 siblings, 0 replies; 14+ messages in thread From: Icenowy Zheng @ 2026-10-09 9:04 UTC (permalink / raw) To: Vinod Koul, Neil Armstrong, Manivannan Sadhasivam, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Philipp Zabel, Wei Fu, Drew Fustini Cc: linux-phy, devicetree, linux-kernel, linux-riscv, Icenowy Zheng, Han Gao, Icenowy Zheng The TH1520 SoC features a Synopsys USB 3.0 FemtoPHY with some custom glue logic configuring PHY parameters. Add a binding for it. Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn> --- Changes in v3: - Re-add avdd33-usb3-supply to the required properties list. - Add reg to the required properties list, as this is a MMIO peripheral. Changes in v2: - Lifted avdd33-usb3-supply from required properties list. Because of this the R-b from Conor isn't added yet for reconfirmation. (The related regulator isn't yet controllable because no driver is available.) .../bindings/phy/thead,th1520-usb-phy.yaml | 75 +++++++++++++++++++ 1 file changed, 75 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/thead,th1520-usb-phy.yaml diff --git a/Documentation/devicetree/bindings/phy/thead,th1520-usb-phy.yaml b/Documentation/devicetree/bindings/phy/thead,th1520-usb-phy.yaml new file mode 100644 index 0000000000000..0d2494a71b2bd --- /dev/null +++ b/Documentation/devicetree/bindings/phy/thead,th1520-usb-phy.yaml @@ -0,0 +1,75 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/thead,th1520-usb-phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: T-Head TH1520 USB PHY + +description: | + The T-HEAD TH1520 USB PHY is a Synopsys USB 3.0 FemtoPHY glued with some + custom logic to configure PHY parameters. + +maintainers: + - Icenowy Zheng <zhengxingda@iscas.ac.cn> + - Wei Fu <wefu@redhat.com> + - Drew Fustini <dfustini@tenstorrent.com> + +properties: + compatible: + const: thead,th1520-usb-phy + + reg: + maxItems: 1 + + "#phy-cells": + const: 0 + + clocks: + items: + - description: PHY bus clock + - description: PHY reference clock + + clock-names: + items: + - const: bus + - const: ref + + resets: + items: + - description: PHY bus reset + - description: PHY reset + + reset-names: + items: + - const: bus + - const: phy + + avdd33-usb3-supply: + description: | + 3.3V power supply for the PHY, named AVDD33_USB3 in the SoC pin list. + +required: + - compatible + - reg + - "#phy-cells" + - clocks + - clock-names + - resets + - reset-names + - avdd33-usb3-supply + +additionalProperties: false + +examples: + - | + phy@ec030000 { + compatible = "thead,th1520-usb-phy"; + reg = <0xec030000 0x10000>; + #phy-cells = <0>; + clocks = <&clk_misc 1>, <&clk_misc 3>; + clock-names = "bus", "ref"; + resets = <&rst_misc 6>, <&rst_misc 7>; + reset-names = "bus", "phy"; + avdd33-usb3-supply = <&avdd33_usb3>; + }; -- 2.55.0 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v3 1/2] dt-bindings: phy: add binding for T-Head TH1520 USB PHY @ 2026-10-09 9:04 ` Icenowy Zheng 0 siblings, 0 replies; 14+ messages in thread From: Icenowy Zheng @ 2026-10-09 9:04 UTC (permalink / raw) To: Vinod Koul, Neil Armstrong, Manivannan Sadhasivam, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Philipp Zabel, Wei Fu, Drew Fustini Cc: devicetree, linux-kernel, Icenowy Zheng, Han Gao, linux-phy, linux-riscv The TH1520 SoC features a Synopsys USB 3.0 FemtoPHY with some custom glue logic configuring PHY parameters. Add a binding for it. Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn> --- Changes in v3: - Re-add avdd33-usb3-supply to the required properties list. - Add reg to the required properties list, as this is a MMIO peripheral. Changes in v2: - Lifted avdd33-usb3-supply from required properties list. Because of this the R-b from Conor isn't added yet for reconfirmation. (The related regulator isn't yet controllable because no driver is available.) .../bindings/phy/thead,th1520-usb-phy.yaml | 75 +++++++++++++++++++ 1 file changed, 75 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/thead,th1520-usb-phy.yaml diff --git a/Documentation/devicetree/bindings/phy/thead,th1520-usb-phy.yaml b/Documentation/devicetree/bindings/phy/thead,th1520-usb-phy.yaml new file mode 100644 index 0000000000000..0d2494a71b2bd --- /dev/null +++ b/Documentation/devicetree/bindings/phy/thead,th1520-usb-phy.yaml @@ -0,0 +1,75 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/thead,th1520-usb-phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: T-Head TH1520 USB PHY + +description: | + The T-HEAD TH1520 USB PHY is a Synopsys USB 3.0 FemtoPHY glued with some + custom logic to configure PHY parameters. + +maintainers: + - Icenowy Zheng <zhengxingda@iscas.ac.cn> + - Wei Fu <wefu@redhat.com> + - Drew Fustini <dfustini@tenstorrent.com> + +properties: + compatible: + const: thead,th1520-usb-phy + + reg: + maxItems: 1 + + "#phy-cells": + const: 0 + + clocks: + items: + - description: PHY bus clock + - description: PHY reference clock + + clock-names: + items: + - const: bus + - const: ref + + resets: + items: + - description: PHY bus reset + - description: PHY reset + + reset-names: + items: + - const: bus + - const: phy + + avdd33-usb3-supply: + description: | + 3.3V power supply for the PHY, named AVDD33_USB3 in the SoC pin list. + +required: + - compatible + - reg + - "#phy-cells" + - clocks + - clock-names + - resets + - reset-names + - avdd33-usb3-supply + +additionalProperties: false + +examples: + - | + phy@ec030000 { + compatible = "thead,th1520-usb-phy"; + reg = <0xec030000 0x10000>; + #phy-cells = <0>; + clocks = <&clk_misc 1>, <&clk_misc 3>; + clock-names = "bus", "ref"; + resets = <&rst_misc 6>, <&rst_misc 7>; + reset-names = "bus", "phy"; + avdd33-usb3-supply = <&avdd33_usb3>; + }; -- 2.55.0 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v3 1/2] dt-bindings: phy: add binding for T-Head TH1520 USB PHY @ 2026-10-09 9:04 ` Icenowy Zheng 0 siblings, 0 replies; 14+ messages in thread From: Icenowy Zheng @ 2026-10-09 9:04 UTC (permalink / raw) To: Vinod Koul, Neil Armstrong, Manivannan Sadhasivam, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Philipp Zabel, Wei Fu, Drew Fustini Cc: linux-phy, devicetree, linux-kernel, linux-riscv, Icenowy Zheng, Han Gao, Icenowy Zheng The TH1520 SoC features a Synopsys USB 3.0 FemtoPHY with some custom glue logic configuring PHY parameters. Add a binding for it. Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn> --- Changes in v3: - Re-add avdd33-usb3-supply to the required properties list. - Add reg to the required properties list, as this is a MMIO peripheral. Changes in v2: - Lifted avdd33-usb3-supply from required properties list. Because of this the R-b from Conor isn't added yet for reconfirmation. (The related regulator isn't yet controllable because no driver is available.) .../bindings/phy/thead,th1520-usb-phy.yaml | 75 +++++++++++++++++++ 1 file changed, 75 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/thead,th1520-usb-phy.yaml diff --git a/Documentation/devicetree/bindings/phy/thead,th1520-usb-phy.yaml b/Documentation/devicetree/bindings/phy/thead,th1520-usb-phy.yaml new file mode 100644 index 0000000000000..0d2494a71b2bd --- /dev/null +++ b/Documentation/devicetree/bindings/phy/thead,th1520-usb-phy.yaml @@ -0,0 +1,75 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/thead,th1520-usb-phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: T-Head TH1520 USB PHY + +description: | + The T-HEAD TH1520 USB PHY is a Synopsys USB 3.0 FemtoPHY glued with some + custom logic to configure PHY parameters. + +maintainers: + - Icenowy Zheng <zhengxingda@iscas.ac.cn> + - Wei Fu <wefu@redhat.com> + - Drew Fustini <dfustini@tenstorrent.com> + +properties: + compatible: + const: thead,th1520-usb-phy + + reg: + maxItems: 1 + + "#phy-cells": + const: 0 + + clocks: + items: + - description: PHY bus clock + - description: PHY reference clock + + clock-names: + items: + - const: bus + - const: ref + + resets: + items: + - description: PHY bus reset + - description: PHY reset + + reset-names: + items: + - const: bus + - const: phy + + avdd33-usb3-supply: + description: | + 3.3V power supply for the PHY, named AVDD33_USB3 in the SoC pin list. + +required: + - compatible + - reg + - "#phy-cells" + - clocks + - clock-names + - resets + - reset-names + - avdd33-usb3-supply + +additionalProperties: false + +examples: + - | + phy@ec030000 { + compatible = "thead,th1520-usb-phy"; + reg = <0xec030000 0x10000>; + #phy-cells = <0>; + clocks = <&clk_misc 1>, <&clk_misc 3>; + clock-names = "bus", "ref"; + resets = <&rst_misc 6>, <&rst_misc 7>; + reset-names = "bus", "phy"; + avdd33-usb3-supply = <&avdd33_usb3>; + }; -- 2.55.0 -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy ^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [PATCH v3 1/2] dt-bindings: phy: add binding for T-Head TH1520 USB PHY 2026-10-09 9:04 ` Icenowy Zheng (?) @ 2026-10-09 14:44 ` Conor Dooley -1 siblings, 0 replies; 14+ messages in thread From: Conor Dooley @ 2026-10-09 14:44 UTC (permalink / raw) To: Icenowy Zheng Cc: Vinod Koul, Neil Armstrong, Manivannan Sadhasivam, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Philipp Zabel, Wei Fu, Drew Fustini, linux-phy, devicetree, linux-kernel, linux-riscv, Icenowy Zheng, Han Gao [-- Attachment #1.1: Type: text/plain, Size: 75 bytes --] Acked-by: Conor Dooley <conor.dooley@microchip.com> pw-bot: not-applicable [-- Attachment #1.2: signature.asc --] [-- Type: application/pgp-signature, Size: 228 bytes --] [-- Attachment #2: Type: text/plain, Size: 112 bytes --] -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v3 1/2] dt-bindings: phy: add binding for T-Head TH1520 USB PHY @ 2026-10-09 14:44 ` Conor Dooley 0 siblings, 0 replies; 14+ messages in thread From: Conor Dooley @ 2026-10-09 14:44 UTC (permalink / raw) To: Icenowy Zheng Cc: Vinod Koul, Neil Armstrong, Manivannan Sadhasivam, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Philipp Zabel, Wei Fu, Drew Fustini, linux-phy, devicetree, linux-kernel, linux-riscv, Icenowy Zheng, Han Gao [-- Attachment #1: Type: text/plain, Size: 75 bytes --] Acked-by: Conor Dooley <conor.dooley@microchip.com> pw-bot: not-applicable [-- Attachment #2: signature.asc --] [-- Type: application/pgp-signature, Size: 228 bytes --] ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v3 1/2] dt-bindings: phy: add binding for T-Head TH1520 USB PHY @ 2026-10-09 14:44 ` Conor Dooley 0 siblings, 0 replies; 14+ messages in thread From: Conor Dooley @ 2026-10-09 14:44 UTC (permalink / raw) To: Icenowy Zheng Cc: Neil Armstrong, Conor Dooley, Rob Herring, Manivannan Sadhasivam, linux-kernel, Vinod Koul, Philipp Zabel, Han Gao, linux-phy, Krzysztof Kozlowski, Drew Fustini, linux-riscv, devicetree, Wei Fu [-- Attachment #1.1: Type: text/plain, Size: 75 bytes --] Acked-by: Conor Dooley <conor.dooley@microchip.com> pw-bot: not-applicable [-- Attachment #1.2: signature.asc --] [-- Type: application/pgp-signature, Size: 228 bytes --] [-- Attachment #2: Type: text/plain, Size: 161 bytes --] _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v3 2/2] phy: add a driver for T-Head TH1520 USB PHY 2026-10-09 9:04 ` Icenowy Zheng (?) @ 2026-10-09 9:04 ` Icenowy Zheng -1 siblings, 0 replies; 14+ messages in thread From: Icenowy Zheng @ 2026-10-09 9:04 UTC (permalink / raw) To: Vinod Koul, Neil Armstrong, Manivannan Sadhasivam, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Philipp Zabel, Wei Fu, Drew Fustini Cc: linux-phy, devicetree, linux-kernel, linux-riscv, Icenowy Zheng, Han Gao, Icenowy Zheng The USB PHY on T-Head TH1520 SoC is a Synopsys USB 3.0 FemtoPHY, with some PHY parameters exported as another system controller along with it. A few PHY parameters have unusable defaults. Add a driver that programs them before releasing the PHY from reset in addition to clock/reset/regulator management. Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn> --- Changes in v3: - Use fsleep() to replace udelay(), and add proper inclusion of linux/delay.h for this function. (fsleep() suggested by Drew and inclusion suggested by Sashiko) - Adapt Drew's suggestion on the wording of the commit message's 2nd paragraph. Changes in v2: - Removed unreferenced register names. - Changed the behavior to leaving bus clock on instead of binding it to the regmap. - Removed early return for reset deassert failure in phy exit callback. - Tweaked the Kconfig item (removed default value and added "select REGMAP_MMIO). drivers/phy/Kconfig | 1 + drivers/phy/Makefile | 1 + drivers/phy/thead/Kconfig | 12 ++ drivers/phy/thead/Makefile | 2 + drivers/phy/thead/phy-th1520-usb.c | 181 +++++++++++++++++++++++++++++ 5 files changed, 197 insertions(+) create mode 100644 drivers/phy/thead/Kconfig create mode 100644 drivers/phy/thead/Makefile create mode 100644 drivers/phy/thead/phy-th1520-usb.c diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig index 19f3b7d12b7d4..a05019020ee09 100644 --- a/drivers/phy/Kconfig +++ b/drivers/phy/Kconfig @@ -200,6 +200,7 @@ source "drivers/phy/st/Kconfig" source "drivers/phy/starfive/Kconfig" source "drivers/phy/sunplus/Kconfig" source "drivers/phy/tegra/Kconfig" +source "drivers/phy/thead/Kconfig" source "drivers/phy/ti/Kconfig" source "drivers/phy/xilinx/Kconfig" diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile index d7aa516bcc49e..0ac5b21477619 100644 --- a/drivers/phy/Makefile +++ b/drivers/phy/Makefile @@ -52,5 +52,6 @@ obj-$(CONFIG_GENERIC_PHY) += allwinner/ \ starfive/ \ sunplus/ \ tegra/ \ + thead/ \ ti/ \ xilinx/ diff --git a/drivers/phy/thead/Kconfig b/drivers/phy/thead/Kconfig new file mode 100644 index 0000000000000..ba0ceac54c1b0 --- /dev/null +++ b/drivers/phy/thead/Kconfig @@ -0,0 +1,12 @@ +# SPDX-License-Identifier: GPL-2.0-only +config PHY_TH1520_USB + tristate "USB PHY driver for T-Head TH1520 SoC" + depends on ARCH_THEAD || COMPILE_TEST + depends on COMMON_CLK + depends on HAS_IOMEM + depends on OF + depends on RESET_CONTROLLER + select GENERIC_PHY + select REGMAP_MMIO + help + Enable support for the USB PHY on the T-Head TH1520 SoC. diff --git a/drivers/phy/thead/Makefile b/drivers/phy/thead/Makefile new file mode 100644 index 0000000000000..5b459bc7004bd --- /dev/null +++ b/drivers/phy/thead/Makefile @@ -0,0 +1,2 @@ +# SPDX-License-Identifier: GPL-2.0-only +obj-$(CONFIG_PHY_TH1520_USB) += phy-th1520-usb.o diff --git a/drivers/phy/thead/phy-th1520-usb.c b/drivers/phy/thead/phy-th1520-usb.c new file mode 100644 index 0000000000000..6cb0e51401374 --- /dev/null +++ b/drivers/phy/thead/phy-th1520-usb.c @@ -0,0 +1,181 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2026 Institute of Software, Chinese Academy of Sciences (ISCAS) + * + * Authors: + * Icenowy Zheng <zhengxingda@iscas.ac.cn> + */ + +#include <linux/clk.h> +#include <linux/delay.h> +#include <linux/module.h> +#include <linux/of.h> +#include <linux/phy/phy.h> +#include <linux/platform_device.h> +#include <linux/regmap.h> +#include <linux/regulator/consumer.h> +#include <linux/reset.h> + +#define USB_SYSCON_OFFSET 0xf000 + +/* All the below registers are in the USB syscon region */ +#define USB_SSP_EN 0x34 +#define USB_SSP_EN_REF_SSP_EN BIT(0) + +#define USB_SYS 0x3c +#define USB_SYS_COMMONONN BIT(0) + +/* The last register according to the manual */ +#define USB_TEST_REG3 0x5c + +struct th1520_usb_phy { + struct platform_device *pdev; + struct phy *phy; + struct regmap *regmap; + struct clk *ref_clk; + struct reset_control *phy_reset; +}; + +static int th1520_usb_phy_init(struct phy *phy) +{ + struct th1520_usb_phy *th1520_phy = phy_get_drvdata(phy); + int ret; + + ret = clk_prepare_enable(th1520_phy->ref_clk); + if (ret) + return ret; + + ret = reset_control_assert(th1520_phy->phy_reset); + if (ret) + goto err_disable_clk; + + /* + * Do some initial PHY setup: + * - Set COMMONONN to allow the PHY to automatically power down. + * - Set REF_SSP_EN to enable feeding reference clock to SuperSpeed + * PHY clock PLL. + */ + regmap_set_bits(th1520_phy->regmap, USB_SYS, USB_SYS_COMMONONN); + regmap_set_bits(th1520_phy->regmap, USB_SSP_EN, USB_SSP_EN_REF_SSP_EN); + + ret = reset_control_deassert(th1520_phy->phy_reset); + if (ret) + goto err_disable_clk; + + fsleep(10); + + return 0; + +err_disable_clk: + clk_disable_unprepare(th1520_phy->ref_clk); + return ret; +} + +static int th1520_usb_phy_exit(struct phy *phy) +{ + struct th1520_usb_phy *th1520_phy = phy_get_drvdata(phy); + int ret; + + ret = reset_control_assert(th1520_phy->phy_reset); + clk_disable_unprepare(th1520_phy->ref_clk); + + return ret; +} + +static const struct phy_ops th1520_usb_phy_ops = { + .init = th1520_usb_phy_init, + .exit = th1520_usb_phy_exit, + .owner = THIS_MODULE, +}; + +static const struct regmap_config phy_regmap_config = { + .reg_bits = 32, + .val_bits = 32, + .reg_stride = 4, + .max_register = USB_TEST_REG3, +}; + +static int th1520_usb_phy_probe(struct platform_device *pdev) +{ + struct phy_provider *phy_provider; + struct device *dev = &pdev->dev; + struct th1520_usb_phy *th1520_phy; + struct reset_control *bus_reset; + struct clk *bus_clk; + void __iomem *base; + int ret; + + th1520_phy = devm_kzalloc(dev, sizeof(*th1520_phy), GFP_KERNEL); + if (!th1520_phy) + return -ENOMEM; + + th1520_phy->pdev = pdev; + + base = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(base)) + return PTR_ERR(base); + + th1520_phy->ref_clk = devm_clk_get(dev, "ref"); + if (IS_ERR(th1520_phy->ref_clk)) + return PTR_ERR(th1520_phy->ref_clk); + + /* Enable the bus clock and leave it that way */ + bus_clk = devm_clk_get_enabled(dev, "bus"); + if (IS_ERR(bus_clk)) + return PTR_ERR(bus_clk); + + /* De-assert the bus reset and leave it that way */ + bus_reset = devm_reset_control_get_exclusive_deasserted(dev, "bus"); + if (IS_ERR(bus_reset)) + return PTR_ERR(bus_reset); + + th1520_phy->phy_reset = devm_reset_control_get_exclusive(dev, "phy"); + if (IS_ERR(th1520_phy->phy_reset)) + return PTR_ERR(th1520_phy->phy_reset); + + /* + * Schematics of several boards (Lichee Module 4A/Milk-V Meles) + * describe this power rail as always-on. + */ + ret = devm_regulator_get_enable(dev, "avdd33-usb3"); + if (ret) + return ret; + + th1520_phy->regmap = devm_regmap_init_mmio(dev, + base + USB_SYSCON_OFFSET, + &phy_regmap_config); + if (IS_ERR(th1520_phy->regmap)) + return dev_err_probe(dev, PTR_ERR(th1520_phy->regmap), + "Failed to init regmap\n"); + + th1520_phy->phy = devm_phy_create(dev, dev->of_node, &th1520_usb_phy_ops); + if (IS_ERR(th1520_phy->phy)) { + dev_err(dev, "failed to create PHY\n"); + return PTR_ERR(th1520_phy->phy); + } + + phy_set_drvdata(th1520_phy->phy, th1520_phy); + + phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate); + + return PTR_ERR_OR_ZERO(phy_provider); +} + +static const struct of_device_id th1520_usb_phy_of_table[] = { + { .compatible = "thead,th1520-usb-phy" }, + { } +}; +MODULE_DEVICE_TABLE(of, th1520_usb_phy_of_table); + +static struct platform_driver th1520_usb_phy_driver = { + .driver = { + .name = "th1520-usb-phy", + .of_match_table = th1520_usb_phy_of_table, + }, + .probe = th1520_usb_phy_probe, +}; + +module_platform_driver(th1520_usb_phy_driver); + +MODULE_DESCRIPTION("T-Head TH1520 USB PHY driver"); +MODULE_LICENSE("GPL"); -- 2.55.0 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v3 2/2] phy: add a driver for T-Head TH1520 USB PHY @ 2026-10-09 9:04 ` Icenowy Zheng 0 siblings, 0 replies; 14+ messages in thread From: Icenowy Zheng @ 2026-10-09 9:04 UTC (permalink / raw) To: Vinod Koul, Neil Armstrong, Manivannan Sadhasivam, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Philipp Zabel, Wei Fu, Drew Fustini Cc: devicetree, linux-kernel, Icenowy Zheng, Han Gao, linux-phy, linux-riscv The USB PHY on T-Head TH1520 SoC is a Synopsys USB 3.0 FemtoPHY, with some PHY parameters exported as another system controller along with it. A few PHY parameters have unusable defaults. Add a driver that programs them before releasing the PHY from reset in addition to clock/reset/regulator management. Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn> --- Changes in v3: - Use fsleep() to replace udelay(), and add proper inclusion of linux/delay.h for this function. (fsleep() suggested by Drew and inclusion suggested by Sashiko) - Adapt Drew's suggestion on the wording of the commit message's 2nd paragraph. Changes in v2: - Removed unreferenced register names. - Changed the behavior to leaving bus clock on instead of binding it to the regmap. - Removed early return for reset deassert failure in phy exit callback. - Tweaked the Kconfig item (removed default value and added "select REGMAP_MMIO). drivers/phy/Kconfig | 1 + drivers/phy/Makefile | 1 + drivers/phy/thead/Kconfig | 12 ++ drivers/phy/thead/Makefile | 2 + drivers/phy/thead/phy-th1520-usb.c | 181 +++++++++++++++++++++++++++++ 5 files changed, 197 insertions(+) create mode 100644 drivers/phy/thead/Kconfig create mode 100644 drivers/phy/thead/Makefile create mode 100644 drivers/phy/thead/phy-th1520-usb.c diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig index 19f3b7d12b7d4..a05019020ee09 100644 --- a/drivers/phy/Kconfig +++ b/drivers/phy/Kconfig @@ -200,6 +200,7 @@ source "drivers/phy/st/Kconfig" source "drivers/phy/starfive/Kconfig" source "drivers/phy/sunplus/Kconfig" source "drivers/phy/tegra/Kconfig" +source "drivers/phy/thead/Kconfig" source "drivers/phy/ti/Kconfig" source "drivers/phy/xilinx/Kconfig" diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile index d7aa516bcc49e..0ac5b21477619 100644 --- a/drivers/phy/Makefile +++ b/drivers/phy/Makefile @@ -52,5 +52,6 @@ obj-$(CONFIG_GENERIC_PHY) += allwinner/ \ starfive/ \ sunplus/ \ tegra/ \ + thead/ \ ti/ \ xilinx/ diff --git a/drivers/phy/thead/Kconfig b/drivers/phy/thead/Kconfig new file mode 100644 index 0000000000000..ba0ceac54c1b0 --- /dev/null +++ b/drivers/phy/thead/Kconfig @@ -0,0 +1,12 @@ +# SPDX-License-Identifier: GPL-2.0-only +config PHY_TH1520_USB + tristate "USB PHY driver for T-Head TH1520 SoC" + depends on ARCH_THEAD || COMPILE_TEST + depends on COMMON_CLK + depends on HAS_IOMEM + depends on OF + depends on RESET_CONTROLLER + select GENERIC_PHY + select REGMAP_MMIO + help + Enable support for the USB PHY on the T-Head TH1520 SoC. diff --git a/drivers/phy/thead/Makefile b/drivers/phy/thead/Makefile new file mode 100644 index 0000000000000..5b459bc7004bd --- /dev/null +++ b/drivers/phy/thead/Makefile @@ -0,0 +1,2 @@ +# SPDX-License-Identifier: GPL-2.0-only +obj-$(CONFIG_PHY_TH1520_USB) += phy-th1520-usb.o diff --git a/drivers/phy/thead/phy-th1520-usb.c b/drivers/phy/thead/phy-th1520-usb.c new file mode 100644 index 0000000000000..6cb0e51401374 --- /dev/null +++ b/drivers/phy/thead/phy-th1520-usb.c @@ -0,0 +1,181 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2026 Institute of Software, Chinese Academy of Sciences (ISCAS) + * + * Authors: + * Icenowy Zheng <zhengxingda@iscas.ac.cn> + */ + +#include <linux/clk.h> +#include <linux/delay.h> +#include <linux/module.h> +#include <linux/of.h> +#include <linux/phy/phy.h> +#include <linux/platform_device.h> +#include <linux/regmap.h> +#include <linux/regulator/consumer.h> +#include <linux/reset.h> + +#define USB_SYSCON_OFFSET 0xf000 + +/* All the below registers are in the USB syscon region */ +#define USB_SSP_EN 0x34 +#define USB_SSP_EN_REF_SSP_EN BIT(0) + +#define USB_SYS 0x3c +#define USB_SYS_COMMONONN BIT(0) + +/* The last register according to the manual */ +#define USB_TEST_REG3 0x5c + +struct th1520_usb_phy { + struct platform_device *pdev; + struct phy *phy; + struct regmap *regmap; + struct clk *ref_clk; + struct reset_control *phy_reset; +}; + +static int th1520_usb_phy_init(struct phy *phy) +{ + struct th1520_usb_phy *th1520_phy = phy_get_drvdata(phy); + int ret; + + ret = clk_prepare_enable(th1520_phy->ref_clk); + if (ret) + return ret; + + ret = reset_control_assert(th1520_phy->phy_reset); + if (ret) + goto err_disable_clk; + + /* + * Do some initial PHY setup: + * - Set COMMONONN to allow the PHY to automatically power down. + * - Set REF_SSP_EN to enable feeding reference clock to SuperSpeed + * PHY clock PLL. + */ + regmap_set_bits(th1520_phy->regmap, USB_SYS, USB_SYS_COMMONONN); + regmap_set_bits(th1520_phy->regmap, USB_SSP_EN, USB_SSP_EN_REF_SSP_EN); + + ret = reset_control_deassert(th1520_phy->phy_reset); + if (ret) + goto err_disable_clk; + + fsleep(10); + + return 0; + +err_disable_clk: + clk_disable_unprepare(th1520_phy->ref_clk); + return ret; +} + +static int th1520_usb_phy_exit(struct phy *phy) +{ + struct th1520_usb_phy *th1520_phy = phy_get_drvdata(phy); + int ret; + + ret = reset_control_assert(th1520_phy->phy_reset); + clk_disable_unprepare(th1520_phy->ref_clk); + + return ret; +} + +static const struct phy_ops th1520_usb_phy_ops = { + .init = th1520_usb_phy_init, + .exit = th1520_usb_phy_exit, + .owner = THIS_MODULE, +}; + +static const struct regmap_config phy_regmap_config = { + .reg_bits = 32, + .val_bits = 32, + .reg_stride = 4, + .max_register = USB_TEST_REG3, +}; + +static int th1520_usb_phy_probe(struct platform_device *pdev) +{ + struct phy_provider *phy_provider; + struct device *dev = &pdev->dev; + struct th1520_usb_phy *th1520_phy; + struct reset_control *bus_reset; + struct clk *bus_clk; + void __iomem *base; + int ret; + + th1520_phy = devm_kzalloc(dev, sizeof(*th1520_phy), GFP_KERNEL); + if (!th1520_phy) + return -ENOMEM; + + th1520_phy->pdev = pdev; + + base = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(base)) + return PTR_ERR(base); + + th1520_phy->ref_clk = devm_clk_get(dev, "ref"); + if (IS_ERR(th1520_phy->ref_clk)) + return PTR_ERR(th1520_phy->ref_clk); + + /* Enable the bus clock and leave it that way */ + bus_clk = devm_clk_get_enabled(dev, "bus"); + if (IS_ERR(bus_clk)) + return PTR_ERR(bus_clk); + + /* De-assert the bus reset and leave it that way */ + bus_reset = devm_reset_control_get_exclusive_deasserted(dev, "bus"); + if (IS_ERR(bus_reset)) + return PTR_ERR(bus_reset); + + th1520_phy->phy_reset = devm_reset_control_get_exclusive(dev, "phy"); + if (IS_ERR(th1520_phy->phy_reset)) + return PTR_ERR(th1520_phy->phy_reset); + + /* + * Schematics of several boards (Lichee Module 4A/Milk-V Meles) + * describe this power rail as always-on. + */ + ret = devm_regulator_get_enable(dev, "avdd33-usb3"); + if (ret) + return ret; + + th1520_phy->regmap = devm_regmap_init_mmio(dev, + base + USB_SYSCON_OFFSET, + &phy_regmap_config); + if (IS_ERR(th1520_phy->regmap)) + return dev_err_probe(dev, PTR_ERR(th1520_phy->regmap), + "Failed to init regmap\n"); + + th1520_phy->phy = devm_phy_create(dev, dev->of_node, &th1520_usb_phy_ops); + if (IS_ERR(th1520_phy->phy)) { + dev_err(dev, "failed to create PHY\n"); + return PTR_ERR(th1520_phy->phy); + } + + phy_set_drvdata(th1520_phy->phy, th1520_phy); + + phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate); + + return PTR_ERR_OR_ZERO(phy_provider); +} + +static const struct of_device_id th1520_usb_phy_of_table[] = { + { .compatible = "thead,th1520-usb-phy" }, + { } +}; +MODULE_DEVICE_TABLE(of, th1520_usb_phy_of_table); + +static struct platform_driver th1520_usb_phy_driver = { + .driver = { + .name = "th1520-usb-phy", + .of_match_table = th1520_usb_phy_of_table, + }, + .probe = th1520_usb_phy_probe, +}; + +module_platform_driver(th1520_usb_phy_driver); + +MODULE_DESCRIPTION("T-Head TH1520 USB PHY driver"); +MODULE_LICENSE("GPL"); -- 2.55.0 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v3 2/2] phy: add a driver for T-Head TH1520 USB PHY @ 2026-10-09 9:04 ` Icenowy Zheng 0 siblings, 0 replies; 14+ messages in thread From: Icenowy Zheng @ 2026-10-09 9:04 UTC (permalink / raw) To: Vinod Koul, Neil Armstrong, Manivannan Sadhasivam, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Philipp Zabel, Wei Fu, Drew Fustini Cc: linux-phy, devicetree, linux-kernel, linux-riscv, Icenowy Zheng, Han Gao, Icenowy Zheng The USB PHY on T-Head TH1520 SoC is a Synopsys USB 3.0 FemtoPHY, with some PHY parameters exported as another system controller along with it. A few PHY parameters have unusable defaults. Add a driver that programs them before releasing the PHY from reset in addition to clock/reset/regulator management. Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn> --- Changes in v3: - Use fsleep() to replace udelay(), and add proper inclusion of linux/delay.h for this function. (fsleep() suggested by Drew and inclusion suggested by Sashiko) - Adapt Drew's suggestion on the wording of the commit message's 2nd paragraph. Changes in v2: - Removed unreferenced register names. - Changed the behavior to leaving bus clock on instead of binding it to the regmap. - Removed early return for reset deassert failure in phy exit callback. - Tweaked the Kconfig item (removed default value and added "select REGMAP_MMIO). drivers/phy/Kconfig | 1 + drivers/phy/Makefile | 1 + drivers/phy/thead/Kconfig | 12 ++ drivers/phy/thead/Makefile | 2 + drivers/phy/thead/phy-th1520-usb.c | 181 +++++++++++++++++++++++++++++ 5 files changed, 197 insertions(+) create mode 100644 drivers/phy/thead/Kconfig create mode 100644 drivers/phy/thead/Makefile create mode 100644 drivers/phy/thead/phy-th1520-usb.c diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig index 19f3b7d12b7d4..a05019020ee09 100644 --- a/drivers/phy/Kconfig +++ b/drivers/phy/Kconfig @@ -200,6 +200,7 @@ source "drivers/phy/st/Kconfig" source "drivers/phy/starfive/Kconfig" source "drivers/phy/sunplus/Kconfig" source "drivers/phy/tegra/Kconfig" +source "drivers/phy/thead/Kconfig" source "drivers/phy/ti/Kconfig" source "drivers/phy/xilinx/Kconfig" diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile index d7aa516bcc49e..0ac5b21477619 100644 --- a/drivers/phy/Makefile +++ b/drivers/phy/Makefile @@ -52,5 +52,6 @@ obj-$(CONFIG_GENERIC_PHY) += allwinner/ \ starfive/ \ sunplus/ \ tegra/ \ + thead/ \ ti/ \ xilinx/ diff --git a/drivers/phy/thead/Kconfig b/drivers/phy/thead/Kconfig new file mode 100644 index 0000000000000..ba0ceac54c1b0 --- /dev/null +++ b/drivers/phy/thead/Kconfig @@ -0,0 +1,12 @@ +# SPDX-License-Identifier: GPL-2.0-only +config PHY_TH1520_USB + tristate "USB PHY driver for T-Head TH1520 SoC" + depends on ARCH_THEAD || COMPILE_TEST + depends on COMMON_CLK + depends on HAS_IOMEM + depends on OF + depends on RESET_CONTROLLER + select GENERIC_PHY + select REGMAP_MMIO + help + Enable support for the USB PHY on the T-Head TH1520 SoC. diff --git a/drivers/phy/thead/Makefile b/drivers/phy/thead/Makefile new file mode 100644 index 0000000000000..5b459bc7004bd --- /dev/null +++ b/drivers/phy/thead/Makefile @@ -0,0 +1,2 @@ +# SPDX-License-Identifier: GPL-2.0-only +obj-$(CONFIG_PHY_TH1520_USB) += phy-th1520-usb.o diff --git a/drivers/phy/thead/phy-th1520-usb.c b/drivers/phy/thead/phy-th1520-usb.c new file mode 100644 index 0000000000000..6cb0e51401374 --- /dev/null +++ b/drivers/phy/thead/phy-th1520-usb.c @@ -0,0 +1,181 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2026 Institute of Software, Chinese Academy of Sciences (ISCAS) + * + * Authors: + * Icenowy Zheng <zhengxingda@iscas.ac.cn> + */ + +#include <linux/clk.h> +#include <linux/delay.h> +#include <linux/module.h> +#include <linux/of.h> +#include <linux/phy/phy.h> +#include <linux/platform_device.h> +#include <linux/regmap.h> +#include <linux/regulator/consumer.h> +#include <linux/reset.h> + +#define USB_SYSCON_OFFSET 0xf000 + +/* All the below registers are in the USB syscon region */ +#define USB_SSP_EN 0x34 +#define USB_SSP_EN_REF_SSP_EN BIT(0) + +#define USB_SYS 0x3c +#define USB_SYS_COMMONONN BIT(0) + +/* The last register according to the manual */ +#define USB_TEST_REG3 0x5c + +struct th1520_usb_phy { + struct platform_device *pdev; + struct phy *phy; + struct regmap *regmap; + struct clk *ref_clk; + struct reset_control *phy_reset; +}; + +static int th1520_usb_phy_init(struct phy *phy) +{ + struct th1520_usb_phy *th1520_phy = phy_get_drvdata(phy); + int ret; + + ret = clk_prepare_enable(th1520_phy->ref_clk); + if (ret) + return ret; + + ret = reset_control_assert(th1520_phy->phy_reset); + if (ret) + goto err_disable_clk; + + /* + * Do some initial PHY setup: + * - Set COMMONONN to allow the PHY to automatically power down. + * - Set REF_SSP_EN to enable feeding reference clock to SuperSpeed + * PHY clock PLL. + */ + regmap_set_bits(th1520_phy->regmap, USB_SYS, USB_SYS_COMMONONN); + regmap_set_bits(th1520_phy->regmap, USB_SSP_EN, USB_SSP_EN_REF_SSP_EN); + + ret = reset_control_deassert(th1520_phy->phy_reset); + if (ret) + goto err_disable_clk; + + fsleep(10); + + return 0; + +err_disable_clk: + clk_disable_unprepare(th1520_phy->ref_clk); + return ret; +} + +static int th1520_usb_phy_exit(struct phy *phy) +{ + struct th1520_usb_phy *th1520_phy = phy_get_drvdata(phy); + int ret; + + ret = reset_control_assert(th1520_phy->phy_reset); + clk_disable_unprepare(th1520_phy->ref_clk); + + return ret; +} + +static const struct phy_ops th1520_usb_phy_ops = { + .init = th1520_usb_phy_init, + .exit = th1520_usb_phy_exit, + .owner = THIS_MODULE, +}; + +static const struct regmap_config phy_regmap_config = { + .reg_bits = 32, + .val_bits = 32, + .reg_stride = 4, + .max_register = USB_TEST_REG3, +}; + +static int th1520_usb_phy_probe(struct platform_device *pdev) +{ + struct phy_provider *phy_provider; + struct device *dev = &pdev->dev; + struct th1520_usb_phy *th1520_phy; + struct reset_control *bus_reset; + struct clk *bus_clk; + void __iomem *base; + int ret; + + th1520_phy = devm_kzalloc(dev, sizeof(*th1520_phy), GFP_KERNEL); + if (!th1520_phy) + return -ENOMEM; + + th1520_phy->pdev = pdev; + + base = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(base)) + return PTR_ERR(base); + + th1520_phy->ref_clk = devm_clk_get(dev, "ref"); + if (IS_ERR(th1520_phy->ref_clk)) + return PTR_ERR(th1520_phy->ref_clk); + + /* Enable the bus clock and leave it that way */ + bus_clk = devm_clk_get_enabled(dev, "bus"); + if (IS_ERR(bus_clk)) + return PTR_ERR(bus_clk); + + /* De-assert the bus reset and leave it that way */ + bus_reset = devm_reset_control_get_exclusive_deasserted(dev, "bus"); + if (IS_ERR(bus_reset)) + return PTR_ERR(bus_reset); + + th1520_phy->phy_reset = devm_reset_control_get_exclusive(dev, "phy"); + if (IS_ERR(th1520_phy->phy_reset)) + return PTR_ERR(th1520_phy->phy_reset); + + /* + * Schematics of several boards (Lichee Module 4A/Milk-V Meles) + * describe this power rail as always-on. + */ + ret = devm_regulator_get_enable(dev, "avdd33-usb3"); + if (ret) + return ret; + + th1520_phy->regmap = devm_regmap_init_mmio(dev, + base + USB_SYSCON_OFFSET, + &phy_regmap_config); + if (IS_ERR(th1520_phy->regmap)) + return dev_err_probe(dev, PTR_ERR(th1520_phy->regmap), + "Failed to init regmap\n"); + + th1520_phy->phy = devm_phy_create(dev, dev->of_node, &th1520_usb_phy_ops); + if (IS_ERR(th1520_phy->phy)) { + dev_err(dev, "failed to create PHY\n"); + return PTR_ERR(th1520_phy->phy); + } + + phy_set_drvdata(th1520_phy->phy, th1520_phy); + + phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate); + + return PTR_ERR_OR_ZERO(phy_provider); +} + +static const struct of_device_id th1520_usb_phy_of_table[] = { + { .compatible = "thead,th1520-usb-phy" }, + { } +}; +MODULE_DEVICE_TABLE(of, th1520_usb_phy_of_table); + +static struct platform_driver th1520_usb_phy_driver = { + .driver = { + .name = "th1520-usb-phy", + .of_match_table = th1520_usb_phy_of_table, + }, + .probe = th1520_usb_phy_probe, +}; + +module_platform_driver(th1520_usb_phy_driver); + +MODULE_DESCRIPTION("T-Head TH1520 USB PHY driver"); +MODULE_LICENSE("GPL"); -- 2.55.0 -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy ^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [PATCH v3 2/2] phy: add a driver for T-Head TH1520 USB PHY 2026-10-09 9:04 ` Icenowy Zheng @ 2026-10-09 9:12 ` sashiko-bot -1 siblings, 0 replies; 14+ messages in thread From: sashiko-bot @ 2026-10-09 9:12 UTC (permalink / raw) To: Icenowy Zheng Cc: linux-phy, conor+dt, vkoul, olteanv, neil.armstrong, devicetree, robh Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider: - [Medium] phy: state machine desync on reset_control_assert error in exit -- commit ec20f3d159c3233e7ce6e058ab085a7384393e38 Author: Icenowy Zheng <zhengxingda@iscas.ac.cn> phy: add a driver for T-Head TH1520 USB PHY This commit introduces a new USB PHY driver for the T-Head TH1520 SoC. It manages basic PHY configuration through a regmap, along with handling the required reference clock and reset controllers. > diff --git a/drivers/phy/thead/phy-th1520-usb.c b/drivers/phy/thead/phy-th1520-usb.c > index 0000000000000..6cb0e51401374 100644 > --- /dev/null > +++ b/drivers/phy/thead/phy-th1520-usb.c [ ... ] > +static int th1520_usb_phy_exit(struct phy *phy) > +{ > + struct th1520_usb_phy *th1520_phy = phy_get_drvdata(phy); > + int ret; > + > + ret = reset_control_assert(th1520_phy->phy_reset); > + clk_disable_unprepare(th1520_phy->ref_clk); > + > + return ret; > +} [Severity: Medium] If reset_control_assert() fails and returns a negative error code, this code still disables the reference clock but propagates the error to the caller. Looking at the PHY core in phy_exit(), if the driver's exit callback returns an error, it skips decrementing the initialization counter: drivers/phy/phy-core.c:phy_exit() { ... ret = phy->ops->exit(phy); if (ret < 0 && ret != -ENOTSUPP) goto out; --phy->init_count; ... out: mutex_unlock(&phy->mutex); return ret; } This leaves the core's software state tracking the PHY as initialized (init_count > 0), while the actual physical hardware has its reference clock disabled. A subsequent call to phy_init() by a consumer would then see init_count > 0, returning success immediately without re-enabling the clock via the init callback, leaving the PHY permanently broken. Could this create a state machine desync if the reset controller fails? Would it be safer to return 0 and ignore the reset failure here to ensure proper teardown accounting in the core? -- Sashiko AI review · https://sashiko.dev/#/patchset/20261009090444.3319517-1-zhengxingda@iscas.ac.cn?part=2 ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v3 2/2] phy: add a driver for T-Head TH1520 USB PHY @ 2026-10-09 9:12 ` sashiko-bot 0 siblings, 0 replies; 14+ messages in thread From: sashiko-bot @ 2026-10-09 9:12 UTC (permalink / raw) To: Icenowy Zheng Cc: linux-phy, conor+dt, vkoul, olteanv, neil.armstrong, devicetree, robh Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider: - [Medium] phy: state machine desync on reset_control_assert error in exit -- commit ec20f3d159c3233e7ce6e058ab085a7384393e38 Author: Icenowy Zheng <zhengxingda@iscas.ac.cn> phy: add a driver for T-Head TH1520 USB PHY This commit introduces a new USB PHY driver for the T-Head TH1520 SoC. It manages basic PHY configuration through a regmap, along with handling the required reference clock and reset controllers. > diff --git a/drivers/phy/thead/phy-th1520-usb.c b/drivers/phy/thead/phy-th1520-usb.c > index 0000000000000..6cb0e51401374 100644 > --- /dev/null > +++ b/drivers/phy/thead/phy-th1520-usb.c [ ... ] > +static int th1520_usb_phy_exit(struct phy *phy) > +{ > + struct th1520_usb_phy *th1520_phy = phy_get_drvdata(phy); > + int ret; > + > + ret = reset_control_assert(th1520_phy->phy_reset); > + clk_disable_unprepare(th1520_phy->ref_clk); > + > + return ret; > +} [Severity: Medium] If reset_control_assert() fails and returns a negative error code, this code still disables the reference clock but propagates the error to the caller. Looking at the PHY core in phy_exit(), if the driver's exit callback returns an error, it skips decrementing the initialization counter: drivers/phy/phy-core.c:phy_exit() { ... ret = phy->ops->exit(phy); if (ret < 0 && ret != -ENOTSUPP) goto out; --phy->init_count; ... out: mutex_unlock(&phy->mutex); return ret; } This leaves the core's software state tracking the PHY as initialized (init_count > 0), while the actual physical hardware has its reference clock disabled. A subsequent call to phy_init() by a consumer would then see init_count > 0, returning success immediately without re-enabling the clock via the init callback, leaving the PHY permanently broken. Could this create a state machine desync if the reset controller fails? Would it be safer to return 0 and ignore the reset failure here to ensure proper teardown accounting in the core? -- Sashiko AI review · https://sashiko.dev/#/patchset/20261009090444.3319517-1-zhengxingda@iscas.ac.cn?part=2 -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy ^ permalink raw reply [flat|nested] 14+ messages in thread
end of thread, other threads:[~2026-10-09 14:44 UTC | newest] Thread overview: 14+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2026-10-09 9:04 [PATCH v3 0/2] phy: add support for TH1520 USB PHY Icenowy Zheng 2026-10-09 9:04 ` Icenowy Zheng 2026-10-09 9:04 ` Icenowy Zheng 2026-10-09 9:04 ` [PATCH v3 1/2] dt-bindings: phy: add binding for T-Head " Icenowy Zheng 2026-10-09 9:04 ` Icenowy Zheng 2026-10-09 9:04 ` Icenowy Zheng 2026-10-09 14:44 ` Conor Dooley 2026-10-09 14:44 ` Conor Dooley 2026-10-09 14:44 ` Conor Dooley 2026-10-09 9:04 ` [PATCH v3 2/2] phy: add a driver " Icenowy Zheng 2026-10-09 9:04 ` Icenowy Zheng 2026-10-09 9:04 ` Icenowy Zheng 2026-10-09 9:12 ` sashiko-bot 2026-10-09 9:12 ` sashiko-bot
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