Re: [PATCH v4 08/12] drm/xe/cper: Emit cper record to trace buf

Re: [PATCH v4 08/12] drm/xe/cper: Emit cper record to trace buf

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] trace: xe_error_cper uses %pU instead of %pUl for guid_t formatting
--

commit 2df74abeb761bb9cbc4580031c2be3af5f19e10b
Author: Badal Nilawar <badal.nilawar@intel.com>

drm/xe/cper: Emit cper record to trace buf
    
This commit introduces the xe_error_cper tracepoint to emit assembled CPER
records to the trace buffer. The events carry the device name, platform ID,
FRU ID, severity, and the Intel error section header so tools can pick them up.

> diff --git a/drivers/gpu/drm/xe/xe_trace_cper.h b/drivers/gpu/drm/xe/xe_trace_cper.h
> new file mode 100644
> --- /dev/null
> +++ b/drivers/gpu/drm/xe/xe_trace_cper.h
[ ... ]
> +TRACE_EVENT(xe_error_cper,
> +	TP_PROTO(struct xe_device *xe,
> +	    const guid_t *platform_id, const guid_t *fru_id,
[ ... ]
> +	TP_fast_assign(
> +	    __assign_str(dev);
> +	    __entry->sev = severity;
> +	    memcpy(__entry->platform_id, platform_id, UUID_SIZE);
> +	    memcpy(__entry->fru_id, fru_id, UUID_SIZE);
> +	    memcpy(__entry->ihdr_raw, ihdr, sizeof(struct xe_cper_sec_intel_err_hdr));
> +	    __entry->cper_len = cper_len;
> +	    memcpy(__get_dynamic_array(cper), cper, cper_len);
> +	    ),
> +
> +	TP_printk("dev=%s severity=%d platform_id=%pU fru_id=%pU "
> +		"intel_err_hdr_raw=%s cper_len=%u cper_raw=%s",

[Severity: Low]
Since platform_id and fru_id are guid_t types (which are little-endian per
UEFI/CPER specifications), shouldn't this use the %pUl format specifier
instead of %pU?

The Linux kernel's %pU specifier assumes a big-endian uuid_t layout. Using
it here will cause the first three groups of the UUID to be byte-swapped in
the trace output, which might break correlation with platform specifications
and CPER tooling.

> +		__get_str(dev), __entry->sev,
> +		__entry->platform_id, __entry->fru_id,
> +		__print_hex(__entry->ihdr_raw,
> +		    sizeof(struct xe_cper_sec_intel_err_hdr)),
> +		__entry->cper_len,
> +		__print_hex(__get_dynamic_array(cper),
> +		    __entry->cper_len))
> +);

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261009104602.1075405-14-badal.nilawar@intel.com?part=8

Re: [PATCH v4 05/12] drm/xe/xe_ras: Add support to retrieve info queue data for CRI

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] xe_ras: missing validation of operation_status in get_info_queue_data
--

commit 7080ef5206c9792b353853f321f38646d98e4924
Author: Badal Nilawar <badal.nilawar@intel.com>

drm/xe/xe_ras: Add support to retrieve info queue data for CRI

Retrieve the RAS info queue data, in multiple chunks, and assemble it into
a flat buffer. A follow-up patch will use this data to prepare the CPER
error info.

> diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
> index 5cfc9beff8c13..900319938fe54 100644
> --- a/drivers/gpu/drm/xe/xe_ras.c
> +++ b/drivers/gpu/drm/xe/xe_ras.c
[ ... ]
> +static int get_info_queue_data(struct xe_device *xe,
> +			       struct xe_ras_get_info_queue_request *req,
> +			       struct xe_ras_get_info_queue_response *out)
> +{
[ ... ]
> +	if (rlen != sizeof(response)) {
> +		xe_err(xe, "sysctrl: unexpected get info queue data response length %zu (expected %zu)\n",
> +		       rlen, sizeof(response));
> +		return -EIO;
> +	}
> +
> +	hdr = &response.queue_response.header;
> +	xe_dbg(xe, "[RAS]: info queue data: status=%u chunk_size=%u flags=0x%x\n",
> +	       response.operation_status, hdr->chunk_size, hdr->flags);
> +
> +	*out = response;
> +	return 0;
> +}

[Severity: Medium]
Does this code need to validate response.operation_status and return an error
if the firmware operation failed?

get_info_queue_data() executes the XE_SYSCTRL_CMD_GET_INFO_QUEUE mailbox
command to fetch chunks from the firmware. The firmware response includes an
operation_status field to indicate whether the request was successful or
rejected (e.g., due to an invalid session ID or out-of-bounds offset).

However, this only logs the status in a debug message and unconditionally
returns 0 (success). Because it fails to return an error (such as converting
the status via ras_status_to_errno()), the caller
xe_ras_drain_info_queue_raw() will proceed to validate and process the
payload. If the firmware did not populate the payload on error, it will
contain zeroes or garbage, resulting in a confusing "invalid info queue
chunk" warning or silent failure, rather than properly halting the fetch
with the correct error code.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261009104602.1075405-14-badal.nilawar@intel.com?part=5

Re: [PATCH v4 06/12] drm/xe/cper: Prepare Intel CPER error info records

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] xe/cper: missing __packed attributes on CPER structs causes ABI breakage and unaligned access
--

commit 48cc4e07bb3144fabbe0d059b7aa4e8d590267c1
Author: Badal Nilawar <badal.nilawar@intel.com>

drm/xe/cper: Prepare Intel CPER error info records

This commit prepares xe_cper_sec_intel_error_info records from RAS info
queue data. Depending on the error class type, one or more error info
records may be generated and embedded in the CPER record.

> diff --git a/drivers/gpu/drm/xe/xe_cper.c b/drivers/gpu/drm/xe/xe_cper.c
> index 1000c78b41e97..7acb503efd118 100644
> --- a/drivers/gpu/drm/xe/xe_cper.c
> +++ b/drivers/gpu/drm/xe/xe_cper.c
[ ... ]
> +static struct xe_cper_sec_intel_error_info *
> +build_einfo(const struct xe_ras_error_log *logs, u32 num_logs,
> +	    const struct xe_ras_error_class *ec, u32 error_count)
> +{
> +	u32 queue_len = num_logs * XE_CPER_RAS_LOG_ENTRY_SIZE;
> +	struct xe_cper_sec_intel_error_info *einfo;
> +	struct xe_intel_priv_event_entry *entry;
> +	u32 i;
> +
> +	einfo = kzalloc_flex(*einfo, event_queue, queue_len);
> +	if (!einfo)
> +		return NULL;
> +
> +	einfo->error_count        = error_count;
> +	einfo->event_queue_length = queue_len;
> +	einfo->event_queue_count  = num_logs;
> +	fill_cper_error_class(&einfo->error_class, ec);
> +
> +	entry = (struct xe_intel_priv_event_entry *)einfo->event_queue;
> +	for (i = 0; i < num_logs; i++) {
> +		entry->entry_length = sizeof_field(struct xe_ras_error_log, error_details);
> +		entry->timestamp    = logs[i].timestamp;

[Severity: High]
Can this assignment cause an alignment fault? 

Because xe_cper_sec_intel_error_info is evaluated as 28 bytes in size,
event_queue starts at offset 28. In xe_intel_priv_event_entry, the
timestamp is at offset 8. The resulting address for the timestamp field is
therefore 36 bytes from the kzalloc base, which is not 8-byte aligned.

Writing a 64-bit value to a 4-byte-aligned address can cause a kernel panic
on architectures that strictly enforce 64-bit alignment.

> +		memcpy(entry->metadata, logs[i].error_details, sizeof(logs[i].error_details));
> +		entry = (void *)entry + XE_CPER_RAS_LOG_ENTRY_SIZE;
> +	}
> +
> +	return einfo;
> +}
[ ... ]
> diff --git a/drivers/gpu/drm/xe/xe_cper_types.h b/drivers/gpu/drm/xe/xe_cper_types.h
> index 7612518c9d47b..627c7117f23eb 100644
> --- a/drivers/gpu/drm/xe/xe_cper_types.h
> +++ b/drivers/gpu/drm/xe/xe_cper_types.h
[ ... ]
> +struct xe_cper_sec_intel_error_info {
> +	/** @error_class: Error classification */
> +	struct xe_cper_error_class error_class;
> +	/** @error_count: Total number of errors recorded */
> +	u32 error_count;
> +	/** @event_queue_length: Total byte size of the @event_queue array */
> +	u32 event_queue_length;
> +	/** @event_queue_count: Number of entries in @event_queue */
> +	u32 event_queue_count;
> +	/** @event_queue: Packed array of &xe_intel_priv_event_entry records */
> +	u8 event_queue[];
> +};
> +
> +/**
> + * struct xe_intel_priv_event_entry - Single error event in the event queue
> + *
> + * Each entry is variable-length; @entry_length gives the byte size of
> + * @metadata only (not including @entry_length or @timestamp).
> + */
> +struct xe_intel_priv_event_entry {
> +	/** @entry_length: Byte length of the @metadata payload */
> +	u32 entry_length;
> +	/** @timestamp: Timestamp of this event, in firmware ticks */
> +	u64 timestamp;
> +	/** @metadata: Event-specific payload bytes */
> +	u8  metadata[];
> +};

[Severity: High]
Are these structures missing the __packed attribute?

Without it, the compiler injects a 4-byte hole before the timestamp field,
which also enforces 8-byte alignment for the struct. This implicit padding
corrupts the intended binary CPER layout, potentially leading to ABI
breakage when the records are parsed by external tools. It also causes the
memory alignment issues mentioned above.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261009104602.1075405-14-badal.nilawar@intel.com?part=6

Re: [PATCH v4 01/12] drm/xe/cper: Add CPER reporting entry point for xe_log

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] drm/xe: Silent telemetry loss when hardware SIGIDs lack exact RAS data payload
--

commit a8ad6417f3a91a193b5e9bf972e9a0e60ff46e5a
Author: Badal Nilawar <badal.nilawar@intel.com>

drm/xe/cper: Add CPER reporting entry point for xe_log

Introduce xe_cper_emit() as the single entry point for emitting
CPER records from xe_log. Hardware SIGIDs are routed to a hardware
error helper, and software SIGIDs are left as TODO.

> diff --git a/drivers/gpu/drm/xe/xe_cper.c b/drivers/gpu/drm/xe/xe_cper.c
> new file mode 100644
> index 0000000000000..c5caa0e8f496a
> --- /dev/null
> +++ b/drivers/gpu/drm/xe/xe_cper.c
[ ... ]
> +void xe_cper_emit(struct xe_device *xe, int cper_sev, enum xe_sigid sigid,
> +		  u32 component, u32 location, const void *data, size_t len,
> +		  struct va_format *vaf)
> +{
> +	if (!xe)
> +		return;
> +
> +	if (is_hw_sigid(sigid)) {
> +		if (!IS_ERR_OR_NULL(data) && len == sizeof(struct xe_ras_error_class))
> +			xe_cper_emit_hw_err(xe, cper_sev, sigid, data);
> +		return;

[Severity: Medium]
If a hardware SIGID log entry is missing the expected RAS data payload (e.g.,
the data pointer is ERR_PTR, NULL, or the length is unexpected), does this
unconditionally return and drop the telemetry?

Since there is no fallback to emit a software CPER log or print a warning,
it looks like this could result in a silent loss of hardware error data.

> +	}
> +
> +	/* TODO software CPER */
> +}

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261009104602.1075405-14-badal.nilawar@intel.com?part=1

[PATCH v4 00/12] Add CPER logging support for CRI

[Badal Nilawar]

This patch series adds CPER (Common Platform Error Record) logging support
for Correctable errors reported by Intel Xe GPUs. CPER logging is done
through trace event.

v2:
   - Extended CPER logging to Uncorrectable errors and xe_ras_get_counter
     request
   - Log CPER records via xe_log SIGID infra 

v3:
  - Added the patches in incremental order (Raag)
  - Fixed Sashiko warnings which are applicable 

v4:
  - Split the patches further for incremental review (Raag)
  - Refactor info queue handling (Raag)
  - Fix applicable Sashiko warnings

Badal Nilawar (12):
  drm/xe/cper: Add CPER reporting entry point for xe_log
  drm/xe/cper: Retrieve the error counter record for CPER reporting
  drm/xe/cper: Initialize Intel-specific error section header
  drm/xe/cper: Construct CPER record for hardware errors
  drm/xe/xe_ras: Add support to retrieve info queue data for CRI
  drm/xe/cper: Prepare Intel CPER error info records
  drm/xe/cper: Log CPER records for aggregate counter retrieval
  drm/xe/cper: Emit cper record to trace buf
  drm/xe/xe_ras: Report device memory errors using SIGID
  drm/xe/xe_ras: Report core compute errors using SIGID
  drm/xe/xe_ras: Report soc internal errors using SIGID
  drm/xe/xe_ras: Report correctable errors using SIGID

 .../ABI/testing/sysfs-driver-intel-xe-cper    |  18 +
 drivers/gpu/drm/xe/Makefile                   |   3 +
 drivers/gpu/drm/xe/xe_cper.c                  | 530 ++++++++++++++++++
 drivers/gpu/drm/xe/xe_cper.h                  |  37 ++
 drivers/gpu/drm/xe/xe_cper_types.h            | 185 ++++++
 drivers/gpu/drm/xe/xe_device_types.h          |   4 +
 drivers/gpu/drm/xe/xe_log.c                   |   5 +-
 drivers/gpu/drm/xe/xe_ras.c                   | 254 ++++++++-
 drivers/gpu/drm/xe/xe_ras.h                   |   5 +
 drivers/gpu/drm/xe/xe_ras_types.h             | 118 +++-
 drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h |   2 +
 drivers/gpu/drm/xe/xe_trace_cper.c            |   9 +
 drivers/gpu/drm/xe/xe_trace_cper.h            |  66 +++
 13 files changed, 1202 insertions(+), 34 deletions(-)
 create mode 100644 Documentation/ABI/testing/sysfs-driver-intel-xe-cper
 create mode 100644 drivers/gpu/drm/xe/xe_cper.c
 create mode 100644 drivers/gpu/drm/xe/xe_cper.h
 create mode 100644 drivers/gpu/drm/xe/xe_cper_types.h
 create mode 100644 drivers/gpu/drm/xe/xe_trace_cper.c
 create mode 100644 drivers/gpu/drm/xe/xe_trace_cper.h

-- 
2.54.0

Re: [PATCH v4 02/12] drm/xe/cper: Retrieve the error counter record for CPER reporting

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] drm/xe: out-of-bounds array access on informational or reserved RAS errors
--

commit 27317cc719f71d74be0f7fcd94c5a8fbf53f9e5e
Author: Badal Nilawar <badal.nilawar@intel.com>

drm/xe/cper: Retrieve the error counter record for CPER reporting
    
Retrieve error counter record required to build a CPER record.

> diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
> index 7a85735c57d58..5cfc9beff8c13 100644
> --- a/drivers/gpu/drm/xe/xe_ras.c
> +++ b/drivers/gpu/drm/xe/xe_ras.c
[ ... ]
> @@ -284,21 +282,21 @@ static void ras_send_error_event(struct xe_device *xe, u8 severity, u8 component)
>  {
>  	struct xe_ras_error_class counter = {0};
> +	struct xe_ras_get_counter_response response = {0};
>  	u8 drm_severity, drm_component;
> -	u32 value;
>  	int ret;
>  
>  	counter.common.severity = severity;
>  	counter.common.component = component;
>  
> -	ret = get_counter(xe, &counter, &value);
> +	ret = xe_ras_get_counter_response(xe, &counter, &response);
>  	if (ret)
>  		return;
>  
>  	drm_severity = xe_to_drm_ras_severity(severity);
>  	drm_component = xe_to_drm_ras_component(component);
>  
> -	xe_drm_ras_event(xe, drm_component, drm_severity, value);
> +	xe_drm_ras_event(xe, drm_component, drm_severity, response.value);

[Severity: High]
When firmware returns valid but unmapped values, like 
XE_RAS_SEV_INFORMATIONAL or XE_RAS_COMP_RESERVED, is it possible that 
xe_to_drm_ras_severity() and xe_to_drm_ras_component() will map these to 
their MAX values (DRM_XE_RAS_ERR_SEV_MAX and DRM_XE_RAS_ERR_COMP_MAX)?

If so, does this call to xe_drm_ras_event() cause out-of-bounds array
accesses? 

In drivers/gpu/drm/xe/xe_drm_ras.c:xe_drm_ras_event():

    struct xe_drm_ras_counter *info = ras->info[severity];
    ...
    node = &ras->node[severity];

    if (!info || !info[component].name)
        return;

Since the arrays are sized for the valid drm enum mappings, using the MAX
values as indices would lead to wild pointer dereferences.

>  }
>  
>  static u8 handle_core_compute_errors(struct xe_ras_error_array *arr)

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261009104602.1075405-14-badal.nilawar@intel.com?part=2

[PATCH v4 01/12] drm/xe/cper: Add CPER reporting entry point for xe_log

[Badal Nilawar]

Introduce xe_cper_emit() as the single entry point for emitting
CPER records from xe_log. xe_log now forwards every SIGID log entry
with its full context (component, location, data/len and formatted
message), and xe_cper decides how to report it. Hardware SIGIDs are
routed to a hardware error helper, software SIGIDs are left as TODO.

No functional change is intended yet, as the CPER emission logic
is added in follow-up patches.

Assisted-by: Copilot:Claude-Opus-5.5
Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
---
v4:
  - s/CONFIG_UEFI_CPER_X86/CONFIG_UEFI_CPER/ (Raag)
  - Use in_range() for hardware SIGID check in xe_cper (Raag)
  - Drop unused response param and constify error_class
  - Check data len against struct xe_ras_error_class before use (Michal)
---
 drivers/gpu/drm/xe/Makefile  |  2 ++
 drivers/gpu/drm/xe/xe_cper.c | 51 ++++++++++++++++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_cper.h | 26 ++++++++++++++++++
 drivers/gpu/drm/xe/xe_log.c  |  5 +++-
 4 files changed, 83 insertions(+), 1 deletion(-)
 create mode 100644 drivers/gpu/drm/xe/xe_cper.c
 create mode 100644 drivers/gpu/drm/xe/xe_cper.h

diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index 10930c924070..da78026b0bb4 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -168,6 +168,8 @@ xe-$(CONFIG_HWMON) += xe_hwmon.o
 xe-$(CONFIG_PERF_EVENTS) += xe_pmu.o
 xe-$(CONFIG_CONFIGFS_FS) += xe_configfs.o
 
+xe-$(CONFIG_UEFI_CPER) += xe_cper.o
+
 # graphics virtualization (SR-IOV) support
 xe-y += \
 	xe_gt_sriov_vf.o \
diff --git a/drivers/gpu/drm/xe/xe_cper.c b/drivers/gpu/drm/xe/xe_cper.c
new file mode 100644
index 000000000000..c5caa0e8f496
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_cper.c
@@ -0,0 +1,51 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#include <linux/err.h>
+#include <linux/minmax.h>
+
+#include "xe_cper.h"
+#include "xe_device.h"
+#include "xe_ras_types.h"
+
+static bool is_hw_sigid(enum xe_sigid sigid)
+{
+	return in_range(sigid, INTEL_SIGID_GPU_XE_HARDWARE_START, INTEL_SIGID_BATCH);
+}
+
+static void xe_cper_emit_hw_err(struct xe_device *xe, int cper_sev, enum xe_sigid sigid,
+				const struct xe_ras_error_class *error_class)
+{
+	/* TODO */
+}
+
+/**
+ * xe_cper_emit() - Emit a CPER record for a SIGID log entry
+ * @xe: The &xe_device
+ * @cper_sev: CPER severity
+ * @sigid: Error signature identifier
+ * @component: Component identifier
+ * @location: Location details of the @component
+ * @data: Pointer to the additional details, or ERR_PTR, or NULL if not applicable
+ * @len: Length of the @data in bytes, or 0 if not applicable
+ * @vaf: Formatted log message
+ *
+ * Emit a CPER record for a SIGID log entry
+ */
+void xe_cper_emit(struct xe_device *xe, int cper_sev, enum xe_sigid sigid,
+		  u32 component, u32 location, const void *data, size_t len,
+		  struct va_format *vaf)
+{
+	if (!xe)
+		return;
+
+	if (is_hw_sigid(sigid)) {
+		if (!IS_ERR_OR_NULL(data) && len == sizeof(struct xe_ras_error_class))
+			xe_cper_emit_hw_err(xe, cper_sev, sigid, data);
+		return;
+	}
+
+	/* TODO software CPER */
+}
diff --git a/drivers/gpu/drm/xe/xe_cper.h b/drivers/gpu/drm/xe/xe_cper.h
new file mode 100644
index 000000000000..84676c7645a5
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_cper.h
@@ -0,0 +1,26 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#ifndef _XE_CPER_H_
+#define _XE_CPER_H_
+
+#include <linux/types.h>
+
+#include "abi/xe_sigid_abi.h"
+
+struct va_format;
+struct xe_device;
+
+#if IS_ENABLED(CONFIG_UEFI_CPER)
+void xe_cper_emit(struct xe_device *xe, int cper_sev, enum xe_sigid sigid,
+		  u32 component, u32 location, const void *data, size_t len,
+		  struct va_format *vaf);
+#else
+static inline void xe_cper_emit(struct xe_device *xe, int cper_sev, enum xe_sigid sigid,
+				u32 component, u32 location, const void *data, size_t len,
+				struct va_format *vaf) {}
+#endif
+
+#endif /* _XE_CPER_H_ */
diff --git a/drivers/gpu/drm/xe/xe_log.c b/drivers/gpu/drm/xe/xe_log.c
index 29eb16db3320..80e2b1724ceb 100644
--- a/drivers/gpu/drm/xe/xe_log.c
+++ b/drivers/gpu/drm/xe/xe_log.c
@@ -8,6 +8,7 @@
 
 #include "abi/xe_log_abi.h"
 
+#include "xe_cper.h"
 #include "xe_device.h"
 #include "xe_log.h"
 #include "xe_pci_types.h"
@@ -19,7 +20,9 @@ static void log_emit_cper(struct pci_dev *pdev, int cper_sev, enum xe_sigid sigi
 {
 	KUNIT_STATIC_STUB_REDIRECT(log_emit_cper, pdev, cper_sev, sigid,
 				   component, location, data, len, vaf);
-	/* TODO */
+
+	xe_cper_emit(xe_any_to_xe(pdev), cper_sev, sigid,
+		     component, location, data, len, vaf);
 }
 
 static const char *log_unknown_component_prefix(u32 component)
-- 
2.54.0

[PATCH v4 02/12] drm/xe/cper: Retrieve the error counter record for CPER reporting

[Badal Nilawar]

Retrieve error counter record required to build a CPER record.

Assisted-by: Copilot:Claude-Opus-5.5
Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
---
v4:
  - Drop redundant xe_ras_counter_is_valid() check (Raag)
  - Add might_sleep() to assert that the caller is in a sleepable
    context (sashiko)
  - Add xe_device_assert_mem_access() to assert the outer runtime PM
    wake reference requirement (sashiko)
---
 drivers/gpu/drm/xe/xe_cper.c | 14 ++++++++++-
 drivers/gpu/drm/xe/xe_ras.c  | 45 ++++++++++++++++++++++++------------
 drivers/gpu/drm/xe/xe_ras.h  |  2 ++
 3 files changed, 45 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_cper.c b/drivers/gpu/drm/xe/xe_cper.c
index c5caa0e8f496..4f0ed5096aac 100644
--- a/drivers/gpu/drm/xe/xe_cper.c
+++ b/drivers/gpu/drm/xe/xe_cper.c
@@ -4,10 +4,13 @@
  */
 
 #include <linux/err.h>
+#include <linux/kernel.h>
 #include <linux/minmax.h>
 
 #include "xe_cper.h"
 #include "xe_device.h"
+#include "xe_printk.h"
+#include "xe_ras.h"
 #include "xe_ras_types.h"
 
 static bool is_hw_sigid(enum xe_sigid sigid)
@@ -18,7 +21,16 @@ static bool is_hw_sigid(enum xe_sigid sigid)
 static void xe_cper_emit_hw_err(struct xe_device *xe, int cper_sev, enum xe_sigid sigid,
 				const struct xe_ras_error_class *error_class)
 {
-	/* TODO */
+	struct xe_ras_get_counter_response local_resp;
+
+	/* Fetching the counter sends a sysctrl command */
+	might_sleep();
+	xe_device_assert_mem_access(xe);
+
+	if (xe_ras_get_counter_response(xe, error_class, &local_resp)) {
+		xe_err(xe, "CPER: failed to get counter, skipping record\n");
+		return;
+	}
 }
 
 /**
diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
index 7a85735c57d5..5cfc9beff8c1 100644
--- a/drivers/gpu/drm/xe/xe_ras.c
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -103,8 +103,6 @@ static const char * const gpu_health_states[] = {
 };
 static_assert(ARRAY_SIZE(gpu_health_states) == XE_RAS_HEALTH_MAX);
 
-static int get_counter(struct xe_device *xe, struct xe_ras_error_class *counter, u32 *value);
-
 static u8 drm_to_xe_ras_severity(u8 severity)
 {
 	switch (severity) {
@@ -284,21 +282,21 @@ static void ras_usp_aer_init(struct xe_device *xe)
 static void ras_send_error_event(struct xe_device *xe, u8 severity, u8 component)
 {
 	struct xe_ras_error_class counter = {0};
+	struct xe_ras_get_counter_response response = {0};
 	u8 drm_severity, drm_component;
-	u32 value;
 	int ret;
 
 	counter.common.severity = severity;
 	counter.common.component = component;
 
-	ret = get_counter(xe, &counter, &value);
+	ret = xe_ras_get_counter_response(xe, &counter, &response);
 	if (ret)
 		return;
 
 	drm_severity = xe_to_drm_ras_severity(severity);
 	drm_component = xe_to_drm_ras_component(component);
 
-	xe_drm_ras_event(xe, drm_component, drm_severity, value);
+	xe_drm_ras_event(xe, drm_component, drm_severity, response.value);
 }
 
 static u8 handle_core_compute_errors(struct xe_ras_error_array *arr)
@@ -433,19 +431,30 @@ void xe_ras_counter_threshold_crossed(struct xe_device *xe,
 	}
 }
 
-static int get_counter(struct xe_device *xe, struct xe_ras_error_class *counter, u32 *value)
+/**
+ * xe_ras_get_counter_response() - Get error counter record
+ * @xe: Xe device instance
+ * @counter: RAS error class
+ * @out: Counter record retrieved
+ *
+ * Retrieve the counter record of a specific error class from firmware.
+ *
+ * Return: 0 on success, negative error code on failure.
+ */
+int xe_ras_get_counter_response(struct xe_device *xe, const struct xe_ras_error_class *counter,
+				struct xe_ras_get_counter_response *out)
 {
-	struct xe_ras_get_counter_response response = {0};
 	struct xe_ras_get_counter_request request = {0};
 	struct xe_sysctrl_mailbox_command command = {0};
 	struct xe_ras_error_common *common;
 	size_t rlen;
 	int ret;
 
+	memset(out, 0, sizeof(*out));
 	request.counter = *counter;
 
 	xe_sysctrl_create_command(&command, XE_SYSCTRL_GROUP_GFSP, XE_SYSCTRL_CMD_GET_COUNTER,
-				  &request, sizeof(request), &response, sizeof(response));
+				  &request, sizeof(request), out, sizeof(*out));
 
 	ret = xe_sysctrl_send_command(&xe->sc, &command, &rlen);
 	if (ret) {
@@ -453,19 +462,18 @@ static int get_counter(struct xe_device *xe, struct xe_ras_error_class *counter,
 		return ret;
 	}
 
-	if (rlen != sizeof(response)) {
+	if (rlen != sizeof(*out)) {
 		xe_err(xe, "sysctrl: unexpected get counter response length %zu (expected %zu)\n",
-		       rlen, sizeof(response));
+		       rlen, sizeof(*out));
 		return -EIO;
 	}
 
-	if (!ras_counter_is_valid(xe, &response.counter))
+	if (!ras_counter_is_valid(xe, &out->counter))
 		return -EBADMSG;
 
-	common = &response.counter.common;
-	*value = response.value;
+	common = &out->counter.common;
 
-	xe_dbg(xe, "[RAS]: get counter %u for %s %s\n", *value, comp_to_str(common->component),
+	xe_dbg(xe, "[RAS]: get counter %u for %s %s\n", out->value, comp_to_str(common->component),
 	       sev_to_str(common->severity));
 
 	return 0;
@@ -596,12 +604,19 @@ enum xe_ras_recovery_action xe_ras_process_errors(struct xe_device *xe)
 int xe_ras_get_counter(struct xe_device *xe, u8 severity, u8 component, u32 *value)
 {
 	struct xe_ras_error_class counter = {0};
+	struct xe_ras_get_counter_response response = {0};
+	int ret;
 
 	counter.common.severity = drm_to_xe_ras_severity(severity);
 	counter.common.component = drm_to_xe_ras_component(component);
 
 	guard(xe_pm_runtime)(xe);
-	return get_counter(xe, &counter, value);
+	ret = xe_ras_get_counter_response(xe, &counter, &response);
+	if (ret)
+		return ret;
+
+	*value = response.value;
+	return 0;
 }
 
 /**
diff --git a/drivers/gpu/drm/xe/xe_ras.h b/drivers/gpu/drm/xe/xe_ras.h
index 0b8669f28d56..84700ea63394 100644
--- a/drivers/gpu/drm/xe/xe_ras.h
+++ b/drivers/gpu/drm/xe/xe_ras.h
@@ -20,5 +20,7 @@ int xe_ras_get_threshold(struct xe_device *xe, u8 severity, u8 component, u32 *t
 int xe_ras_set_threshold(struct xe_device *xe, u8 severity, u8 component, u32 threshold);
 void xe_ras_init(struct xe_device *xe);
 enum xe_ras_recovery_action xe_ras_process_errors(struct xe_device *xe);
+int xe_ras_get_counter_response(struct xe_device *xe, const struct xe_ras_error_class *counter,
+				struct xe_ras_get_counter_response *out);
 
 #endif
-- 
2.54.0

[PATCH v4 03/12] drm/xe/cper: Initialize Intel-specific error section header

[Badal Nilawar]

Define the Intel-specific CPER error section header and initialize it
from the error counter record for Intel GPU hardware errors.

Assisted-by: Copilot:Claude-Opus-5.5
Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
---
v4:
 - Split from "drm/xe/cper: Prepare CPER record" (Raag)
 - Add dedicated struct xe_cper_error_class (Michal)
 - Drop empty fill_fw_id() stub, leave a TODO instead
v2:
 - Guard against NULL THIS_MODULE->srcversion (sashiko)
---
 drivers/gpu/drm/xe/xe_cper.c       | 43 ++++++++++++++++++
 drivers/gpu/drm/xe/xe_cper_types.h | 72 ++++++++++++++++++++++++++++++
 2 files changed, 115 insertions(+)
 create mode 100644 drivers/gpu/drm/xe/xe_cper_types.h

diff --git a/drivers/gpu/drm/xe/xe_cper.c b/drivers/gpu/drm/xe/xe_cper.c
index 4f0ed5096aac..e7cae449b349 100644
--- a/drivers/gpu/drm/xe/xe_cper.c
+++ b/drivers/gpu/drm/xe/xe_cper.c
@@ -6,8 +6,10 @@
 #include <linux/err.h>
 #include <linux/kernel.h>
 #include <linux/minmax.h>
+#include <linux/pci.h>
 
 #include "xe_cper.h"
+#include "xe_cper_types.h"
 #include "xe_device.h"
 #include "xe_printk.h"
 #include "xe_ras.h"
@@ -18,9 +20,47 @@ static bool is_hw_sigid(enum xe_sigid sigid)
 	return in_range(sigid, INTEL_SIGID_GPU_XE_HARDWARE_START, INTEL_SIGID_BATCH);
 }
 
+static void xe_cper_init_intel_err_hdr(struct xe_device *xe,
+				       const struct xe_ras_error_class *error_class,
+				       u64 first_timestamp, u32 sig_id, u32 error_count,
+				       struct xe_cper_sec_intel_err_hdr *ihdr)
+{
+	ihdr->error_class.error_type = error_class->common.severity;
+	ihdr->error_class.error_component = error_class->common.component;
+	ihdr->error_class.tile = error_class->product.unit.tile;
+	ihdr->error_class.instance = error_class->product.unit.instance;
+	ihdr->error_class.cause = error_class->product.cause.cause;
+	ihdr->validation_bits |= XE_CPER_VALID_LOCATION;
+
+	if (first_timestamp) {
+		ihdr->first_timestamp = first_timestamp;
+		ihdr->validation_bits |= XE_CPER_VALID_FIRST_TIMESTAMP;
+	}
+
+	if (sig_id != U32_MAX) {
+		ihdr->sig_id = sig_id;
+		ihdr->validation_bits |= XE_CPER_VALID_SIG_ID;
+	}
+
+	ihdr->error_count = error_count;
+
+	strscpy(ihdr->pci_bdf, pci_name(to_pci_dev(xe->drm.dev)), sizeof(ihdr->pci_bdf));
+	ihdr->validation_bits |= XE_CPER_VALID_PCI_BDF;
+
+#ifdef MODULE
+	if (THIS_MODULE->srcversion) {
+		strscpy(ihdr->drv_version, THIS_MODULE->srcversion, sizeof(ihdr->drv_version));
+		ihdr->validation_bits |= XE_CPER_VALID_DRV_VERSION;
+	}
+#endif
+
+	/* TODO: fill fw_id and set XE_CPER_VALID_FW_ID */
+}
+
 static void xe_cper_emit_hw_err(struct xe_device *xe, int cper_sev, enum xe_sigid sigid,
 				const struct xe_ras_error_class *error_class)
 {
+	struct xe_cper_sec_intel_err_hdr ihdr = {};
 	struct xe_ras_get_counter_response local_resp;
 
 	/* Fetching the counter sends a sysctrl command */
@@ -31,6 +71,9 @@ static void xe_cper_emit_hw_err(struct xe_device *xe, int cper_sev, enum xe_sigi
 		xe_err(xe, "CPER: failed to get counter, skipping record\n");
 		return;
 	}
+
+	xe_cper_init_intel_err_hdr(xe, error_class, local_resp.timestamp,
+				   sigid, local_resp.value, &ihdr);
 }
 
 /**
diff --git a/drivers/gpu/drm/xe/xe_cper_types.h b/drivers/gpu/drm/xe/xe_cper_types.h
new file mode 100644
index 000000000000..74307e7f78a2
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_cper_types.h
@@ -0,0 +1,72 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#ifndef _XE_CPER_TYPES_H_
+#define _XE_CPER_TYPES_H_
+
+#include <linux/types.h>
+
+/*
+ * Validation bits definition for validation_bits in struct
+ * xe_cper_sec_intel_err_hdr. When set, corresponding fields in header
+ * contains valid data
+ */
+#define XE_CPER_VALID_LOCATION		0x0001
+#define XE_CPER_VALID_FIRST_TIMESTAMP	0x0002
+#define XE_CPER_VALID_SIG_ID		0x0004
+#define XE_CPER_VALID_PCI_BDF		0x0008
+#define XE_CPER_VALID_DRV_VERSION	0x0010
+#define XE_CPER_VALID_FW_ID		0x0020
+
+#pragma pack(push, 1)
+
+/**
+ * struct xe_cper_error_class - Intel GPU CPER error classification
+ */
+struct xe_cper_error_class {
+	/** @error_type: RAS error severity */
+	u8  error_type;
+	/** @error_component: IP block that raised the error */
+	u8  error_component;
+	/** @tile: Tile number */
+	u8  tile;
+	/** @instance: Instance within the tile */
+	u32 instance;
+	/** @cause: Error cause code */
+	u32 cause;
+	/** @reserved: Reserved, must be zero */
+	u8  reserved;
+};
+
+/**
+ * struct xe_cper_sec_intel_err_hdr - Intel-specific CPER error section header
+ *
+ * Fixed-size header for the Intel GPU error section of a CPER record.
+ * All multi-byte fields are little-endian; the structure is packed.
+ */
+struct xe_cper_sec_intel_err_hdr {
+	/** @error_class: Error classification (type, component, location, cause) */
+	struct xe_cper_error_class error_class;
+	/** @first_timestamp: First occurrence of this error class, in ticks */
+	u64 first_timestamp;
+	/** @sig_id: Aggregated error class SIG ID; set to U32_MAX if unknown */
+	u32 sig_id;
+	/** @error_count: Number of times this error has been observed */
+	u32 error_count;
+	/** @validation_bits: Raw u16 view of all valid bits */
+	u16 validation_bits;
+	/** @pci_bdf: PCI location string, format "DDDD:bb:dd.f" */
+	char pci_bdf[16];
+	/** @drv_version: Driver source version string (THIS_MODULE->srcversion) */
+	char drv_version[25];
+	/** @fw_id: Firmware version string (GFSP+PCODE+CSC+GUC or MNG+NUC+RAS+GUC) */
+	char fw_id[256];
+	/** @reserved: Reserved for future use, must be zero */
+	u8 reserved[5];
+};
+
+#pragma pack(pop)
+
+#endif
-- 
2.54.0

[PATCH v4 04/12] drm/xe/cper: Construct CPER record for hardware errors

[Badal Nilawar]

Assemble the CPER record header, section descriptor and the Intel
error section for Intel GPU hardware errors. Emitting the record is
added in a follow-up patch.

Assisted-by: Copilot:Claude-Opus-5.5
Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
---
v4:
 - Split from "drm/xe/cper: Prepare CPER record" (Raag)
 - Use xe->device_uid for FRU ID
 - Add platform IDs for all CRI PCI device IDs
v2:
 - Encode cper_record_header timestamp in BCD format (sashiko)
---
 drivers/gpu/drm/xe/xe_cper.c       | 122 +++++++++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_cper_types.h |  53 +++++++++++++
 2 files changed, 175 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_cper.c b/drivers/gpu/drm/xe/xe_cper.c
index e7cae449b349..1000c78b41e9 100644
--- a/drivers/gpu/drm/xe/xe_cper.c
+++ b/drivers/gpu/drm/xe/xe_cper.c
@@ -3,10 +3,14 @@
  * Copyright © 2026 Intel Corporation
  */
 
+#include <linux/bcd.h>
 #include <linux/err.h>
 #include <linux/kernel.h>
 #include <linux/minmax.h>
 #include <linux/pci.h>
+#include <linux/slab.h>
+#include <linux/time.h>
+#include <linux/timekeeping.h>
 
 #include "xe_cper.h"
 #include "xe_cper_types.h"
@@ -20,6 +24,60 @@ static bool is_hw_sigid(enum xe_sigid sigid)
 	return in_range(sigid, INTEL_SIGID_GPU_XE_HARDWARE_START, INTEL_SIGID_BATCH);
 }
 
+static const struct xe_platform_id_entry xe_platform_ids[] = {
+	/* 0x674C  platform/8086:674c */
+	{ 0x674C, GUID_INIT(0x9046afe5, 0x9041, 0x5124,
+			    0x86, 0x14, 0x92, 0x55, 0x0d, 0x9e, 0x9d, 0xa6) },
+	/* 0x674D  platform/8086:674d */
+	{ 0x674D, GUID_INIT(0xf95911b8, 0x6564, 0x5905,
+			    0xa6, 0xa7, 0xb9, 0xbf, 0x54, 0xab, 0x6c, 0x27) },
+	/* 0x674E  platform/8086:674e */
+	{ 0x674E, GUID_INIT(0xb8d24106, 0x0108, 0x59f1,
+			    0x8f, 0xfc, 0x9f, 0xc4, 0xa9, 0xc9, 0xb7, 0xb0) },
+	/* 0x674F  platform/8086:674f */
+	{ 0x674F, GUID_INIT(0xdd8dd88e, 0xef2f, 0x59b1,
+			    0x99, 0x15, 0xdb, 0x6f, 0x1d, 0xc9, 0xb4, 0x5d) },
+	/* 0x6750  platform/8086:6750 */
+	{ 0x6750, GUID_INIT(0x1dd66c44, 0x87d5, 0x524a,
+			    0xad, 0x6e, 0xfc, 0x18, 0x9d, 0x42, 0x6f, 0x1a) },
+	/* 0x6751  platform/8086:6751 */
+	{ 0x6751, GUID_INIT(0x17d0dd04, 0x2fad, 0x5400,
+			    0x99, 0xc8, 0x9b, 0x45, 0x51, 0x3b, 0x67, 0xe3) },
+};
+
+static const guid_t *lookup_platform_id(const struct pci_dev *pdev)
+{
+	unsigned int i;
+
+	for (i = 0; i < ARRAY_SIZE(xe_platform_ids); i++)
+		if (xe_platform_ids[i].device_id == pdev->device)
+			return &xe_platform_ids[i].platform_id;
+	return NULL;
+}
+
+static u64 cper_timestamp_now(void)
+{
+	struct tm tm;
+	u64 ts = 0;
+	u8 *p = (u8 *)&ts;
+	int year;
+
+	time64_to_tm(ktime_get_real_seconds(), 0, &tm);
+
+	year = tm.tm_year + 1900;
+
+	p[0] = bin2bcd(tm.tm_sec);
+	p[1] = bin2bcd(tm.tm_min);
+	p[2] = bin2bcd(tm.tm_hour);
+	p[3] = 0x1; /* precise time */
+	p[4] = bin2bcd(tm.tm_mday);
+	p[5] = bin2bcd(tm.tm_mon + 1);
+	p[6] = bin2bcd(year % 100);
+	p[7] = bin2bcd(year / 100);
+
+	return ts;
+}
+
 static void xe_cper_init_intel_err_hdr(struct xe_device *xe,
 				       const struct xe_ras_error_class *error_class,
 				       u64 first_timestamp, u32 sig_id, u32 error_count,
@@ -57,6 +115,67 @@ static void xe_cper_init_intel_err_hdr(struct xe_device *xe,
 	/* TODO: fill fw_id and set XE_CPER_VALID_FW_ID */
 }
 
+static void xe_cper_record_emit(struct xe_device *xe, u8 severity,
+				const guid_t *notification_type,
+				const struct xe_cper_sec_intel_err_hdr *ihdr,
+				const void *einfo, u32 einfo_len)
+{
+	struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
+	const guid_t *platform_id = lookup_platform_id(pdev);
+	u32 total_len = sizeof(struct xe_cper_nonstd_record) + einfo_len;
+	struct cper_section_descriptor *sdesc;
+	struct cper_record_header *rhdr;
+	struct xe_cper_nonstd_record *rec;
+
+	rec = kzalloc(total_len, GFP_KERNEL);
+	if (!rec)
+		return;
+
+	rhdr = &rec->record_hdr;
+	sdesc = &rec->section_desc;
+
+	/* Assemble the CPER record header (UEFI Appendix N.2.1) */
+	memcpy(rhdr->signature, CPER_SIG_RECORD, CPER_SIG_SIZE);
+	rhdr->revision          = CPER_RECORD_REV;
+	rhdr->signature_end     = CPER_SIG_END;
+	rhdr->section_count     = 1;
+	rhdr->error_severity    = severity;
+	rhdr->validation_bits   = CPER_VALID_TIMESTAMP;
+	rhdr->record_length     = total_len;
+	rhdr->timestamp         = cper_timestamp_now();
+	if (platform_id) {
+		rhdr->platform_id      = *platform_id;
+		rhdr->validation_bits |= CPER_VALID_PLATFORM_ID;
+	}
+	rhdr->creator_id        = INTEL_CPER_CREATOR_XEKMD;
+	rhdr->notification_type = *notification_type;
+	rhdr->record_id         = cper_next_record_id();
+
+	/* Assemble the section descriptor (UEFI Appendix N.2.2) */
+	sdesc->section_offset   = sizeof(struct cper_record_header) +
+				  sizeof(struct cper_section_descriptor);
+	sdesc->section_length   = sizeof(struct xe_cper_sec_intel_err_hdr) + einfo_len;
+	sdesc->revision         = CPER_SEC_REV;
+	sdesc->validation_bits  = 0;
+	sdesc->section_type     = INTEL_CPER_SECTION_ACCEL_GENERIC;
+	if (xe->info.has_device_uid) {
+		memcpy(&sdesc->fru_id, &xe->device_uid, sizeof(xe->device_uid));
+		sdesc->validation_bits |= CPER_SEC_VALID_FRU_ID;
+	}
+	sdesc->section_severity = severity;
+
+	/* Copy the Intel-specific section header */
+	rec->intel_hdr = *ihdr;
+
+	/* Append optional variable-length error info */
+	if (einfo && einfo_len)
+		memcpy((u8 *)rec + sizeof(*rec), einfo, einfo_len);
+
+	/* TODO: Emit trace event */
+
+	kfree(rec);
+}
+
 static void xe_cper_emit_hw_err(struct xe_device *xe, int cper_sev, enum xe_sigid sigid,
 				const struct xe_ras_error_class *error_class)
 {
@@ -74,6 +193,9 @@ static void xe_cper_emit_hw_err(struct xe_device *xe, int cper_sev, enum xe_sigi
 
 	xe_cper_init_intel_err_hdr(xe, error_class, local_resp.timestamp,
 				   sigid, local_resp.value, &ihdr);
+
+	xe_cper_record_emit(xe, cper_sev, &INTEL_CPER_NOTIFY_GPU_ERROR,
+			    &ihdr, NULL, 0);
 }
 
 /**
diff --git a/drivers/gpu/drm/xe/xe_cper_types.h b/drivers/gpu/drm/xe/xe_cper_types.h
index 74307e7f78a2..7612518c9d47 100644
--- a/drivers/gpu/drm/xe/xe_cper_types.h
+++ b/drivers/gpu/drm/xe/xe_cper_types.h
@@ -6,7 +6,9 @@
 #ifndef _XE_CPER_TYPES_H_
 #define _XE_CPER_TYPES_H_
 
+#include <linux/cper.h>
 #include <linux/types.h>
+#include <linux/uuid.h>
 
 /*
  * Validation bits definition for validation_bits in struct
@@ -20,6 +22,28 @@
 #define XE_CPER_VALID_DRV_VERSION	0x0010
 #define XE_CPER_VALID_FW_ID		0x0020
 
+/*
+ * Intel CPER GUID Namespace — RFC 9562 UUIDv5 (SHA-1 name-based)
+ *
+ * All values below are generated deterministically by uuid generator.
+ * Do not hand-edit the byte values.
+ */
+
+/* Creator IDs */
+#define INTEL_CPER_CREATOR_XEKMD \
+	GUID_INIT(0x9a42070f, 0xdf9d, 0x555e, \
+		  0xba, 0x02, 0x7c, 0xbc, 0x86, 0x3d, 0x37, 0x1c)
+
+/* Notification Types */
+#define INTEL_CPER_NOTIFY_GPU_ERROR \
+	GUID_INIT(0x4ae12aef, 0x8745, 0x5fc7, \
+		  0xb9, 0x96, 0x71, 0xee, 0xbb, 0x51, 0xf2, 0x23)
+
+/* Section Types */
+#define INTEL_CPER_SECTION_ACCEL_GENERIC \
+	GUID_INIT(0xea9d8f84, 0x4258, 0x5227, \
+		  0x80, 0x28, 0xb9, 0xb1, 0x3e, 0x6d, 0x58, 0xb0)
+
 #pragma pack(push, 1)
 
 /**
@@ -67,6 +91,35 @@ struct xe_cper_sec_intel_err_hdr {
 	u8 reserved[5];
 };
 
+/**
+ * struct xe_cper_nonstd_record - Intel GPU CPER record
+ *
+ * Contains the standard CPER record header, section descriptor, and the
+ * Intel error section header.
+ */
+struct xe_cper_nonstd_record {
+	/** @record_hdr: Standard CPER record header (UEFI Appendix N.2.1) */
+	struct cper_record_header record_hdr;
+	/** @section_desc: CPER section descriptor */
+	struct cper_section_descriptor section_desc;
+	/** @intel_hdr: Intel-specific error section header */
+	struct xe_cper_sec_intel_err_hdr intel_hdr;
+};
+
 #pragma pack(pop)
 
+/**
+ * struct xe_platform_id_entry - Mapping from PCI device ID to CPER platform GUID
+ *
+ * Used to resolve the platform_id field in a CPER section descriptor.
+ * GUIDs are UUIDv5 (RFC 9562, SHA-1) derived from the Intel CPER namespace
+ * with name string "platform/8086:<dev_id_hex_lower>".
+ */
+struct xe_platform_id_entry {
+	/** @device_id: PCI device ID */
+	u16       device_id;
+	/** @platform_id: Corresponding UUIDv5 platform GUID */
+	guid_t    platform_id;
+};
+
 #endif
-- 
2.54.0

[PATCH v4 05/12] drm/xe/xe_ras: Add support to retrieve info queue data for CRI

[Badal Nilawar]

Retrieve the RAS info queue data, in multiple chunks, and assemble it into
a flat buffer. A follow-up patch will use this data to prepare the CPER
error info.

Assisted-by: Copilot:Claude-Opus-5.5
Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
---
v4:
 - Simplify info queue handling and validation (Raag)
 - Clean up info queue naming and definitions (Raag)
 - Validate each chunk against the requested offset
---
 drivers/gpu/drm/xe/xe_ras.c                   | 117 +++++++++++++++++
 drivers/gpu/drm/xe/xe_ras.h                   |   3 +
 drivers/gpu/drm/xe/xe_ras_types.h             | 118 +++++++++++++++++-
 drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h |   2 +
 4 files changed, 238 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
index 5cfc9beff8c1..900319938fe5 100644
--- a/drivers/gpu/drm/xe/xe_ras.c
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -788,6 +788,123 @@ int xe_ras_set_threshold(struct xe_device *xe, u8 severity, u8 component, u32 th
 	return 0;
 }
 
+static int get_info_queue_data(struct xe_device *xe,
+			       struct xe_ras_get_info_queue_request *req,
+			       struct xe_ras_get_info_queue_response *out)
+{
+	struct xe_ras_get_info_queue_response response = {0};
+	struct xe_sysctrl_mailbox_command command = {0};
+	const struct xe_ras_info_queue_header *hdr;
+	size_t rlen;
+	int ret;
+
+	xe_sysctrl_create_command(&command, XE_SYSCTRL_GROUP_GFSP, XE_SYSCTRL_CMD_GET_INFO_QUEUE,
+				  req, sizeof(*req), &response, sizeof(response));
+
+	ret = xe_sysctrl_send_command(&xe->sc, &command, &rlen);
+	if (ret) {
+		xe_err(xe, "sysctrl: failed to get info queue data %d\n", ret);
+		return ret;
+	}
+
+	if (rlen != sizeof(response)) {
+		xe_err(xe, "sysctrl: unexpected get info queue data response length %zu (expected %zu)\n",
+		       rlen, sizeof(response));
+		return -EIO;
+	}
+
+	hdr = &response.queue_response.header;
+	xe_dbg(xe, "[RAS]: info queue data: status=%u chunk_size=%u flags=0x%x\n",
+	       response.operation_status, hdr->chunk_size, hdr->flags);
+
+	*out = response;
+	return 0;
+}
+
+static bool chunk_is_valid(const struct xe_ras_info_queue_header *hdr,
+			   u32 expected_offset, u32 dest_size)
+{
+	u32 end;
+
+	return hdr->chunk_offset == expected_offset &&
+	       hdr->chunk_size && hdr->chunk_size <= XE_RAS_INFO_QUEUE_MAX_CHUNK_SIZE &&
+	       !check_add_overflow(hdr->chunk_offset, hdr->chunk_size, &end) &&
+	       end <= XE_RAS_INFO_QUEUE_MAX_TOTAL_SIZE && end <= dest_size;
+}
+
+/**
+ * xe_ras_drain_info_queue_raw() - Drain the full RAS info queue into a flat buffer
+ * @xe: xe device
+ * @counter_resp: counter response carrying the first embedded chunk and the
+ *                counter identifier used as the source context for subsequent
+ *                GET_INFO_QUEUE fetches
+ * @dest_buf: destination buffer supplied by the caller
+ * @dest_size: size of @dest_buf in bytes; also caps the total amount of data
+ *             assembled from the info queue
+ *
+ * Copies the first chunk already embedded in @counter_resp, then loops
+ * issuing GET_INFO_QUEUE to fetch any remaining chunks until the queue
+ * signals no more data or a transport/bounds error is encountered.  On
+ * transport or bounds errors the function stops and returns whatever has
+ * been assembled so far.
+ *
+ * Returns: number of valid bytes written into @dest_buf.  Zero if @dest_buf is
+ *          NULL or @dest_size is 0.
+ */
+u32 xe_ras_drain_info_queue_raw(struct xe_device *xe,
+				const struct xe_ras_get_counter_response *counter_resp,
+				u8 *dest_buf, u32 dest_size)
+{
+	const struct xe_ras_info_queue_header *first_hdr = &counter_resp->first.header;
+	struct xe_ras_get_info_queue_request req = {0};
+	struct xe_ras_get_info_queue_response resp;
+	u32 flags = first_hdr->flags;
+	u32 offset = 0;
+
+	if (!dest_buf || !dest_size)
+		return 0;
+
+	if (first_hdr->total_size > dest_size)
+		xe_warn(xe, "[RAS]: info queue size %u exceeds %u, truncating\n",
+			first_hdr->total_size, dest_size);
+
+	/* Copy first chunk already embedded in the counter response */
+	if (chunk_is_valid(first_hdr, offset, dest_size)) {
+		memcpy(dest_buf, counter_resp->first.data, first_hdr->chunk_size);
+		offset = first_hdr->chunk_size;
+	}
+
+	req.source_command = XE_SYSCTRL_CMD_GET_COUNTER;
+	req.source_context = counter_resp->counter;
+	req.queue_request.session_id = counter_resp->counter;
+
+	/* Fetch any remaining chunks */
+	while ((flags & XE_RAS_INFO_QUEUE_FLAG_MORE_DATA) && offset < dest_size) {
+		const struct xe_ras_info_queue_header *hdr = &resp.queue_response.header;
+
+		req.queue_request.offset = offset;
+		req.queue_request.size = min(XE_RAS_INFO_QUEUE_MAX_CHUNK_SIZE, dest_size - offset);
+
+		if (get_info_queue_data(xe, &req, &resp)) {
+			xe_err(xe, "[RAS]: info queue drain aborted: fetch at offset=%u failed\n",
+			       offset);
+			return offset;
+		}
+
+		if (!chunk_is_valid(hdr, offset, dest_size)) {
+			xe_warn(xe, "[RAS]: invalid info queue chunk (offset=%u size=%u, expected offset=%u)\n",
+				hdr->chunk_offset, hdr->chunk_size, offset);
+			return offset;
+		}
+
+		memcpy(dest_buf + offset, resp.queue_response.data, hdr->chunk_size);
+		offset += hdr->chunk_size;
+		flags = hdr->flags;
+	}
+
+	return min(offset, first_hdr->total_size);
+}
+
 static ssize_t gpu_health_show(struct device *dev, struct device_attribute *attr, char *buf)
 {
 	struct xe_ras_get_health_response response = {0};
diff --git a/drivers/gpu/drm/xe/xe_ras.h b/drivers/gpu/drm/xe/xe_ras.h
index 84700ea63394..27ce6265ace5 100644
--- a/drivers/gpu/drm/xe/xe_ras.h
+++ b/drivers/gpu/drm/xe/xe_ras.h
@@ -22,5 +22,8 @@ void xe_ras_init(struct xe_device *xe);
 enum xe_ras_recovery_action xe_ras_process_errors(struct xe_device *xe);
 int xe_ras_get_counter_response(struct xe_device *xe, const struct xe_ras_error_class *counter,
 				struct xe_ras_get_counter_response *out);
+u32 xe_ras_drain_info_queue_raw(struct xe_device *xe,
+				const struct xe_ras_get_counter_response *counter_resp,
+				u8 *dest_buf, u32 dest_size);
 
 #endif
diff --git a/drivers/gpu/drm/xe/xe_ras_types.h b/drivers/gpu/drm/xe/xe_ras_types.h
index fe6f3658a2a4..9901fd034e3f 100644
--- a/drivers/gpu/drm/xe/xe_ras_types.h
+++ b/drivers/gpu/drm/xe/xe_ras_types.h
@@ -17,6 +17,10 @@
 #define XE_RAS_MEMORY_POISON			BIT(2)
 #define XE_RAS_MEMORY_DATA_PARITY		BIT(5)
 
+#define XE_RAS_INFO_QUEUE_MAX_CHUNK_SIZE	200
+#define XE_RAS_INFO_QUEUE_MAX_TOTAL_SIZE	5120
+#define XE_RAS_INFO_QUEUE_FLAG_MORE_DATA	0x02
+
 /**
  * enum xe_ras_recovery_action - RAS recovery actions
  *
@@ -95,6 +99,110 @@ struct xe_ras_threshold_crossed {
 	struct xe_ras_error_class counters[XE_RAS_NUM_COUNTERS];
 } __packed;
 
+/**
+ * struct xe_ras_info_queue_header - Metadata for large info queue data transfers
+ *
+ * Provides chunk metadata for commands that support extended info queue
+ * functionality. Used when the total data exceeds a single mailbox response.
+ */
+struct xe_ras_info_queue_header {
+	/** @total_size: Total size of the complete info queue data in bytes */
+	u32 total_size;
+	/** @chunk_offset: Offset of this chunk within the total data in bytes */
+	u32 chunk_offset;
+	/** @chunk_size: Size of the data in this chunk in bytes */
+	u32 chunk_size;
+	/** @reserved0: Reserved for future use */
+	u32 reserved0;
+	/** @flags: Info queue control flags (XE_RAS_INFO_QUEUE_FLAG_*) */
+	u32 flags:8;
+	/** @reserved1: Reserved for future use */
+	u32 reserved1:4;
+	/** @num_headers: Number of detailed counter headers at start of the data */
+	u32 num_headers:5;
+	/** @reserved2: Reserved for future use */
+	u32 reserved2:15;
+	/** @checksum: CRC32 checksum of this chunk data */
+	u32 checksum;
+} __packed;
+
+/**
+ * struct xe_ras_info_queue_data_request - Request for a specific chunk of info queue data
+ *
+ * Allows the driver to request continuation of large info queue transfers
+ * by specifying an offset and size within the full data set.
+ */
+struct xe_ras_info_queue_data_request {
+	/** @offset: Byte offset of the requested data chunk */
+	u32 offset;
+	/** @size: Maximum size of the requested chunk in bytes */
+	u32 size;
+	/** @session_id: Session ID to correlate multi-chunk transfers */
+	struct xe_ras_error_class session_id;
+	/** @reserved: Reserved for future use */
+	u32 reserved;
+} __packed;
+
+/**
+ * struct xe_ras_info_queue_data_response - Generic response for commands with info queues
+ *
+ * Standard response format for any command that returns an info queue
+ * payload. May be embedded in a command-specific response structure.
+ */
+struct xe_ras_info_queue_data_response {
+	/** @header: Info queue metadata for this chunk */
+	struct xe_ras_info_queue_header header;
+	/** @data: Info queue data for this chunk */
+	u8 data[XE_RAS_INFO_QUEUE_MAX_CHUNK_SIZE];
+} __packed;
+
+/**
+ * struct xe_ras_info_queue_dynamic_counter_hdr - Aggregate counter header entry
+ *
+ * When a session requests aggregate counter data, one header per matching
+ * dynamic counter class is prepended to the queue data. The @counter field
+ * is the error count of this class; at most XE_RAS_NUM_COUNTERS error log
+ * entries follow for it.
+ */
+struct xe_ras_info_queue_dynamic_counter_hdr {
+	/** @error_class: Error class associated with this counter group */
+	struct xe_ras_error_class error_class;
+	/** @counter: Error count of this class */
+	u32 counter;
+} __packed;
+
+/**
+ * struct xe_ras_error_log - Single error log entry following dynamic counter headers
+ */
+struct xe_ras_error_log {
+	/** @timestamp: Timestamp when the error was recorded */
+	u64 timestamp;
+	/** @error_details: Error-specific details */
+	u32 error_details[16];
+} __packed;
+
+/**
+ * struct xe_ras_get_info_queue_request - Request for XE_SYSCTRL_CMD_GET_INFO_QUEUE
+ */
+struct xe_ras_get_info_queue_request {
+	/** @queue_request: Info queue request parameters */
+	struct xe_ras_info_queue_data_request queue_request;
+	/** @source_command: Original command that generated the info queue */
+	u32 source_command;
+	/** @source_context: Context from original command, if applicable */
+	struct xe_ras_error_class source_context;
+} __packed;
+
+/**
+ * struct xe_ras_get_info_queue_response - Response for XE_SYSCTRL_CMD_GET_INFO_QUEUE
+ */
+struct xe_ras_get_info_queue_response {
+	/** @operation_status: Status of the retrieval operation */
+	u32 operation_status;
+	/** @queue_response: Info queue data chunk */
+	struct xe_ras_info_queue_data_response queue_response;
+} __packed;
+
 /**
  * struct xe_ras_get_counter_request - Request structure for get counter
  */
@@ -117,8 +225,14 @@ struct xe_ras_get_counter_response {
 	u64 timestamp;
 	/** @threshold: Threshold value for the counter */
 	u32 threshold;
-	/** @reserved: Reserved  */
-	u32 reserved[57];
+	/** @reserved: Reserved for future use */
+	u32 reserved:9;
+	/** @has_info_queue: Set if info queue is available */
+	u32 has_info_queue:1;
+	/** @reserved1: Reserved for future use */
+	u32 reserved1:22;
+	/** @first: First info queue chunk, if @has_info_queue is set */
+	struct xe_ras_info_queue_data_response first;
 } __packed;
 
 /**
diff --git a/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
index a0628eb47bff..299d12b94574 100644
--- a/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
+++ b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
@@ -34,6 +34,7 @@ enum xe_sysctrl_group {
  * @XE_SYSCTRL_CMD_GET_PENDING_EVENT: Retrieve pending event
  * @XE_SYSCTRL_CMD_GET_HEALTH: Retrieve gpu health
  * @XE_SYSCTRL_CMD_SET_HEALTH: Set gpu health
+ * @XE_SYSCTRL_CMD_GET_INFO_QUEUE: Retrieve a chunk of info queue data
  */
 enum xe_sysctrl_gfsp_cmd {
 	XE_SYSCTRL_CMD_GET_SOC_ERROR		= 0x01,
@@ -44,6 +45,7 @@ enum xe_sysctrl_gfsp_cmd {
 	XE_SYSCTRL_CMD_GET_PENDING_EVENT	= 0x07,
 	XE_SYSCTRL_CMD_GET_HEALTH		= 0x0B,
 	XE_SYSCTRL_CMD_SET_HEALTH		= 0x0C,
+	XE_SYSCTRL_CMD_GET_INFO_QUEUE		= 0x0D,
 };
 
 /**
-- 
2.54.0

[PATCH v4 06/12] drm/xe/cper: Prepare Intel CPER error info records

[Badal Nilawar]

Prepare xe_cper_sec_intel_error_info records from RAS info queue data.
Depending on the error class type, detail or aggregate, one or more error
info records may be generated and embedded in the CPER record.

Assisted-by: Copilot:Claude-Opus-5.5
Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
---
v4:
 - Move struct xe_cper_einfo_entry to xe_cper_types.h (Raag)
 - Use kzalloc_flex()/kzalloc_objs() (Raag)
 - Allocate info queue buffer from reported total size (Raag)
---
 drivers/gpu/drm/xe/xe_cper.c       | 247 +++++++++++++++++++++++++++--
 drivers/gpu/drm/xe/xe_cper_types.h |  54 ++++++-
 2 files changed, 290 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_cper.c b/drivers/gpu/drm/xe/xe_cper.c
index 1000c78b41e9..7acb503efd11 100644
--- a/drivers/gpu/drm/xe/xe_cper.c
+++ b/drivers/gpu/drm/xe/xe_cper.c
@@ -78,16 +78,22 @@ static u64 cper_timestamp_now(void)
 	return ts;
 }
 
+static void fill_cper_error_class(struct xe_cper_error_class *dst,
+				  const struct xe_ras_error_class *src)
+{
+	dst->error_type = src->common.severity;
+	dst->error_component = src->common.component;
+	dst->tile = src->product.unit.tile;
+	dst->instance = src->product.unit.instance;
+	dst->cause = src->product.cause.cause;
+}
+
 static void xe_cper_init_intel_err_hdr(struct xe_device *xe,
 				       const struct xe_ras_error_class *error_class,
 				       u64 first_timestamp, u32 sig_id, u32 error_count,
 				       struct xe_cper_sec_intel_err_hdr *ihdr)
 {
-	ihdr->error_class.error_type = error_class->common.severity;
-	ihdr->error_class.error_component = error_class->common.component;
-	ihdr->error_class.tile = error_class->product.unit.tile;
-	ihdr->error_class.instance = error_class->product.unit.instance;
-	ihdr->error_class.cause = error_class->product.cause.cause;
+	fill_cper_error_class(&ihdr->error_class, error_class);
 	ihdr->validation_bits |= XE_CPER_VALID_LOCATION;
 
 	if (first_timestamp) {
@@ -176,11 +182,209 @@ static void xe_cper_record_emit(struct xe_device *xe, u8 severity,
 	kfree(rec);
 }
 
+/* Entries built from RAS error logs carry fixed-size error_details */
+#define XE_CPER_RAS_LOG_ENTRY_SIZE \
+	(offsetof(struct xe_intel_priv_event_entry, metadata) + \
+	 sizeof_field(struct xe_ras_error_log, error_details))
+
+static struct xe_cper_sec_intel_error_info *
+build_einfo(const struct xe_ras_error_log *logs, u32 num_logs,
+	    const struct xe_ras_error_class *ec, u32 error_count)
+{
+	u32 queue_len = num_logs * XE_CPER_RAS_LOG_ENTRY_SIZE;
+	struct xe_cper_sec_intel_error_info *einfo;
+	struct xe_intel_priv_event_entry *entry;
+	u32 i;
+
+	einfo = kzalloc_flex(*einfo, event_queue, queue_len);
+	if (!einfo)
+		return NULL;
+
+	einfo->error_count        = error_count;
+	einfo->event_queue_length = queue_len;
+	einfo->event_queue_count  = num_logs;
+	fill_cper_error_class(&einfo->error_class, ec);
+
+	entry = (struct xe_intel_priv_event_entry *)einfo->event_queue;
+	for (i = 0; i < num_logs; i++) {
+		entry->entry_length = sizeof_field(struct xe_ras_error_log, error_details);
+		entry->timestamp    = logs[i].timestamp;
+		memcpy(entry->metadata, logs[i].error_details, sizeof(logs[i].error_details));
+		entry = (void *)entry + XE_CPER_RAS_LOG_ENTRY_SIZE;
+	}
+
+	return einfo;
+}
+
+static void free_einfo_arr(struct xe_cper_einfo_entry *einfo_arr, u32 count)
+{
+	u32 i;
+
+	for (i = 0; i < count; i++)
+		kfree(einfo_arr[i].einfo);
+	kfree(einfo_arr);
+}
+
+static bool fill_einfo_entry(struct xe_cper_einfo_entry *entry,
+			     const struct xe_ras_info_queue_dynamic_counter_hdr *hdr,
+			     const struct xe_ras_error_log *logs, u32 num_logs)
+{
+	entry->einfo = build_einfo(logs, num_logs, &hdr->error_class, hdr->counter);
+	if (!entry->einfo)
+		return false;
+
+	entry->einfo_size = struct_size(entry->einfo, event_queue,
+					entry->einfo->event_queue_length);
+	/* The first log is the first occurrence of the error */
+	entry->timestamp = logs[0].timestamp;
+	entry->hdr = *hdr;
+	return true;
+}
+
+static u32 build_detail_einfo(const struct xe_ras_error_class *error_class, u32 error_count,
+			      const struct xe_ras_error_log *logs, u32 num_logs,
+			      struct xe_cper_einfo_entry *einfo_arr)
+{
+	/* All logs belong to the queried class; the error count may exceed the logs kept */
+	const struct xe_ras_info_queue_dynamic_counter_hdr hdr = {
+		.error_class = *error_class,
+		.counter = error_count,
+	};
+
+	if (!num_logs)
+		return 0;
+
+	return fill_einfo_entry(&einfo_arr[0], &hdr, logs, num_logs) ? 1 : 0;
+}
+
+static u32 build_aggregate_einfo(struct xe_device *xe,
+				 const struct xe_ras_info_queue_dynamic_counter_hdr *hdrs,
+				 u32 num_hdrs, const struct xe_ras_error_log *logs,
+				 u32 avail_logs, struct xe_cper_einfo_entry *einfo_arr)
+{
+	u32 log_offset = 0, count = 0, i;
+
+	for (i = 0; i < num_hdrs; i++) {
+		/* @counter is the error count; firmware logs at most XE_RAS_NUM_COUNTERS */
+		u32 num_logs = min_t(u32, hdrs[i].counter, XE_RAS_NUM_COUNTERS);
+
+		if (num_logs > avail_logs - log_offset) {
+			xe_warn(xe, "CPER: header[%u] claims %u logs but only %u remain\n",
+				i, num_logs, avail_logs - log_offset);
+			break;
+		}
+
+		if (!num_logs)
+			continue;
+
+		if (!fill_einfo_entry(&einfo_arr[count], &hdrs[i], &logs[log_offset], num_logs))
+			break;
+
+		log_offset += num_logs;
+		count++;
+	}
+
+	return count;
+}
+
+/**
+ * xe_prepare_cper_error_info() - Build the CPER error info records from RAS info queue data
+ * @xe: xe device instance
+ * @counter_resp: counter response containing the first embedded chunk
+ * @error_class: RAS error class used to populate the einfo error_class fields
+ * @count_out: output number of entries in the returned array
+ *
+ * Assembles the complete raw info queue data from the first chunk already
+ * embedded in @counter_resp and any additional chunks fetched via
+ * GET_INFO_QUEUE.  Two use cases are supported based on num_headers in
+ * the info queue header:
+ *
+ * Detail error counter (num_headers == 0)::
+ *
+ *   [xe_ras_error_log * N]
+ *
+ *   Returns one xe_cper_einfo_entry covering all N logs.
+ *
+ * Aggregate error counter (num_headers > 0)::
+ *
+ *   [xe_ras_info_queue_dynamic_counter_hdr * num_headers]
+ *   [xe_ras_error_log * N]
+ *
+ *   Returns one xe_cper_einfo_entry per header.  Each header's @counter field
+ *   is the error count of its class; at most XE_RAS_NUM_COUNTERS
+ *   xe_ras_error_log entries follow it and its @error_class is used to
+ *   populate the entry's einfo->error_class.
+ *
+ * Returns: allocated xe_cper_einfo_entry array on success (caller must free it
+ *          with free_einfo_arr()), NULL if no error info could be built.
+ *          @count_out is set to the number of entries in the array.
+ */
+static struct xe_cper_einfo_entry *
+xe_prepare_cper_error_info(struct xe_device *xe,
+			   const struct xe_ras_get_counter_response *counter_resp,
+			   const struct xe_ras_error_class *error_class,
+			   u32 *count_out)
+{
+	const struct xe_ras_info_queue_header *first_qhdr = &counter_resp->first.header;
+	struct xe_cper_einfo_entry *einfo_arr = NULL;
+	const struct xe_ras_error_log *logs;
+	u32 buf_size, raw_total, num_headers, headers_size;
+	u32 avail_logs, count = 0;
+	u8 *raw_buf = NULL;
+
+	if (!first_qhdr->total_size) {
+		xe_warn(xe, "CPER: info queue reports zero total size\n");
+		goto out;
+	}
+
+	buf_size = min(first_qhdr->total_size, XE_RAS_INFO_QUEUE_MAX_TOTAL_SIZE);
+	raw_buf = kzalloc_objs(*raw_buf, buf_size);
+	if (!raw_buf)
+		goto out;
+
+	raw_total = xe_ras_drain_info_queue_raw(xe, counter_resp, raw_buf, buf_size);
+	if (!raw_total)
+		goto out;
+
+	num_headers = first_qhdr->num_headers;
+	headers_size = num_headers * sizeof(struct xe_ras_info_queue_dynamic_counter_hdr);
+	if (headers_size > raw_total) {
+		xe_warn(xe, "CPER: aggregate headers size (%u) exceeds raw total (%u)\n",
+			headers_size, raw_total);
+		goto out;
+	}
+
+	logs = (const struct xe_ras_error_log *)(raw_buf + headers_size);
+	avail_logs = (raw_total - headers_size) / sizeof(*logs);
+
+	einfo_arr = kzalloc_objs(*einfo_arr, num_headers ?: 1);
+	if (!einfo_arr)
+		goto out;
+
+	if (num_headers)
+		count = build_aggregate_einfo(xe, (const void *)raw_buf, num_headers,
+					      logs, avail_logs, einfo_arr);
+	else
+		count = build_detail_einfo(error_class, counter_resp->value,
+					   logs, avail_logs, einfo_arr);
+
+	if (!count) {
+		kfree(einfo_arr);
+		einfo_arr = NULL;
+	}
+out:
+	kfree(raw_buf);
+	*count_out = count;
+	return einfo_arr;
+}
+
 static void xe_cper_emit_hw_err(struct xe_device *xe, int cper_sev, enum xe_sigid sigid,
 				const struct xe_ras_error_class *error_class)
 {
-	struct xe_cper_sec_intel_err_hdr ihdr = {};
+	struct xe_cper_einfo_entry *einfo_arr = NULL, *entries;
 	struct xe_ras_get_counter_response local_resp;
+	struct xe_cper_einfo_entry single = {};
+	u32 einfo_count = 0, count, i;
 
 	/* Fetching the counter sends a sysctrl command */
 	might_sleep();
@@ -191,11 +395,34 @@ static void xe_cper_emit_hw_err(struct xe_device *xe, int cper_sev, enum xe_sigi
 		return;
 	}
 
-	xe_cper_init_intel_err_hdr(xe, error_class, local_resp.timestamp,
-				   sigid, local_resp.value, &ihdr);
+	/* Without info queue data, emit a single record from the counter itself */
+	single.hdr.error_class = *error_class;
+	single.hdr.counter = local_resp.value;
+	single.timestamp = local_resp.timestamp;
+	entries = &single;
+	count = 1;
+
+	if (local_resp.has_info_queue) {
+		einfo_arr = xe_prepare_cper_error_info(xe, &local_resp, error_class, &einfo_count);
+		if (einfo_arr) {
+			entries = einfo_arr;
+			count = einfo_count;
+		} else {
+			xe_warn(xe, "CPER: failed to build error info from info queue, emitting record without it\n");
+		}
+	}
+
+	for (i = 0; i < count; i++) {
+		struct xe_cper_sec_intel_err_hdr ihdr = {};
+
+		xe_cper_init_intel_err_hdr(xe, &entries[i].hdr.error_class, entries[i].timestamp,
+					   sigid, entries[i].hdr.counter, &ihdr);
+
+		xe_cper_record_emit(xe, cper_sev, &INTEL_CPER_NOTIFY_GPU_ERROR, &ihdr,
+				    entries[i].einfo, entries[i].einfo_size);
+	}
 
-	xe_cper_record_emit(xe, cper_sev, &INTEL_CPER_NOTIFY_GPU_ERROR,
-			    &ihdr, NULL, 0);
+	free_einfo_arr(einfo_arr, einfo_count);
 }
 
 /**
diff --git a/drivers/gpu/drm/xe/xe_cper_types.h b/drivers/gpu/drm/xe/xe_cper_types.h
index 7612518c9d47..627c7117f23e 100644
--- a/drivers/gpu/drm/xe/xe_cper_types.h
+++ b/drivers/gpu/drm/xe/xe_cper_types.h
@@ -10,6 +10,8 @@
 #include <linux/types.h>
 #include <linux/uuid.h>
 
+#include "xe_ras_types.h"
+
 /*
  * Validation bits definition for validation_bits in struct
  * xe_cper_sec_intel_err_hdr. When set, corresponding fields in header
@@ -91,11 +93,47 @@ struct xe_cper_sec_intel_err_hdr {
 	u8 reserved[5];
 };
 
+/**
+ * struct xe_cper_sec_intel_error_info - Variable-length Intel GPU error payload
+ *
+ * Appended after &xe_cper_sec_intel_err_hdr when detailed per-event data
+ * is available. The @event_queue flexible array holds @event_queue_count
+ * packed &xe_intel_priv_event_entry records.
+ */
+struct xe_cper_sec_intel_error_info {
+	/** @error_class: Error classification */
+	struct xe_cper_error_class error_class;
+	/** @error_count: Total number of errors recorded */
+	u32 error_count;
+	/** @event_queue_length: Total byte size of the @event_queue array */
+	u32 event_queue_length;
+	/** @event_queue_count: Number of entries in @event_queue */
+	u32 event_queue_count;
+	/** @event_queue: Packed array of &xe_intel_priv_event_entry records */
+	u8 event_queue[];
+};
+
+/**
+ * struct xe_intel_priv_event_entry - Single error event in the event queue
+ *
+ * Each entry is variable-length; @entry_length gives the byte size of
+ * @metadata only (not including @entry_length or @timestamp).
+ */
+struct xe_intel_priv_event_entry {
+	/** @entry_length: Byte length of the @metadata payload */
+	u32 entry_length;
+	/** @timestamp: Timestamp of this event, in firmware ticks */
+	u64 timestamp;
+	/** @metadata: Event-specific payload bytes */
+	u8  metadata[];
+};
+
 /**
  * struct xe_cper_nonstd_record - Intel GPU CPER record
  *
  * Contains the standard CPER record header, section descriptor, and the
- * Intel error section header.
+ * Intel error section header. A &xe_cper_sec_intel_error_info payload
+ * may be appended dynamically.
  */
 struct xe_cper_nonstd_record {
 	/** @record_hdr: Standard CPER record header (UEFI Appendix N.2.1) */
@@ -122,4 +160,18 @@ struct xe_platform_id_entry {
 	guid_t    platform_id;
 };
 
+/**
+ * struct xe_cper_einfo_entry - One CPER error info payload and its source counter
+ */
+struct xe_cper_einfo_entry {
+	/** @hdr: Error class and counter value used for the CPER section header */
+	struct xe_ras_info_queue_dynamic_counter_hdr hdr;
+	/** @einfo: Allocated error info payload, NULL if none */
+	struct xe_cper_sec_intel_error_info *einfo;
+	/** @einfo_size: Byte size of @einfo including the event queue */
+	u32 einfo_size;
+	/** @timestamp: Timestamp of the first occurrence of this error class */
+	u64 timestamp;
+};
+
 #endif
-- 
2.54.0

[PATCH v4 07/12] drm/xe/cper: Log CPER records for aggregate counter retrieval

[Badal Nilawar]

Log CPER records for aggregate counter retrieval from userspace when
cper_on_query sysfs is enabled.

Assisted-by: Copilot:Claude-Opus-5.5
Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
---
v4:
 - Add xe_cper_emit_counter() to emit records from the counter response
   already fetched for userspace, instead of fetching it again
 - Move cper_on_query to struct xe_cper and xe_cper.c (Raag)
 - Document cper_on_query sysfs in ABI
 - Fix sysfs attribute cper_on_query permissions (sashiko)
---
 .../ABI/testing/sysfs-driver-intel-xe-cper    | 18 ++++
 drivers/gpu/drm/xe/xe_cper.c                  | 99 ++++++++++++++++---
 drivers/gpu/drm/xe/xe_cper.h                  | 11 +++
 drivers/gpu/drm/xe/xe_cper_types.h            |  8 ++
 drivers/gpu/drm/xe/xe_device_types.h          |  4 +
 drivers/gpu/drm/xe/xe_ras.c                   | 42 ++++++++
 6 files changed, 169 insertions(+), 13 deletions(-)
 create mode 100644 Documentation/ABI/testing/sysfs-driver-intel-xe-cper

diff --git a/Documentation/ABI/testing/sysfs-driver-intel-xe-cper b/Documentation/ABI/testing/sysfs-driver-intel-xe-cper
new file mode 100644
index 000000000000..19f56d2c0ab3
--- /dev/null
+++ b/Documentation/ABI/testing/sysfs-driver-intel-xe-cper
@@ -0,0 +1,18 @@
+What:		/sys/bus/pci/drivers/xe/.../cper_on_query
+Date:		October 2026
+KernelVersion:	7.4
+Contact:	intel-xe@lists.freedesktop.org
+Description:
+		This file controls whether a CPER (Common Platform Error Record)
+		is emitted each time a RAS error counter is queried.
+
+		This sysfs file is present only on Intel Xe platforms that support
+		the RAS error counter interface and when the kernel is built with
+		CPER support. Reading the current setting is available to all
+		users, while updating it is restricted to administrative users
+		only.
+
+		The value is a boolean. When set to 1, every counter query emits
+		a CPER record built from the counter and its associated info
+		queue data. When set to 0 (default), no record is emitted on
+		query.
diff --git a/drivers/gpu/drm/xe/xe_cper.c b/drivers/gpu/drm/xe/xe_cper.c
index 7acb503efd11..709fc3d52fcf 100644
--- a/drivers/gpu/drm/xe/xe_cper.c
+++ b/drivers/gpu/drm/xe/xe_cper.c
@@ -4,11 +4,13 @@
  */
 
 #include <linux/bcd.h>
+#include <linux/device.h>
 #include <linux/err.h>
 #include <linux/kernel.h>
 #include <linux/minmax.h>
 #include <linux/pci.h>
 #include <linux/slab.h>
+#include <linux/sysfs.h>
 #include <linux/time.h>
 #include <linux/timekeeping.h>
 
@@ -378,32 +380,41 @@ xe_prepare_cper_error_info(struct xe_device *xe,
 	return einfo_arr;
 }
 
-static void xe_cper_emit_hw_err(struct xe_device *xe, int cper_sev, enum xe_sigid sigid,
-				const struct xe_ras_error_class *error_class)
+/**
+ * xe_cper_emit_counter() - Emit CPER records for an already fetched error counter
+ * @xe: The &xe_device
+ * @cper_sev: CPER severity
+ * @sigid: Error signature identifier
+ * @error_class: RAS error class of the counter
+ * @resp: Counter response returned by firmware for @error_class
+ *
+ * Build and emit CPER records from @resp, including any info queue data.
+ * Must be called from a sleepable context with a runtime PM reference held.
+ */
+void xe_cper_emit_counter(struct xe_device *xe, int cper_sev, enum xe_sigid sigid,
+			  const struct xe_ras_error_class *error_class,
+			  const struct xe_ras_get_counter_response *resp)
 {
 	struct xe_cper_einfo_entry *einfo_arr = NULL, *entries;
-	struct xe_ras_get_counter_response local_resp;
 	struct xe_cper_einfo_entry single = {};
 	u32 einfo_count = 0, count, i;
 
-	/* Fetching the counter sends a sysctrl command */
+	if (!is_hw_sigid(sigid))
+		return;
+
+	/* Draining the info queue sends sysctrl commands */
 	might_sleep();
 	xe_device_assert_mem_access(xe);
 
-	if (xe_ras_get_counter_response(xe, error_class, &local_resp)) {
-		xe_err(xe, "CPER: failed to get counter, skipping record\n");
-		return;
-	}
-
 	/* Without info queue data, emit a single record from the counter itself */
 	single.hdr.error_class = *error_class;
-	single.hdr.counter = local_resp.value;
-	single.timestamp = local_resp.timestamp;
+	single.hdr.counter = resp->value;
+	single.timestamp = resp->timestamp;
 	entries = &single;
 	count = 1;
 
-	if (local_resp.has_info_queue) {
-		einfo_arr = xe_prepare_cper_error_info(xe, &local_resp, error_class, &einfo_count);
+	if (resp->has_info_queue) {
+		einfo_arr = xe_prepare_cper_error_info(xe, resp, error_class, &einfo_count);
 		if (einfo_arr) {
 			entries = einfo_arr;
 			count = einfo_count;
@@ -425,6 +436,23 @@ static void xe_cper_emit_hw_err(struct xe_device *xe, int cper_sev, enum xe_sigi
 	free_einfo_arr(einfo_arr, einfo_count);
 }
 
+static void xe_cper_emit_hw_err(struct xe_device *xe, int cper_sev, enum xe_sigid sigid,
+				const struct xe_ras_error_class *error_class)
+{
+	struct xe_ras_get_counter_response resp;
+
+	/* Fetching the counter sends a sysctrl command */
+	might_sleep();
+	xe_device_assert_mem_access(xe);
+
+	if (xe_ras_get_counter_response(xe, error_class, &resp)) {
+		xe_err(xe, "CPER: failed to get counter, skipping record\n");
+		return;
+	}
+
+	xe_cper_emit_counter(xe, cper_sev, sigid, error_class, &resp);
+}
+
 /**
  * xe_cper_emit() - Emit a CPER record for a SIGID log entry
  * @xe: The &xe_device
@@ -453,3 +481,48 @@ void xe_cper_emit(struct xe_device *xe, int cper_sev, enum xe_sigid sigid,
 
 	/* TODO software CPER */
 }
+
+static ssize_t cper_on_query_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+	struct xe_device *xe = kdev_to_xe_device(dev);
+
+	return sysfs_emit(buf, "%u\n", READ_ONCE(xe->cper.on_query));
+}
+
+static ssize_t cper_on_query_store(struct device *dev, struct device_attribute *attr,
+				   const char *buf, size_t count)
+{
+	struct xe_device *xe = kdev_to_xe_device(dev);
+	bool enable;
+	int ret;
+
+	ret = kstrtobool(buf, &enable);
+	if (ret)
+		return ret;
+
+	WRITE_ONCE(xe->cper.on_query, enable);
+
+	return count;
+}
+static DEVICE_ATTR_RW(cper_on_query);
+
+static struct attribute *cper_attrs[] = {
+	&dev_attr_cper_on_query.attr,
+	NULL
+};
+
+/* See Documentation/ABI/testing/sysfs-driver-intel-xe-cper */
+static const struct attribute_group cper_group = {
+	.attrs = cper_attrs,
+};
+
+/**
+ * xe_cper_sysfs_init() - Create the CPER sysfs attributes
+ * @xe: The &xe_device
+ *
+ * Return: 0 on success, negative error code on failure.
+ */
+int xe_cper_sysfs_init(struct xe_device *xe)
+{
+	return devm_device_add_group(xe->drm.dev, &cper_group);
+}
diff --git a/drivers/gpu/drm/xe/xe_cper.h b/drivers/gpu/drm/xe/xe_cper.h
index 84676c7645a5..ad50349c0a6f 100644
--- a/drivers/gpu/drm/xe/xe_cper.h
+++ b/drivers/gpu/drm/xe/xe_cper.h
@@ -12,15 +12,26 @@
 
 struct va_format;
 struct xe_device;
+struct xe_ras_error_class;
+struct xe_ras_get_counter_response;
 
 #if IS_ENABLED(CONFIG_UEFI_CPER)
 void xe_cper_emit(struct xe_device *xe, int cper_sev, enum xe_sigid sigid,
 		  u32 component, u32 location, const void *data, size_t len,
 		  struct va_format *vaf);
+void xe_cper_emit_counter(struct xe_device *xe, int cper_sev, enum xe_sigid sigid,
+			  const struct xe_ras_error_class *error_class,
+			  const struct xe_ras_get_counter_response *resp);
+int xe_cper_sysfs_init(struct xe_device *xe);
 #else
 static inline void xe_cper_emit(struct xe_device *xe, int cper_sev, enum xe_sigid sigid,
 				u32 component, u32 location, const void *data, size_t len,
 				struct va_format *vaf) {}
+static inline void xe_cper_emit_counter(struct xe_device *xe, int cper_sev,
+					enum xe_sigid sigid,
+					const struct xe_ras_error_class *error_class,
+					const struct xe_ras_get_counter_response *resp) {}
+static inline int xe_cper_sysfs_init(struct xe_device *xe) { return 0; }
 #endif
 
 #endif /* _XE_CPER_H_ */
diff --git a/drivers/gpu/drm/xe/xe_cper_types.h b/drivers/gpu/drm/xe/xe_cper_types.h
index 627c7117f23e..e0034429e661 100644
--- a/drivers/gpu/drm/xe/xe_cper_types.h
+++ b/drivers/gpu/drm/xe/xe_cper_types.h
@@ -174,4 +174,12 @@ struct xe_cper_einfo_entry {
 	u64 timestamp;
 };
 
+/**
+ * struct xe_cper - Xe CPER state
+ */
+struct xe_cper {
+	/** @on_query: Emit a CPER record on each RAS counter query */
+	bool on_query;
+};
+
 #endif
diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index 41f703a87916..d88e0768bc3e 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -12,6 +12,7 @@
 #include <drm/drm_file.h>
 #include <drm/ttm/ttm_device.h>
 
+#include "xe_cper_types.h"
 #include "xe_devcoredump_types.h"
 #include "xe_drm_ras_types.h"
 #include "xe_heci_gsc.h"
@@ -579,6 +580,9 @@ struct xe_device {
 	/** @ras: RAS structure for device */
 	struct xe_drm_ras ras;
 
+	/** @cper: CPER state */
+	struct xe_cper cper;
+
 	/** @i2c: I2C host controller */
 	struct xe_i2c *i2c;
 
diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
index 900319938fe5..25ea178228f7 100644
--- a/drivers/gpu/drm/xe/xe_ras.c
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -4,6 +4,7 @@
  */
 
 #include "xe_configfs.h"
+#include "xe_cper.h"
 #include "xe_debugfs.h"
 #include "xe_device.h"
 #include "xe_drm_ras.h"
@@ -183,6 +184,38 @@ static int ras_status_to_errno(u32 status)
 	}
 }
 
+static enum xe_sigid ras_comp_to_hw_sigid(u8 component)
+{
+	switch (component) {
+	case XE_RAS_COMP_DEVICE_MEMORY:
+		return XE_SIGID_DEVICE_MEMORY;
+	case XE_RAS_COMP_CORE_COMPUTE:
+		return XE_SIGID_CORE_COMPUTE;
+	case XE_RAS_COMP_PCIE:
+		return XE_SIGID_PCIE;
+	case XE_RAS_COMP_FABRIC:
+		return XE_SIGID_FABRIC;
+	case XE_RAS_COMP_SOC_INTERNAL:
+		return XE_SIGID_SOC_INTERNAL;
+	default:
+		return XE_SIGID_HW;
+	}
+}
+
+static u8 ras_sev_to_cper_sev(u8 ras_sev)
+{
+	switch (ras_sev) {
+	case XE_RAS_SEV_CORRECTABLE:
+		return CPER_SEV_CORRECTED;
+	case XE_RAS_SEV_UNCORRECTABLE:
+		return CPER_SEV_RECOVERABLE;
+	case XE_RAS_SEV_INFORMATIONAL:
+		return CPER_SEV_INFORMATIONAL;
+	default:
+		return CPER_SEV_RECOVERABLE;
+	}
+}
+
 static inline const char *sev_to_str(u8 severity)
 {
 	if (severity >= XE_RAS_SEV_MAX)
@@ -616,6 +649,11 @@ int xe_ras_get_counter(struct xe_device *xe, u8 severity, u8 component, u32 *val
 		return ret;
 
 	*value = response.value;
+
+	if (READ_ONCE(xe->cper.on_query))
+		xe_cper_emit_counter(xe, ras_sev_to_cper_sev(counter.common.severity),
+				     ras_comp_to_hw_sigid(counter.common.component),
+				     &counter, &response);
 	return 0;
 }
 
@@ -1067,4 +1105,8 @@ void xe_ras_init(struct xe_device *xe)
 	ret = devm_device_add_group(xe->drm.dev, &gpu_health_group);
 	if (ret)
 		xe_err(xe, "Failed to create GPU health sysfs, err=%d\n", ret);
+
+	ret = xe_cper_sysfs_init(xe);
+	if (ret)
+		xe_err(xe, "Failed to create cper_on_query sysfs, err=%d\n", ret);
 }
-- 
2.54.0

[PATCH v4 08/12] drm/xe/cper: Emit cper record to trace buf

[Badal Nilawar]

Add the xe_error_cper tracepoint and emit each assembled CPER record
through it. Besides the raw record, the event carries the device name,
platform ID, FRU ID, severity and the Intel error section header, so
tools can pick up the records from the trace buffer.

Assisted-by: Copilot:claude-sonnet-4.6
Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
---
v4:
 - Build xe_trace_cper.o with CONFIG_UEFI_CPER instead of
   CONFIG_UEFI_CPER_X86
---
 drivers/gpu/drm/xe/Makefile        |  3 +-
 drivers/gpu/drm/xe/xe_cper.c       |  4 +-
 drivers/gpu/drm/xe/xe_trace_cper.c |  9 ++++
 drivers/gpu/drm/xe/xe_trace_cper.h | 66 ++++++++++++++++++++++++++++++
 4 files changed, 80 insertions(+), 2 deletions(-)
 create mode 100644 drivers/gpu/drm/xe/xe_trace_cper.c
 create mode 100644 drivers/gpu/drm/xe/xe_trace_cper.h

diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index da78026b0bb4..5458119ddf40 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -168,7 +168,8 @@ xe-$(CONFIG_HWMON) += xe_hwmon.o
 xe-$(CONFIG_PERF_EVENTS) += xe_pmu.o
 xe-$(CONFIG_CONFIGFS_FS) += xe_configfs.o
 
-xe-$(CONFIG_UEFI_CPER) += xe_cper.o
+xe-$(CONFIG_UEFI_CPER) += xe_cper.o \
+			  xe_trace_cper.o
 
 # graphics virtualization (SR-IOV) support
 xe-y += \
diff --git a/drivers/gpu/drm/xe/xe_cper.c b/drivers/gpu/drm/xe/xe_cper.c
index 709fc3d52fcf..0fedef06e138 100644
--- a/drivers/gpu/drm/xe/xe_cper.c
+++ b/drivers/gpu/drm/xe/xe_cper.c
@@ -20,6 +20,7 @@
 #include "xe_printk.h"
 #include "xe_ras.h"
 #include "xe_ras_types.h"
+#include "xe_trace_cper.h"
 
 static bool is_hw_sigid(enum xe_sigid sigid)
 {
@@ -179,7 +180,8 @@ static void xe_cper_record_emit(struct xe_device *xe, u8 severity,
 	if (einfo && einfo_len)
 		memcpy((u8 *)rec + sizeof(*rec), einfo, einfo_len);
 
-	/* TODO: Emit trace event */
+	trace_xe_error_cper(xe, &rhdr->platform_id, &sdesc->fru_id, severity,
+			    &rec->intel_hdr, total_len, (u8 *)rec);
 
 	kfree(rec);
 }
diff --git a/drivers/gpu/drm/xe/xe_trace_cper.c b/drivers/gpu/drm/xe/xe_trace_cper.c
new file mode 100644
index 000000000000..caea8783ab7c
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_trace_cper.c
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#ifndef __CHECKER__
+#define CREATE_TRACE_POINTS
+#include "xe_trace_cper.h"
+#endif
diff --git a/drivers/gpu/drm/xe/xe_trace_cper.h b/drivers/gpu/drm/xe/xe_trace_cper.h
new file mode 100644
index 000000000000..6d2dbf504888
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_trace_cper.h
@@ -0,0 +1,66 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#undef TRACE_SYSTEM
+#define TRACE_SYSTEM xe
+
+#if !defined(_XE_TRACE_CPER_H_) || defined(TRACE_HEADER_MULTI_READ)
+#define _XE_TRACE_CPER_H_
+
+#include <linux/tracepoint.h>
+#include <linux/types.h>
+
+#include "xe_cper_types.h"
+#include "xe_device_types.h"
+
+#define __dev_name_xe(xe)	dev_name((xe)->drm.dev)
+
+TRACE_EVENT(xe_error_cper,
+	TP_PROTO(struct xe_device *xe,
+	    const guid_t *platform_id, const guid_t *fru_id,
+	    const u8 severity,
+	    const struct xe_cper_sec_intel_err_hdr *ihdr,
+	    u32 cper_len, const u8 *cper),
+	TP_ARGS(xe, platform_id, fru_id, severity, ihdr, cper_len, cper),
+
+	TP_STRUCT__entry(
+	    __string(dev, __dev_name_xe(xe))
+	    __array(char, platform_id, UUID_SIZE)
+	    __array(char, fru_id, UUID_SIZE)
+	    __field(u8, sev)
+	    __array(u8, ihdr_raw, sizeof(struct xe_cper_sec_intel_err_hdr))
+	    __field(u32, cper_len)
+	    __dynamic_array(u8, cper, cper_len)
+	    ),
+
+	TP_fast_assign(
+	    __assign_str(dev);
+	    __entry->sev = severity;
+	    memcpy(__entry->platform_id, platform_id, UUID_SIZE);
+	    memcpy(__entry->fru_id, fru_id, UUID_SIZE);
+	    memcpy(__entry->ihdr_raw, ihdr, sizeof(struct xe_cper_sec_intel_err_hdr));
+	    __entry->cper_len = cper_len;
+	    memcpy(__get_dynamic_array(cper), cper, cper_len);
+	    ),
+
+	TP_printk("dev=%s severity=%d platform_id=%pU fru_id=%pU "
+		"intel_err_hdr_raw=%s cper_len=%u cper_raw=%s",
+		__get_str(dev), __entry->sev,
+		__entry->platform_id, __entry->fru_id,
+		__print_hex(__entry->ihdr_raw,
+		    sizeof(struct xe_cper_sec_intel_err_hdr)),
+		__entry->cper_len,
+		__print_hex(__get_dynamic_array(cper),
+		    __entry->cper_len))
+);
+
+#endif
+
+/* This part must be outside protection */
+#undef TRACE_INCLUDE_PATH
+#undef TRACE_INCLUDE_FILE
+#define TRACE_INCLUDE_PATH ../../drivers/gpu/drm/xe
+#define TRACE_INCLUDE_FILE xe_trace_cper
+#include <trace/define_trace.h>
-- 
2.54.0

[PATCH v4 09/12] drm/xe/xe_ras: Report device memory errors using SIGID

[Badal Nilawar]

Use xe_log_comp_info helper to report device memory errors.

Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
Cc: Riana Tauro <riana.tauro@intel.com>
---
 drivers/gpu/drm/xe/xe_ras.c | 11 +++++++----
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
index 25ea178228f7..8ed4a6992ef1 100644
--- a/drivers/gpu/drm/xe/xe_ras.c
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -409,14 +409,17 @@ static u8 handle_device_memory_errors(struct xe_device *xe, struct xe_ras_error_
 	 */
 	switch (info->category) {
 	case XE_RAS_MEMORY_POISON:
-		xe_info(xe, "[RAS]: Poison error detected\n");
+		xe_log_comp_info(xe, DEVICE_MEMORY, &arr->counter, sizeof(arr->counter),
+				 "Poison error detected\n");
 		break;
 	case XE_RAS_MEMORY_DATA_PARITY:
-		xe_info(xe, "[RAS]: Data parity error detected\n");
+		xe_log_comp_info(xe, DEVICE_MEMORY, &arr->counter, sizeof(arr->counter),
+				 "Data parity error detected\n");
 		break;
 	case XE_RAS_MEMORY_DB_ECC:
-		xe_info(xe, "[RAS]: Double-bit ECC error detected at sw address 0x%llx\n",
-			info->sw_address);
+		xe_log_comp_info(xe, DEVICE_MEMORY, &arr->counter, sizeof(arr->counter),
+				 "Double-bit ECC error detected at sw address 0x%llx\n",
+				 info->sw_address);
 		/* TODO: Add page offlining for Double-bit ECC error */
 		fallthrough;
 	default:
-- 
2.54.0

[PATCH v4 10/12] drm/xe/xe_ras: Report core compute errors using SIGID

[Badal Nilawar]

Use xe_log_* helpers to report core compute errors.

Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
Cc: Riana Tauro <riana.tauro@intel.com>
---
v2:
  - Pass RAS firmware reported severity to xe_log
---
 drivers/gpu/drm/xe/xe_ras.c | 12 +++++++++---
 1 file changed, 9 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
index 8ed4a6992ef1..6647300c7f17 100644
--- a/drivers/gpu/drm/xe/xe_ras.c
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -332,21 +332,27 @@ static void ras_send_error_event(struct xe_device *xe, u8 severity, u8 component
 	xe_drm_ras_event(xe, drm_component, drm_severity, response.value);
 }
 
-static u8 handle_core_compute_errors(struct xe_ras_error_array *arr)
+static u8 handle_core_compute_errors(struct xe_device *xe, struct xe_ras_error_array *arr)
 {
 	struct xe_ras_compute_error *error_info = (void *)arr->details;
+	u8 cper_sev = ras_sev_to_cper_sev(arr->counter.common.severity);
 	u8 uncorr_type;
 
 	uncorr_type = FIELD_GET(CORE_COMPUTE_UNCORR_TYPE, error_info->log_header);
 
 	/* Request a reset if error is global */
-	if (uncorr_type == GLOBAL_UNCORR_ERROR)
+	if (uncorr_type == GLOBAL_UNCORR_ERROR) {
+		xe_log_comp(xe, cper_sev, CORE_COMPUTE, &arr->counter, sizeof(arr->counter),
+			    "Global uncorrectable error detected\n");
 		return XE_RAS_RECOVERY_ACTION_RESET;
+	}
 
 	/*
 	 * No action needed for other errors.
 	 * Local errors are recovered using an engine reset by GuC.
 	 */
+	xe_log_comp(xe, cper_sev, CORE_COMPUTE, &arr->counter, sizeof(arr->counter),
+		    "Other compute errors\n");
 	return XE_RAS_RECOVERY_ACTION_RECOVERED;
 }
 
@@ -592,7 +598,7 @@ enum xe_ras_recovery_action xe_ras_process_errors(struct xe_device *xe)
 
 			switch (component) {
 			case XE_RAS_COMP_CORE_COMPUTE:
-				action = handle_core_compute_errors(arr);
+				action = handle_core_compute_errors(xe, arr);
 				break;
 			case XE_RAS_COMP_SOC_INTERNAL:
 				action = handle_soc_internal_errors(xe, arr);
-- 
2.54.0

[PATCH v4 11/12] drm/xe/xe_ras: Report soc internal errors using SIGID

[Badal Nilawar]

Use xe_log_* helpers to report soc internal errors.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
Cc: Riana Tauro <riana.tauro@intel.com>
---
 drivers/gpu/drm/xe/xe_ras.c | 12 +++++-------
 1 file changed, 5 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
index 6647300c7f17..af2970941b59 100644
--- a/drivers/gpu/drm/xe/xe_ras.c
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -366,7 +366,6 @@ static u8 handle_soc_internal_errors(struct xe_device *xe, struct xe_ras_error_a
 {
 	struct xe_ras_soc_error *info = (void *)arr->details;
 	struct xe_ras_soc_error_source *source = &info->source;
-	struct xe_ras_error_class *counter = &arr->counter;
 
 	if (source->csc) {
 		struct xe_ras_csc_error *csc_error = (void *)info->details;
@@ -380,9 +379,8 @@ static u8 handle_soc_internal_errors(struct xe_device *xe, struct xe_ras_error_a
 		 * is required.
 		 */
 		if (csc_error->hec_fw_error) {
-			xe_err(xe, "[RAS]: CSC %s detected: 0x%x\n",
-			       sev_to_str(counter->common.severity),
-			       csc_error->hec_fw_error);
+			xe_log_comp_fatal(xe, SOC_INTERNAL, &arr->counter, sizeof(arr->counter),
+					  "CSC error detected: 0x%x\n", csc_error->hec_fw_error);
 			xe_survivability_mode_runtime_enable(xe);
 			return XE_RAS_RECOVERY_ACTION_DISCONNECT;
 		}
@@ -390,9 +388,9 @@ static u8 handle_soc_internal_errors(struct xe_device *xe, struct xe_ras_error_a
 		struct xe_ras_ieh_error *ieh_error = (void *)info->details;
 
 		if (ieh_error->global_error_status & XE_RAS_SOC_IEH_PUNIT) {
-			xe_err(xe, "[RAS]: PUNIT %s detected: 0x%x\n",
-			       sev_to_str(counter->common.severity),
-			       ieh_error->global_error_status);
+			xe_log_comp_fatal(xe, SOC_INTERNAL, &arr->counter, sizeof(arr->counter),
+					  "PUNIT error detected: 0x%x\n",
+					  ieh_error->global_error_status);
 			punit_error_handler(xe);
 			return XE_RAS_RECOVERY_ACTION_DISCONNECT;
 		}
-- 
2.54.0

[PATCH v4 12/12] drm/xe/xe_ras: Report correctable errors using SIGID

[Badal Nilawar]

Use xe_log_* helper to report correctable errors.

Assisted-by: Copilot:Claude-Opus-5.5
Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
Cc: Raag Jadav <raag.jadav@intel.com>
---
v4:
 - Pass structured log component to xe_log_from() (sashiko)
---
 drivers/gpu/drm/xe/xe_ras.c | 15 +++++++++++++--
 1 file changed, 13 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
index af2970941b59..9df2e8942bda 100644
--- a/drivers/gpu/drm/xe/xe_ras.c
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -3,6 +3,8 @@
  * Copyright © 2026 Intel Corporation
  */
 
+#include <linux/bitfield.h>
+
 #include "xe_configfs.h"
 #include "xe_cper.h"
 #include "xe_debugfs.h"
@@ -216,6 +218,12 @@ static u8 ras_sev_to_cper_sev(u8 ras_sev)
 	}
 }
 
+static u16 ras_comp_to_log_comp(u8 component)
+{
+	return FIELD_PREP(XE_LOG_COMPONENT_CLASS_MASK, XE_LOG_COMPONENT_CLASS_HARDWARE) |
+	       FIELD_PREP(XE_LOG_COMPONENT_TYPE_MASK, component);
+}
+
 static inline const char *sev_to_str(u8 severity)
 {
 	if (severity >= XE_RAS_SEV_MAX)
@@ -459,8 +467,11 @@ void xe_ras_counter_threshold_crossed(struct xe_device *xe,
 		if (!ras_counter_is_valid(xe, &errors[id]))
 			continue;
 
-		xe_warn(xe, "[RAS]: %s %s detected\n",
-			comp_to_str(component), sev_to_str(severity));
+		xe_log_from(xe, ras_sev_to_cper_sev(severity),
+			    ras_comp_to_hw_sigid(component),
+			    ras_comp_to_log_comp(component),
+			    &errors[id], sizeof(errors[id]),
+			    "error detected\n");
 
 		/* Send event once per component */
 		if (sent & BIT(component))
-- 
2.54.0

Re: [PATCH v4 12/12] drm/xe/xe_ras: Report correctable errors using SIGID

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] xe_ras: WARN on valid XE_RAS_COMP_RESERVED telemetry
--

commit ce7ef0dce322046ec43ef7cd45243457eb7f0974
Author: Badal Nilawar <badal.nilawar@intel.com>

drm/xe/xe_ras: Report correctable errors using SIGID

This commit updates the reporting of correctable RAS errors to use the
xe_log_from helper instead of xe_warn. It introduces mapping functions to
convert RAS severity and components to the appropriate logging types and IDs.

> diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
> --- a/drivers/gpu/drm/xe/xe_ras.c
> +++ b/drivers/gpu/drm/xe/xe_ras.c
[ ... ]
> @@ -459,8 +467,11 @@ void xe_ras_counter_threshold_crossed(struct xe_device *xe,
>  		if (!ras_counter_is_valid(xe, &errors[id]))
>  			continue;
>  
> -		xe_warn(xe, "[RAS]: %s %s detected\n",
> -			comp_to_str(component), sev_to_str(severity));
> +		xe_log_from(xe, ras_sev_to_cper_sev(severity),
> +			    ras_comp_to_hw_sigid(component),
> +			    ras_comp_to_log_comp(component),
> +			    &errors[id], sizeof(errors[id]),
> +			    "error detected\n");

[Severity: Medium]
Could this trigger a WARN for the XE_RAS_COMP_RESERVED component ID?

Looking at ras_counter_is_valid(), it validates the component using:
in_range(component, XE_RAS_COMP_NOT_SUPPORTED + 1, XE_RAS_COMP_MAX - 1)

Since in_range(val, start, len) evaluates val >= start && val < start + len,
passing in component 3 (XE_RAS_COMP_RESERVED) returns true, allowing it to
pass the validity check.

When this reserved component is passed to xe_log_from(), it triggers the
logging subsystem. Because the xe_log macro framework lacks a definition
for HARDWARE, 3, log_component_prefix() falls back to
log_unknown_component_prefix(), which triggers a kernel WARN().

This warning will crash systems configured with panic_on_warn when they
encounter expected or reserved hardware telemetry data. Should we explicitly
filter out reserved component IDs before passing them to the logging framework?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261009104602.1075405-14-badal.nilawar@intel.com?part=12

✗ CI.checkpatch: warning for Add CPER logging support for CRI (rev4)

[Patchwork]

== Series Details ==

Series: Add CPER logging support for CRI (rev4)
URL   : https://patchwork.freedesktop.org/series/169692/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
6bef5ce5c74dc76b4ee69ab2832c0d1fd63c91c7
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit be9d02e26570df0fe7473d41fd7963fa71737f22
Author: Badal Nilawar <badal.nilawar@intel.com>
Date:   Fri Oct 9 16:16:15 2026 +0530

    drm/xe/xe_ras: Report correctable errors using SIGID
    
    Use xe_log_* helper to report correctable errors.
    
    Assisted-by: Copilot:Claude-Opus-5.5
    Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
    Cc: Raag Jadav <raag.jadav@intel.com>
+ /mt/dim checkpatch 3bd4f625aafdf70814dbf075de96e224355c9f1e drm-intel
5663ce929103 drm/xe/cper: Add CPER reporting entry point for xe_log
-:32: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#32: 
new file mode 100644

total: 0 errors, 1 warnings, 0 checks, 102 lines checked
d0f12a32ce41 drm/xe/cper: Retrieve the error counter record for CPER reporting
cbcf11412d7c drm/xe/cper: Initialize Intel-specific error section header
-:86: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#86: 
new file mode 100644

total: 0 errors, 1 warnings, 0 checks, 138 lines checked
09e074473c25 drm/xe/cper: Construct CPER record for hardware errors
11904ebb7f37 drm/xe/xe_ras: Add support to retrieve info queue data for CRI
d046214a5a48 drm/xe/cper: Prepare Intel CPER error info records
dd6a5cb0551e drm/xe/cper: Log CPER records for aggregate counter retrieval
-:13: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#13: 
new file mode 100644

total: 0 errors, 1 warnings, 0 checks, 274 lines checked
5f85699f13df drm/xe/cper: Emit cper record to trace buf
-:51: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#51: 
new file mode 100644

-:91: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#91: FILE: drivers/gpu/drm/xe/xe_trace_cper.h:21:
+TRACE_EVENT(xe_error_cper,
+	TP_PROTO(struct xe_device *xe,

-:92: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#92: FILE: drivers/gpu/drm/xe/xe_trace_cper.h:22:
+	TP_PROTO(struct xe_device *xe,
+	    const guid_t *platform_id, const guid_t *fru_id,

-:98: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#98: FILE: drivers/gpu/drm/xe/xe_trace_cper.h:28:
+	TP_STRUCT__entry(

-:108: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#108: FILE: drivers/gpu/drm/xe/xe_trace_cper.h:38:
+	TP_fast_assign(

-:123: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#123: FILE: drivers/gpu/drm/xe/xe_trace_cper.h:53:
+		__print_hex(__entry->ihdr_raw,
+		    sizeof(struct xe_cper_sec_intel_err_hdr)),

-:126: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#126: FILE: drivers/gpu/drm/xe/xe_trace_cper.h:56:
+		__print_hex(__get_dynamic_array(cper),
+		    __entry->cper_len))

-:134: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV)
#134: FILE: drivers/gpu/drm/xe/xe_trace_cper.h:64:
+#define TRACE_INCLUDE_PATH ../../drivers/gpu/drm/xe
                              ^

-:134: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV)
#134: FILE: drivers/gpu/drm/xe/xe_trace_cper.h:64:
+#define TRACE_INCLUDE_PATH ../../drivers/gpu/drm/xe
                                 ^

-:134: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV)
#134: FILE: drivers/gpu/drm/xe/xe_trace_cper.h:64:
+#define TRACE_INCLUDE_PATH ../../drivers/gpu/drm/xe
                                         ^

-:134: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV)
#134: FILE: drivers/gpu/drm/xe/xe_trace_cper.h:64:
+#define TRACE_INCLUDE_PATH ../../drivers/gpu/drm/xe
                                             ^

-:134: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV)
#134: FILE: drivers/gpu/drm/xe/xe_trace_cper.h:64:
+#define TRACE_INCLUDE_PATH ../../drivers/gpu/drm/xe
                                                 ^

total: 0 errors, 1 warnings, 11 checks, 100 lines checked
3c8ecb566740 drm/xe/xe_ras: Report device memory errors using SIGID
6067cb1a946c drm/xe/xe_ras: Report core compute errors using SIGID
18e5eebfeb22 drm/xe/xe_ras: Report soc internal errors using SIGID
be9d02e26570 drm/xe/xe_ras: Report correctable errors using SIGID

✓ CI.KUnit: success for Add CPER logging support for CRI (rev4)

[Patchwork]

== Series Details ==

Series: Add CPER logging support for CRI (rev4)
URL   : https://patchwork.freedesktop.org/series/169692/
State : success

== Summary ==

+ trap cleanup EXIT
+ kunitconfigs=('/kernel/drivers/gpu/tests/.kunitconfig' '/kernel/drivers/gpu/drm/xe/.kunitconfig' '/kernel/drivers/gpu/drm/tests/.kunitconfig' '/kernel/drivers/gpu/drm/ttm/tests/.kunitconfig' '/kernel/drivers/dma-buf/.kunitconfig')
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/tests/.kunitconfig
[10:54:08] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[10:54:12] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[10:54:32] Starting KUnit Kernel (1/1)...
[10:54:32] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[10:54:33] ================= gpu_buddy (14 subtests) ==================
[10:54:33] [PASSED] gpu_test_buddy_alloc_limit
[10:54:33] [PASSED] gpu_test_buddy_alloc_optimistic
[10:54:33] [PASSED] gpu_test_buddy_alloc_pessimistic
[10:54:33] [PASSED] gpu_test_buddy_alloc_pathological
[10:54:33] [PASSED] gpu_test_buddy_alloc_contiguous
[10:54:33] [PASSED] gpu_test_buddy_alloc_clear
[10:54:33] [PASSED] gpu_test_buddy_alloc_range
[10:54:33] [PASSED] gpu_test_buddy_alloc_range_bias
[10:54:34] [PASSED] gpu_test_buddy_fragmentation_performance
[10:54:34] [PASSED] gpu_test_buddy_dirty_tracker_performance
[10:54:34] [PASSED] gpu_test_buddy_alloc_exceeds_max_order
[10:54:34] [PASSED] gpu_test_buddy_offset_aligned_allocation
[10:54:34] [PASSED] gpu_test_buddy_subtree_offset_alignment_stress
[10:54:34] [PASSED] gpu_test_buddy_addr_to_block
[10:54:34] ==================== [PASSED] gpu_buddy ====================
[10:54:34] ============================================================
[10:54:34] Testing complete. Ran 14 tests: passed: 14
[10:54:34] Elapsed time: 26.827s total, 4.456s configuring, 20.504s building, 1.821s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/xe/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[10:54:34] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[10:54:36] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[10:55:10] Starting KUnit Kernel (1/1)...
[10:55:10] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[10:55:10] ================== guc_buf (11 subtests) ===================
[10:55:10] [PASSED] test_smallest
[10:55:10] [PASSED] test_largest
[10:55:11] [PASSED] test_granular
[10:55:11] [PASSED] test_unique
[10:55:11] [PASSED] test_overlap
[10:55:11] [PASSED] test_reusable
[10:55:11] [PASSED] test_too_big
[10:55:11] [PASSED] test_flush
[10:55:11] [PASSED] test_lookup
[10:55:11] [PASSED] test_data
[10:55:11] [PASSED] test_class
[10:55:11] ===================== [PASSED] guc_buf =====================
[10:55:11] =================== guc_dbm (7 subtests) ===================
[10:55:11] [PASSED] test_empty
[10:55:11] [PASSED] test_default
[10:55:11] ======================== test_size  ========================
[10:55:11] [PASSED] 4
[10:55:11] [PASSED] 8
[10:55:11] [PASSED] 32
[10:55:11] [PASSED] 256
[10:55:11] ==================== [PASSED] test_size ====================
[10:55:11] ======================= test_reuse  ========================
[10:55:11] [PASSED] 4
[10:55:11] [PASSED] 8
[10:55:11] [PASSED] 32
[10:55:11] [PASSED] 256
[10:55:11] =================== [PASSED] test_reuse ====================
[10:55:11] =================== test_range_overlap  ====================
[10:55:11] [PASSED] 4
[10:55:11] [PASSED] 8
[10:55:11] [PASSED] 32
[10:55:11] [PASSED] 256
[10:55:11] =============== [PASSED] test_range_overlap ================
[10:55:11] =================== test_range_compact  ====================
[10:55:11] [PASSED] 4
[10:55:11] [PASSED] 8
[10:55:11] [PASSED] 32
[10:55:11] [PASSED] 256
[10:55:11] =============== [PASSED] test_range_compact ================
[10:55:11] ==================== test_range_spare  =====================
[10:55:11] [PASSED] 4
[10:55:11] [PASSED] 8
[10:55:11] [PASSED] 32
[10:55:11] [PASSED] 256
[10:55:11] ================ [PASSED] test_range_spare =================
[10:55:11] ===================== [PASSED] guc_dbm =====================
[10:55:11] =================== guc_idm (6 subtests) ===================
[10:55:11] [PASSED] bad_init
[10:55:11] [PASSED] no_init
[10:55:11] [PASSED] init_fini
[10:55:11] [PASSED] check_used
[10:55:11] [PASSED] check_quota
[10:55:11] [PASSED] check_all
[10:55:11] ===================== [PASSED] guc_idm =====================
[10:55:11] ============== guc_klv_helpers (13 subtests) ===============
[10:55:11] [PASSED] test_count
[10:55:11] [PASSED] test_encode_u32
[10:55:11] [PASSED] test_encode_u64
[10:55:11] [PASSED] test_encode_string
[10:55:11] [PASSED] test_encode_object_raw
[10:55:11] [PASSED] test_encode_object_klv
[10:55:11] [PASSED] test_encode_object_nested
[10:55:11] [PASSED] test_encode_object_basic
[10:55:11] ===================== test_decode_u16  =====================
[10:55:11] [PASSED] empty
[10:55:11] [PASSED] valid
[10:55:11] [PASSED] max
[10:55:11] [PASSED] big
[10:55:11] [PASSED] long
[10:55:11] ================= [PASSED] test_decode_u16 =================
[10:55:11] ===================== test_decode_u32  =====================
[10:55:11] [PASSED] empty
[10:55:11] [PASSED] valid
[10:55:11] [PASSED] max
[10:55:11] [PASSED] long
[10:55:11] ================= [PASSED] test_decode_u32 =================
[10:55:11] ===================== test_decode_u64  =====================
[10:55:11] [PASSED] empty
[10:55:11] [PASSED] short
[10:55:11] [PASSED] valid
[10:55:11] [PASSED] max
[10:55:11] [PASSED] long
[10:55:11] ================= [PASSED] test_decode_u64 =================
[10:55:11] ===================== test_decode_str  =====================
[10:55:11] [PASSED] empty
[10:55:11] [PASSED] one
[10:55:11] [PASSED] one_trash
[10:55:11] [PASSED] two
[10:55:11] [PASSED] two_trash
[10:55:11] [PASSED] three
[10:55:11] [PASSED] dword
[10:55:11] [PASSED] four
[10:55:11] [PASSED] five
[10:55:11] [PASSED] six
[10:55:11] [PASSED] seven
[10:55:11] [PASSED] qword
[10:55:11] ================= [PASSED] test_decode_str =================
[10:55:11] [PASSED] test_print
[10:55:11] ================= [PASSED] guc_klv_helpers =================
[10:55:11] =================== xe_log (4 subtests) ====================
[10:55:11] [PASSED] demo_cper
[10:55:11] [PASSED] demo_dmesg
[10:55:11] ======================= test_dmesg  ========================
[10:55:11] [PASSED] test_fatal
[10:55:11] [PASSED] test_fatal_tile
[10:55:11] [PASSED] test_fatal_gt
[10:55:11] [PASSED] test_fatal_comp
[10:55:11] [PASSED] test_fatal_comp_tile
[10:55:11] [PASSED] test_fatal_comp_gt
[10:55:11] [PASSED] test_fatal_all
[10:55:11] [PASSED] test_recoverable
[10:55:11] [PASSED] test_recoverable_tile
[10:55:11] [PASSED] test_recoverable_gt
[10:55:11] [PASSED] test_recoverable_comp
[10:55:11] [PASSED] test_recoverable_comp_tile
[10:55:11] [PASSED] test_recoverable_comp_gt
[10:55:11] [PASSED] test_recoverable_all
[10:55:11] [PASSED] test_info
[10:55:11] [PASSED] test_info_tile
[10:55:11] [PASSED] test_info_gt
[10:55:11] [PASSED] test_info_err
[10:55:11] [PASSED] test_info_comp
[10:55:11] [PASSED] test_info_comp_tile
[10:55:11] [PASSED] test_info_comp_gt
[10:55:11] [PASSED] test_info_all
[10:55:11] [PASSED] test_hw_fatal
[10:55:11] [PASSED] test_hw_recoverable
[10:55:11] [PASSED] test_hw_corrected
[10:55:11] [PASSED] test_hw_informational
[10:55:11] =================== [PASSED] test_dmesg ====================
[10:55:11] ====================== test_invalid  =======================
[10:55:11] [SKIPPED] no-component no-location no-warn (requires CONFIG_DRM_XE_DEBUG)
[10:55:11] [SKIPPED] reserved location (requires CONFIG_DRM_XE_DEBUG)
[10:55:11] [SKIPPED] unknown location (requires CONFIG_DRM_XE_DEBUG)
[10:55:11] [SKIPPED] nonzero-device-id location (requires CONFIG_DRM_XE_DEBUG)
[10:55:11] [SKIPPED] invalid-tile-id location (requires CONFIG_DRM_XE_DEBUG)
[10:55:11] [SKIPPED] invalid-gt-id location (requires CONFIG_DRM_XE_DEBUG)
[10:55:11] [SKIPPED] unknown component class (requires CONFIG_DRM_XE_DEBUG)
[10:55:11] [SKIPPED] unknown system component (requires CONFIG_DRM_XE_DEBUG)
[10:55:11] [SKIPPED] unknown hardware component (requires CONFIG_DRM_XE_DEBUG)
[10:55:11] [SKIPPED] unknown component and location (requires CONFIG_DRM_XE_DEBUG)
[10:55:11] ================== [SKIPPED] test_invalid ==================
[10:55:11] ===================== [PASSED] xe_log ======================
[10:55:11] ================== no_relay (3 subtests) ===================
[10:55:11] [PASSED] xe_drops_guc2pf_if_not_ready
[10:55:11] [PASSED] xe_drops_guc2vf_if_not_ready
[10:55:11] [PASSED] xe_rejects_send_if_not_ready
[10:55:11] ==================== [PASSED] no_relay =====================
[10:55:11] ================== pf_relay (14 subtests) ==================
[10:55:11] [PASSED] pf_rejects_guc2pf_too_short
[10:55:11] [PASSED] pf_rejects_guc2pf_too_long
[10:55:11] [PASSED] pf_rejects_guc2pf_no_payload
[10:55:11] [PASSED] pf_fails_no_payload
[10:55:11] [PASSED] pf_fails_bad_origin
[10:55:11] [PASSED] pf_fails_bad_type
[10:55:11] [PASSED] pf_txn_reports_error
[10:55:11] [PASSED] pf_txn_sends_pf2guc
[10:55:11] [PASSED] pf_sends_pf2guc
[10:55:11] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[10:55:11] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[10:55:11] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[10:55:11] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[10:55:11] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[10:55:11] ==================== [PASSED] pf_relay =====================
[10:55:11] ================== vf_relay (3 subtests) ===================
[10:55:11] [PASSED] vf_rejects_guc2vf_too_short
[10:55:11] [PASSED] vf_rejects_guc2vf_too_long
[10:55:11] [PASSED] vf_rejects_guc2vf_no_payload
[10:55:11] ==================== [PASSED] vf_relay =====================
[10:55:11] ================ pf_gt_config (9 subtests) =================
[10:55:11] [PASSED] fair_contexts_1vf
[10:55:11] [PASSED] fair_doorbells_1vf
[10:55:11] [PASSED] fair_ggtt_1vf
[10:55:11] ====================== fair_vram_1vf  ======================
[10:55:11] [PASSED] 3.50 GiB
[10:55:11] [PASSED] 11.5 GiB
[10:55:11] [PASSED] 15.5 GiB
[10:55:11] [PASSED] 31.5 GiB
[10:55:11] [PASSED] 63.5 GiB
[10:55:11] [PASSED] 1.91 GiB
[10:55:11] ================== [PASSED] fair_vram_1vf ==================
[10:55:11] ================ fair_vram_1vf_admin_only  =================
[10:55:11] [PASSED] 3.50 GiB
[10:55:11] [PASSED] 11.5 GiB
[10:55:11] [PASSED] 15.5 GiB
[10:55:11] [PASSED] 31.5 GiB
[10:55:11] [PASSED] 63.5 GiB
[10:55:11] [PASSED] 1.91 GiB
[10:55:11] ============ [PASSED] fair_vram_1vf_admin_only =============
[10:55:11] ====================== fair_contexts  ======================
[10:55:11] [PASSED] 1 VF
[10:55:11] [PASSED] 2 VFs
[10:55:11] [PASSED] 3 VFs
[10:55:11] [PASSED] 4 VFs
[10:55:11] [PASSED] 5 VFs
[10:55:11] [PASSED] 6 VFs
[10:55:11] [PASSED] 7 VFs
[10:55:11] [PASSED] 8 VFs
[10:55:11] [PASSED] 9 VFs
[10:55:11] [PASSED] 10 VFs
[10:55:11] [PASSED] 11 VFs
[10:55:11] [PASSED] 12 VFs
[10:55:11] [PASSED] 13 VFs
[10:55:11] [PASSED] 14 VFs
[10:55:11] [PASSED] 15 VFs
[10:55:11] [PASSED] 16 VFs
[10:55:11] [PASSED] 17 VFs
[10:55:11] [PASSED] 18 VFs
[10:55:11] [PASSED] 19 VFs
[10:55:11] [PASSED] 20 VFs
[10:55:11] [PASSED] 21 VFs
[10:55:11] [PASSED] 22 VFs
[10:55:11] [PASSED] 23 VFs
[10:55:11] [PASSED] 24 VFs
[10:55:11] [PASSED] 25 VFs
[10:55:11] [PASSED] 26 VFs
[10:55:11] [PASSED] 27 VFs
[10:55:11] [PASSED] 28 VFs
[10:55:11] [PASSED] 29 VFs
[10:55:11] [PASSED] 30 VFs
[10:55:11] [PASSED] 31 VFs
[10:55:11] [PASSED] 32 VFs
[10:55:11] [PASSED] 33 VFs
[10:55:11] [PASSED] 34 VFs
[10:55:11] [PASSED] 35 VFs
[10:55:11] [PASSED] 36 VFs
[10:55:11] [PASSED] 37 VFs
[10:55:11] [PASSED] 38 VFs
[10:55:11] [PASSED] 39 VFs
[10:55:11] [PASSED] 40 VFs
[10:55:11] [PASSED] 41 VFs
[10:55:11] [PASSED] 42 VFs
[10:55:11] [PASSED] 43 VFs
[10:55:11] [PASSED] 44 VFs
[10:55:11] [PASSED] 45 VFs
[10:55:11] [PASSED] 46 VFs
[10:55:11] [PASSED] 47 VFs
[10:55:11] [PASSED] 48 VFs
[10:55:11] [PASSED] 49 VFs
[10:55:11] [PASSED] 50 VFs
[10:55:11] [PASSED] 51 VFs
[10:55:11] [PASSED] 52 VFs
[10:55:11] [PASSED] 53 VFs
[10:55:11] [PASSED] 54 VFs
[10:55:11] [PASSED] 55 VFs
[10:55:11] [PASSED] 56 VFs
[10:55:11] [PASSED] 57 VFs
[10:55:11] [PASSED] 58 VFs
[10:55:11] [PASSED] 59 VFs
[10:55:11] [PASSED] 60 VFs
[10:55:11] [PASSED] 61 VFs
[10:55:11] [PASSED] 62 VFs
[10:55:11] [PASSED] 63 VFs
[10:55:11] ================== [PASSED] fair_contexts ==================
[10:55:11] ===================== fair_doorbells  ======================
[10:55:11] [PASSED] 1 VF
[10:55:11] [PASSED] 2 VFs
[10:55:11] [PASSED] 3 VFs
[10:55:11] [PASSED] 4 VFs
[10:55:11] [PASSED] 5 VFs
[10:55:11] [PASSED] 6 VFs
[10:55:11] [PASSED] 7 VFs
[10:55:11] [PASSED] 8 VFs
[10:55:11] [PASSED] 9 VFs
[10:55:11] [PASSED] 10 VFs
[10:55:11] [PASSED] 11 VFs
[10:55:11] [PASSED] 12 VFs
[10:55:11] [PASSED] 13 VFs
[10:55:11] [PASSED] 14 VFs
[10:55:11] [PASSED] 15 VFs
[10:55:11] [PASSED] 16 VFs
[10:55:11] [PASSED] 17 VFs
[10:55:11] [PASSED] 18 VFs
[10:55:11] [PASSED] 19 VFs
[10:55:11] [PASSED] 20 VFs
[10:55:11] [PASSED] 21 VFs
[10:55:11] [PASSED] 22 VFs
[10:55:11] [PASSED] 23 VFs
[10:55:11] [PASSED] 24 VFs
[10:55:11] [PASSED] 25 VFs
[10:55:11] [PASSED] 26 VFs
[10:55:11] [PASSED] 27 VFs
[10:55:11] [PASSED] 28 VFs
[10:55:11] [PASSED] 29 VFs
[10:55:11] [PASSED] 30 VFs
[10:55:11] [PASSED] 31 VFs
[10:55:11] [PASSED] 32 VFs
[10:55:11] [PASSED] 33 VFs
[10:55:11] [PASSED] 34 VFs
[10:55:11] [PASSED] 35 VFs
[10:55:11] [PASSED] 36 VFs
[10:55:11] [PASSED] 37 VFs
[10:55:11] [PASSED] 38 VFs
[10:55:11] [PASSED] 39 VFs
[10:55:11] [PASSED] 40 VFs
[10:55:11] [PASSED] 41 VFs
[10:55:11] [PASSED] 42 VFs
[10:55:11] [PASSED] 43 VFs
[10:55:11] [PASSED] 44 VFs
[10:55:11] [PASSED] 45 VFs
[10:55:11] [PASSED] 46 VFs
[10:55:11] [PASSED] 47 VFs
[10:55:11] [PASSED] 48 VFs
[10:55:11] [PASSED] 49 VFs
[10:55:11] [PASSED] 50 VFs
[10:55:11] [PASSED] 51 VFs
[10:55:11] [PASSED] 52 VFs
[10:55:11] [PASSED] 53 VFs
[10:55:11] [PASSED] 54 VFs
[10:55:11] [PASSED] 55 VFs
[10:55:11] [PASSED] 56 VFs
[10:55:11] [PASSED] 57 VFs
[10:55:11] [PASSED] 58 VFs
[10:55:11] [PASSED] 59 VFs
[10:55:11] [PASSED] 60 VFs
[10:55:11] [PASSED] 61 VFs
[10:55:11] [PASSED] 62 VFs
[10:55:11] [PASSED] 63 VFs
[10:55:11] ================= [PASSED] fair_doorbells ==================
[10:55:11] ======================== fair_ggtt  ========================
[10:55:11] [PASSED] 1 VF
[10:55:11] [PASSED] 2 VFs
[10:55:11] [PASSED] 3 VFs
[10:55:11] [PASSED] 4 VFs
[10:55:11] [PASSED] 5 VFs
[10:55:11] [PASSED] 6 VFs
[10:55:11] [PASSED] 7 VFs
[10:55:11] [PASSED] 8 VFs
[10:55:11] [PASSED] 9 VFs
[10:55:11] [PASSED] 10 VFs
[10:55:11] [PASSED] 11 VFs
[10:55:11] [PASSED] 12 VFs
[10:55:11] [PASSED] 13 VFs
[10:55:11] [PASSED] 14 VFs
[10:55:11] [PASSED] 15 VFs
[10:55:11] [PASSED] 16 VFs
[10:55:11] [PASSED] 17 VFs
[10:55:11] [PASSED] 18 VFs
[10:55:11] [PASSED] 19 VFs
[10:55:11] [PASSED] 20 VFs
[10:55:11] [PASSED] 21 VFs
[10:55:11] [PASSED] 22 VFs
[10:55:11] [PASSED] 23 VFs
[10:55:11] [PASSED] 24 VFs
[10:55:11] [PASSED] 25 VFs
[10:55:11] [PASSED] 26 VFs
[10:55:11] [PASSED] 27 VFs
[10:55:11] [PASSED] 28 VFs
[10:55:11] [PASSED] 29 VFs
[10:55:11] [PASSED] 30 VFs
[10:55:11] [PASSED] 31 VFs
[10:55:11] [PASSED] 32 VFs
[10:55:11] [PASSED] 33 VFs
[10:55:11] [PASSED] 34 VFs
[10:55:11] [PASSED] 35 VFs
[10:55:11] [PASSED] 36 VFs
[10:55:11] [PASSED] 37 VFs
[10:55:11] [PASSED] 38 VFs
[10:55:11] [PASSED] 39 VFs
[10:55:11] [PASSED] 40 VFs
[10:55:11] [PASSED] 41 VFs
[10:55:11] [PASSED] 42 VFs
[10:55:11] [PASSED] 43 VFs
[10:55:11] [PASSED] 44 VFs
[10:55:11] [PASSED] 45 VFs
[10:55:11] [PASSED] 46 VFs
[10:55:11] [PASSED] 47 VFs
[10:55:11] [PASSED] 48 VFs
[10:55:11] [PASSED] 49 VFs
[10:55:11] [PASSED] 50 VFs
[10:55:11] [PASSED] 51 VFs
[10:55:11] [PASSED] 52 VFs
[10:55:11] [PASSED] 53 VFs
[10:55:11] [PASSED] 54 VFs
[10:55:11] [PASSED] 55 VFs
[10:55:11] [PASSED] 56 VFs
[10:55:11] [PASSED] 57 VFs
[10:55:11] [PASSED] 58 VFs
[10:55:11] [PASSED] 59 VFs
[10:55:11] [PASSED] 60 VFs
[10:55:11] [PASSED] 61 VFs
[10:55:11] [PASSED] 62 VFs
[10:55:11] [PASSED] 63 VFs
[10:55:11] ==================== [PASSED] fair_ggtt ====================
[10:55:11] ======================== fair_vram  ========================
[10:55:11] [PASSED] 1 VF
[10:55:11] [PASSED] 2 VFs
[10:55:11] [PASSED] 3 VFs
[10:55:11] [PASSED] 4 VFs
[10:55:11] [PASSED] 5 VFs
[10:55:11] [PASSED] 6 VFs
[10:55:11] [PASSED] 7 VFs
[10:55:11] [PASSED] 8 VFs
[10:55:11] [PASSED] 9 VFs
[10:55:11] [PASSED] 10 VFs
[10:55:11] [PASSED] 11 VFs
[10:55:11] [PASSED] 12 VFs
[10:55:11] [PASSED] 13 VFs
[10:55:11] [PASSED] 14 VFs
[10:55:11] [PASSED] 15 VFs
[10:55:11] [PASSED] 16 VFs
[10:55:11] [PASSED] 17 VFs
[10:55:11] [PASSED] 18 VFs
[10:55:11] [PASSED] 19 VFs
[10:55:11] [PASSED] 20 VFs
[10:55:11] [PASSED] 21 VFs
[10:55:11] [PASSED] 22 VFs
[10:55:11] [PASSED] 23 VFs
[10:55:11] [PASSED] 24 VFs
[10:55:11] [PASSED] 25 VFs
[10:55:11] [PASSED] 26 VFs
[10:55:11] [PASSED] 27 VFs
[10:55:11] [PASSED] 28 VFs
[10:55:11] [PASSED] 29 VFs
[10:55:11] [PASSED] 30 VFs
[10:55:11] [PASSED] 31 VFs
[10:55:11] [PASSED] 32 VFs
[10:55:11] [PASSED] 33 VFs
[10:55:11] [PASSED] 34 VFs
[10:55:11] [PASSED] 35 VFs
[10:55:11] [PASSED] 36 VFs
[10:55:11] [PASSED] 37 VFs
[10:55:11] [PASSED] 38 VFs
[10:55:11] [PASSED] 39 VFs
[10:55:11] [PASSED] 40 VFs
[10:55:11] [PASSED] 41 VFs
[10:55:11] [PASSED] 42 VFs
[10:55:11] [PASSED] 43 VFs
[10:55:11] [PASSED] 44 VFs
[10:55:11] [PASSED] 45 VFs
[10:55:11] [PASSED] 46 VFs
[10:55:11] [PASSED] 47 VFs
[10:55:11] [PASSED] 48 VFs
[10:55:11] [PASSED] 49 VFs
[10:55:11] [PASSED] 50 VFs
[10:55:11] [PASSED] 51 VFs
[10:55:11] [PASSED] 52 VFs
[10:55:11] [PASSED] 53 VFs
[10:55:11] [PASSED] 54 VFs
[10:55:11] [PASSED] 55 VFs
[10:55:11] [PASSED] 56 VFs
[10:55:11] [PASSED] 57 VFs
[10:55:11] [PASSED] 58 VFs
[10:55:11] [PASSED] 59 VFs
[10:55:11] [PASSED] 60 VFs
[10:55:11] [PASSED] 61 VFs
[10:55:11] [PASSED] 62 VFs
[10:55:11] [PASSED] 63 VFs
[10:55:11] ==================== [PASSED] fair_vram ====================
[10:55:11] ================== [PASSED] pf_gt_config ===================
[10:55:11] ===================== lmtt (1 subtest) =====================
[10:55:11] ======================== test_ops  =========================
[10:55:11] [PASSED] 2-level
[10:55:11] [PASSED] multi-level
[10:55:11] ==================== [PASSED] test_ops =====================
[10:55:11] ====================== [PASSED] lmtt =======================
[10:55:11] ================= sriov_packet (1 subtest) =================
[10:55:11] [PASSED] test_descriptor_init
[10:55:11] ================== [PASSED] sriov_packet ===================
[10:55:11] ================= pf_service (11 subtests) =================
[10:55:11] [PASSED] pf_negotiate_any
[10:55:11] [PASSED] pf_negotiate_base_match
[10:55:11] [PASSED] pf_negotiate_base_newer
[10:55:11] [PASSED] pf_negotiate_base_next
[10:55:11] [SKIPPED] pf_negotiate_base_older (no older minor)
[10:55:11] [PASSED] pf_negotiate_base_prev
[10:55:11] [PASSED] pf_negotiate_latest_match
[10:55:11] [PASSED] pf_negotiate_latest_newer
[10:55:11] [PASSED] pf_negotiate_latest_next
[10:55:11] [SKIPPED] pf_negotiate_latest_older (no older minor)
[10:55:11] [SKIPPED] pf_negotiate_latest_prev (no prev major)
[10:55:11] =================== [PASSED] pf_service ====================
[10:55:11] ================= xe_guc_g2g (2 subtests) ==================
[10:55:11] ============== xe_live_guc_g2g_kunit_default  ==============
[10:55:11] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[10:55:11] ============== xe_live_guc_g2g_kunit_allmem  ===============
[10:55:11] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[10:55:11] =================== [SKIPPED] xe_guc_g2g ===================
[10:55:11] =================== xe_mocs (2 subtests) ===================
[10:55:11] ================ xe_live_mocs_kernel_kunit  ================
[10:55:11] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[10:55:11] ================ xe_live_mocs_reset_kunit  =================
[10:55:11] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[10:55:11] ==================== [SKIPPED] xe_mocs =====================
[10:55:11] ================= xe_migrate (2 subtests) ==================
[10:55:11] ================= xe_migrate_sanity_kunit  =================
[10:55:11] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[10:55:11] ================== xe_validate_ccs_kunit  ==================
[10:55:11] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[10:55:11] =================== [SKIPPED] xe_migrate ===================
[10:55:11] ================== xe_dma_buf (1 subtest) ==================
[10:55:11] ==================== xe_dma_buf_kunit  =====================
[10:55:11] ================ [SKIPPED] xe_dma_buf_kunit ================
[10:55:11] =================== [SKIPPED] xe_dma_buf ===================
[10:55:11] ================= xe_bo_shrink (1 subtest) =================
[10:55:11] =================== xe_bo_shrink_kunit  ====================
[10:55:11] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[10:55:11] ================== [SKIPPED] xe_bo_shrink ==================
[10:55:11] ==================== xe_bo (2 subtests) ====================
[10:55:11] ================== xe_ccs_migrate_kunit  ===================
[10:55:11] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[10:55:11] ==================== xe_bo_evict_kunit  ====================
[10:55:11] =============== [SKIPPED] xe_bo_evict_kunit ================
[10:55:11] ===================== [SKIPPED] xe_bo ======================
[10:55:11] =================== xe_any (9 subtests) ====================
[10:55:11] [PASSED] test_to_xe
[10:55:11] [PASSED] test_to_dev
[10:55:11] [PASSED] test_to_pdev
[10:55:11] [PASSED] test_to_drm
[10:55:11] [PASSED] test_if_pdev
[10:55:11] [PASSED] test_if_xe
[10:55:11] [PASSED] test_if_tile
[10:55:11] [PASSED] test_if_gt
[10:55:11] [PASSED] test_to_id
[10:55:11] ===================== [PASSED] xe_any ======================
[10:55:11] ==================== args (13 subtests) ====================
[10:55:11] [PASSED] count_args_test
[10:55:11] [PASSED] call_args_example
[10:55:11] [PASSED] call_args_test
[10:55:11] [PASSED] drop_first_arg_example
[10:55:11] [PASSED] drop_first_arg_test
[10:55:11] [PASSED] first_arg_example
[10:55:11] [PASSED] first_arg_test
[10:55:11] [PASSED] last_arg_example
[10:55:11] [PASSED] last_arg_test
[10:55:11] [PASSED] pick_arg_example
[10:55:11] [PASSED] if_args_example
[10:55:11] [PASSED] if_args_test
[10:55:11] [PASSED] sep_comma_example
[10:55:11] ====================== [PASSED] args =======================
[10:55:11] =================== xe_pci (3 subtests) ====================
[10:55:11] ==================== check_graphics_ip  ====================
[10:55:11] [PASSED] 12.00 Xe_LP
[10:55:11] [PASSED] 12.10 Xe_LP+
[10:55:11] [PASSED] 12.55 Xe_HPG
[10:55:11] [PASSED] 12.60 Xe_HPC
[10:55:11] [PASSED] 12.70 Xe_LPG
[10:55:11] [PASSED] 12.71 Xe_LPG
[10:55:11] [PASSED] 12.74 Xe_LPG+
[10:55:11] [PASSED] 20.01 Xe2_HPG
[10:55:11] [PASSED] 20.02 Xe2_HPG
[10:55:11] [PASSED] 20.04 Xe2_LPG
[10:55:11] [PASSED] 30.00 Xe3_LPG
[10:55:11] [PASSED] 30.01 Xe3_LPG
[10:55:11] [PASSED] 30.03 Xe3_LPG
[10:55:11] [PASSED] 30.04 Xe3_LPG
[10:55:11] [PASSED] 30.05 Xe3_LPG
[10:55:11] [PASSED] 35.10 Xe3p_LPG
[10:55:11] [PASSED] 35.11 Xe3p_XPC
[10:55:11] ================ [PASSED] check_graphics_ip ================
[10:55:11] ===================== check_media_ip  ======================
[10:55:11] [PASSED] 12.00 Xe_M
[10:55:11] [PASSED] 12.55 Xe_HPM
[10:55:11] [PASSED] 13.00 Xe_LPM+
[10:55:11] [PASSED] 13.01 Xe2_HPM
[10:55:11] [PASSED] 20.00 Xe2_LPM
[10:55:11] [PASSED] 30.00 Xe3_LPM
[10:55:11] [PASSED] 30.02 Xe3_LPM
[10:55:11] [PASSED] 35.00 Xe3p_LPM
[10:55:11] [PASSED] 35.03 Xe3p_HPM
[10:55:11] ================= [PASSED] check_media_ip ==================
[10:55:11] =================== check_platform_desc  ===================
[10:55:11] [PASSED] 0x9A60 (TIGERLAKE)
[10:55:11] [PASSED] 0x9A68 (TIGERLAKE)
[10:55:11] [PASSED] 0x9A70 (TIGERLAKE)
[10:55:11] [PASSED] 0x9A40 (TIGERLAKE)
[10:55:11] [PASSED] 0x9A49 (TIGERLAKE)
[10:55:11] [PASSED] 0x9A59 (TIGERLAKE)
[10:55:11] [PASSED] 0x9A78 (TIGERLAKE)
[10:55:11] [PASSED] 0x9AC0 (TIGERLAKE)
[10:55:11] [PASSED] 0x9AC9 (TIGERLAKE)
[10:55:11] [PASSED] 0x9AD9 (TIGERLAKE)
[10:55:11] [PASSED] 0x9AF8 (TIGERLAKE)
[10:55:11] [PASSED] 0x4C80 (ROCKETLAKE)
[10:55:11] [PASSED] 0x4C8A (ROCKETLAKE)
[10:55:11] [PASSED] 0x4C8B (ROCKETLAKE)
[10:55:11] [PASSED] 0x4C8C (ROCKETLAKE)
[10:55:11] [PASSED] 0x4C90 (ROCKETLAKE)
[10:55:11] [PASSED] 0x4C9A (ROCKETLAKE)
[10:55:11] [PASSED] 0x4680 (ALDERLAKE_S)
[10:55:11] [PASSED] 0x4682 (ALDERLAKE_S)
[10:55:11] [PASSED] 0x4688 (ALDERLAKE_S)
[10:55:11] [PASSED] 0x468A (ALDERLAKE_S)
[10:55:11] [PASSED] 0x468B (ALDERLAKE_S)
[10:55:11] [PASSED] 0x4690 (ALDERLAKE_S)
[10:55:11] [PASSED] 0x4692 (ALDERLAKE_S)
[10:55:11] [PASSED] 0x4693 (ALDERLAKE_S)
[10:55:11] [PASSED] 0x46A0 (ALDERLAKE_P)
[10:55:11] [PASSED] 0x46A1 (ALDERLAKE_P)
[10:55:11] [PASSED] 0x46A2 (ALDERLAKE_P)
[10:55:11] [PASSED] 0x46A3 (ALDERLAKE_P)
[10:55:11] [PASSED] 0x46A6 (ALDERLAKE_P)
[10:55:11] [PASSED] 0x46A8 (ALDERLAKE_P)
[10:55:11] [PASSED] 0x46AA (ALDERLAKE_P)
[10:55:11] [PASSED] 0x462A (ALDERLAKE_P)
[10:55:11] [PASSED] 0x4626 (ALDERLAKE_P)
[10:55:11] [PASSED] 0x4628 (ALDERLAKE_P)
[10:55:11] [PASSED] 0x46B0 (ALDERLAKE_P)
[10:55:11] [PASSED] 0x46B1 (ALDERLAKE_P)
[10:55:11] [PASSED] 0x46B2 (ALDERLAKE_P)
[10:55:11] [PASSED] 0x46B3 (ALDERLAKE_P)
[10:55:11] [PASSED] 0x46C0 (ALDERLAKE_P)
[10:55:11] [PASSED] 0x46C1 (ALDERLAKE_P)
[10:55:11] [PASSED] 0x46C2 (ALDERLAKE_P)
[10:55:11] [PASSED] 0x46C3 (ALDERLAKE_P)
[10:55:11] [PASSED] 0x46D0 (ALDERLAKE_N)
[10:55:11] [PASSED] 0x46D1 (ALDERLAKE_N)
[10:55:11] [PASSED] 0x46D2 (ALDERLAKE_N)
[10:55:11] [PASSED] 0x46D3 (ALDERLAKE_N)
[10:55:11] [PASSED] 0x46D4 (ALDERLAKE_N)
[10:55:11] [PASSED] 0xA721 (ALDERLAKE_P)
[10:55:11] [PASSED] 0xA7A1 (ALDERLAKE_P)
[10:55:11] [PASSED] 0xA7A9 (ALDERLAKE_P)
[10:55:11] [PASSED] 0xA7AC (ALDERLAKE_P)
[10:55:11] [PASSED] 0xA7AD (ALDERLAKE_P)
[10:55:11] [PASSED] 0xA720 (ALDERLAKE_P)
[10:55:11] [PASSED] 0xA7A0 (ALDERLAKE_P)
[10:55:11] [PASSED] 0xA7A8 (ALDERLAKE_P)
[10:55:11] [PASSED] 0xA7AA (ALDERLAKE_P)
[10:55:11] [PASSED] 0xA7AB (ALDERLAKE_P)
[10:55:11] [PASSED] 0xA780 (ALDERLAKE_S)
[10:55:11] [PASSED] 0xA781 (ALDERLAKE_S)
[10:55:11] [PASSED] 0xA782 (ALDERLAKE_S)
[10:55:11] [PASSED] 0xA783 (ALDERLAKE_S)
[10:55:11] [PASSED] 0xA788 (ALDERLAKE_S)
[10:55:11] [PASSED] 0xA789 (ALDERLAKE_S)
[10:55:11] [PASSED] 0xA78A (ALDERLAKE_S)
[10:55:11] [PASSED] 0xA78B (ALDERLAKE_S)
[10:55:11] [PASSED] 0x4905 (DG1)
[10:55:11] [PASSED] 0x4906 (DG1)
[10:55:11] [PASSED] 0x4907 (DG1)
[10:55:11] [PASSED] 0x4908 (DG1)
[10:55:11] [PASSED] 0x4909 (DG1)
[10:55:11] [PASSED] 0x56C0 (DG2)
[10:55:11] [PASSED] 0x56C2 (DG2)
[10:55:11] [PASSED] 0x56C1 (DG2)
[10:55:11] [PASSED] 0x7D51 (METEORLAKE)
[10:55:11] [PASSED] 0x7DD1 (METEORLAKE)
[10:55:11] [PASSED] 0x7D41 (METEORLAKE)
[10:55:11] [PASSED] 0x7D67 (METEORLAKE)
[10:55:11] [PASSED] 0xB640 (METEORLAKE)
[10:55:11] [PASSED] 0x56A0 (DG2)
[10:55:11] [PASSED] 0x56A1 (DG2)
[10:55:11] [PASSED] 0x56A2 (DG2)
[10:55:11] [PASSED] 0x56BE (DG2)
[10:55:11] [PASSED] 0x56BF (DG2)
[10:55:11] [PASSED] 0x5690 (DG2)
[10:55:11] [PASSED] 0x5691 (DG2)
[10:55:11] [PASSED] 0x5692 (DG2)
[10:55:11] [PASSED] 0x56A5 (DG2)
[10:55:11] [PASSED] 0x56A6 (DG2)
[10:55:11] [PASSED] 0x56B0 (DG2)
[10:55:11] [PASSED] 0x56B1 (DG2)
[10:55:11] [PASSED] 0x56BA (DG2)
[10:55:11] [PASSED] 0x56BB (DG2)
[10:55:11] [PASSED] 0x56BC (DG2)
[10:55:11] [PASSED] 0x56BD (DG2)
[10:55:11] [PASSED] 0x5693 (DG2)
[10:55:11] [PASSED] 0x5694 (DG2)
[10:55:11] [PASSED] 0x5695 (DG2)
[10:55:11] [PASSED] 0x56A3 (DG2)
[10:55:11] [PASSED] 0x56A4 (DG2)
[10:55:11] [PASSED] 0x56B2 (DG2)
[10:55:11] [PASSED] 0x56B3 (DG2)
[10:55:11] [PASSED] 0x5696 (DG2)
[10:55:11] [PASSED] 0x5697 (DG2)
[10:55:11] [PASSED] 0xB69 (PVC)
[10:55:11] [PASSED] 0xB6E (PVC)
[10:55:11] [PASSED] 0xBD4 (PVC)
[10:55:11] [PASSED] 0xBD5 (PVC)
[10:55:11] [PASSED] 0xBD6 (PVC)
[10:55:11] [PASSED] 0xBD7 (PVC)
[10:55:11] [PASSED] 0xBD8 (PVC)
[10:55:11] [PASSED] 0xBD9 (PVC)
[10:55:11] [PASSED] 0xBDA (PVC)
[10:55:11] [PASSED] 0xBDB (PVC)
[10:55:11] [PASSED] 0xBE0 (PVC)
[10:55:11] [PASSED] 0xBE1 (PVC)
[10:55:11] [PASSED] 0xBE5 (PVC)
[10:55:11] [PASSED] 0x7D40 (METEORLAKE)
[10:55:11] [PASSED] 0x7D45 (METEORLAKE)
[10:55:11] [PASSED] 0x7D55 (METEORLAKE)
[10:55:11] [PASSED] 0x7D60 (METEORLAKE)
[10:55:11] [PASSED] 0x7DD5 (METEORLAKE)
[10:55:11] [PASSED] 0x6420 (LUNARLAKE)
[10:55:11] [PASSED] 0x64A0 (LUNARLAKE)
[10:55:11] [PASSED] 0x64B0 (LUNARLAKE)
[10:55:11] [PASSED] 0xE202 (BATTLEMAGE)
[10:55:11] [PASSED] 0xE209 (BATTLEMAGE)
[10:55:11] [PASSED] 0xE20B (BATTLEMAGE)
[10:55:11] [PASSED] 0xE20C (BATTLEMAGE)
[10:55:11] [PASSED] 0xE20D (BATTLEMAGE)
[10:55:11] [PASSED] 0xE210 (BATTLEMAGE)
[10:55:11] [PASSED] 0xE211 (BATTLEMAGE)
[10:55:11] [PASSED] 0xE212 (BATTLEMAGE)
[10:55:11] [PASSED] 0xE216 (BATTLEMAGE)
[10:55:11] [PASSED] 0xE220 (BATTLEMAGE)
[10:55:11] [PASSED] 0xE221 (BATTLEMAGE)
[10:55:11] [PASSED] 0xE222 (BATTLEMAGE)
[10:55:11] [PASSED] 0xE223 (BATTLEMAGE)
[10:55:11] [PASSED] 0xB080 (PANTHERLAKE)
[10:55:11] [PASSED] 0xB081 (PANTHERLAKE)
[10:55:11] [PASSED] 0xB082 (PANTHERLAKE)
[10:55:11] [PASSED] 0xB083 (PANTHERLAKE)
[10:55:11] [PASSED] 0xB084 (PANTHERLAKE)
[10:55:11] [PASSED] 0xB085 (PANTHERLAKE)
[10:55:11] [PASSED] 0xB086 (PANTHERLAKE)
[10:55:11] [PASSED] 0xB087 (PANTHERLAKE)
[10:55:11] [PASSED] 0xB08F (PANTHERLAKE)
[10:55:11] [PASSED] 0xB090 (PANTHERLAKE)
[10:55:11] [PASSED] 0xB0A0 (PANTHERLAKE)
[10:55:11] [PASSED] 0xB0A1 (PANTHERLAKE)
[10:55:11] [PASSED] 0xB0B0 (PANTHERLAKE)
[10:55:11] [PASSED] 0xFD80 (PANTHERLAKE)
[10:55:11] [PASSED] 0xFD81 (PANTHERLAKE)
[10:55:11] [PASSED] 0xD740 (NOVALAKE_S)
[10:55:11] [PASSED] 0xD741 (NOVALAKE_S)
[10:55:11] [PASSED] 0xD742 (NOVALAKE_S)
[10:55:11] [PASSED] 0xD743 (NOVALAKE_S)
[10:55:11] [PASSED] 0xD745 (NOVALAKE_S)
[10:55:11] [PASSED] 0xD74A (NOVALAKE_S)
[10:55:11] [PASSED] 0xD74B (NOVALAKE_S)
[10:55:11] [PASSED] 0x674C (CRESCENTISLAND)
[10:55:11] [PASSED] 0x674D (CRESCENTISLAND)
[10:55:11] [PASSED] 0x674E (CRESCENTISLAND)
[10:55:11] [PASSED] 0x674F (CRESCENTISLAND)
[10:55:11] [PASSED] 0x6750 (CRESCENTISLAND)
[10:55:11] [PASSED] 0x6751 (CRESCENTISLAND)
[10:55:11] [PASSED] 0xD750 (NOVALAKE_P)
[10:55:11] [PASSED] 0xD751 (NOVALAKE_P)
[10:55:11] [PASSED] 0xD752 (NOVALAKE_P)
[10:55:11] [PASSED] 0xD753 (NOVALAKE_P)
[10:55:11] [PASSED] 0xD754 (NOVALAKE_P)
[10:55:11] [PASSED] 0xD755 (NOVALAKE_P)
[10:55:11] [PASSED] 0xD756 (NOVALAKE_P)
[10:55:11] [PASSED] 0xD757 (NOVALAKE_P)
[10:55:11] [PASSED] 0xD75F (NOVALAKE_P)
[10:55:11] =============== [PASSED] check_platform_desc ===============
[10:55:11] ===================== [PASSED] xe_pci ======================
[10:55:11] ============= xe_rtp_tables_test (5 subtests) ==============
[10:55:11] ================== xe_rtp_table_gt_test  ===================
[10:55:11] [PASSED] gt_was/14011060649
[10:55:11] [PASSED] gt_was/14011059788
[10:55:11] [PASSED] gt_was/14015795083
[10:55:11] [PASSED] gt_was/16021867713
[10:55:11] [PASSED] gt_was/14019449301
[10:55:11] [PASSED] gt_was/16028005424
[10:55:11] [PASSED] gt_was/14026578760
[10:55:11] [PASSED] gt_was/1409420604
[10:55:11] [PASSED] gt_was/1408615072
[10:55:11] [PASSED] gt_was/22010523718
[10:55:11] [PASSED] gt_was/14011006942
[10:55:11] [PASSED] gt_was/14014830051
[10:55:11] [PASSED] gt_was/18018781329
[10:55:11] [PASSED] gt_was/1509235366
[10:55:11] [PASSED] gt_was/18018781329
[10:55:11] [PASSED] gt_was/16016694945
[10:55:11] [PASSED] gt_was/14018575942
[10:55:11] [PASSED] gt_was/22016670082
[10:55:11] [PASSED] gt_was/22016670082
[10:55:11] [PASSED] gt_was/14017421178
[10:55:11] [PASSED] gt_was/16025250150
[10:55:11] [PASSED] gt_was/14021871409
[10:55:11] [PASSED] gt_was/16021865536
[10:55:11] [PASSED] gt_was/14021486841
[10:55:11] [PASSED] gt_was/14025160223
[10:55:11] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[10:55:11] [PASSED] gt_was/14025635424
[10:55:11] [PASSED] gt_was/16028005424
[10:55:11] ============== [PASSED] xe_rtp_table_gt_test ===============
[10:55:11] ================== xe_rtp_table_gt_test  ===================
[10:55:11] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[10:55:11] [PASSED] gt_tunings/Tuning: 32B Access Enable
[10:55:11] [PASSED] gt_tunings/Tuning: L3 cache
[10:55:11] [PASSED] gt_tunings/Tuning: L3 cache - media
[10:55:11] [PASSED] gt_tunings/Tuning: Compression Overfetch
[10:55:11] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[10:55:11] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[10:55:11] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[10:55:11] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[10:55:11] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[10:55:11] [PASSED] gt_tunings/Tuning: Stateless compression control
[10:55:11] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[10:55:11] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[10:55:11] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[10:55:11] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[10:55:11] [PASSED] gt_tunings/Tuning: Force All Non-Compressible Memory Reads to be 256B Overfetches
[10:55:11] ============== [PASSED] xe_rtp_table_gt_test ===============
[10:55:11] ================== xe_rtp_table_oob_test  ==================
[10:55:11] [PASSED] oob_was/1607983814
[10:55:11] [PASSED] oob_was/16010904313
[10:55:11] [PASSED] oob_was/18022495364
[10:55:11] [PASSED] oob_was/22012773006
[10:55:11] [PASSED] oob_was/14014475959
[10:55:11] [PASSED] oob_was/22011391025
[10:55:11] [PASSED] oob_was/22012727170
[10:55:11] [PASSED] oob_was/22012727685
[10:55:11] [PASSED] oob_was/22016596838
[10:55:11] [PASSED] oob_was/18020744125
[10:55:11] [PASSED] oob_was/1409600907
[10:55:11] [PASSED] oob_was/22014953428
[10:55:11] [PASSED] oob_was/16017236439
[10:55:11] [PASSED] oob_was/14019821291
[10:55:11] [PASSED] oob_was/14015076503
[10:55:11] [PASSED] oob_was/22016122933
[10:55:11] [PASSED] oob_was/14018913170
[10:55:11] [PASSED] oob_was/14018094691
[10:55:11] [PASSED] oob_was/18024947630
[10:55:11] [PASSED] oob_was/16022287689
[10:55:11] [PASSED] oob_was/13011645652
[10:55:11] [PASSED] oob_was/14022293748
[10:55:11] [PASSED] oob_was/22019794406
[10:55:11] [PASSED] oob_was/22019338487
[10:55:11] [PASSED] oob_was/16023588340
[10:55:11] [PASSED] oob_was/14019789679
[10:55:11] [PASSED] oob_was/14022866841
[10:55:11] [PASSED] oob_was/16021333562
[10:55:11] [PASSED] oob_was/14016712196
[10:55:11] [PASSED] oob_was/14015568240
[10:55:11] [PASSED] oob_was/18013179988
[10:55:11] [PASSED] oob_was/1508761755
[10:55:11] [PASSED] oob_was/16023105232
[10:55:11] [PASSED] oob_was/16026508708
[10:55:11] [PASSED] oob_was/14020001231
[10:55:11] [PASSED] oob_was/16023683509
[10:55:11] [PASSED] oob_was/14025515070
[10:55:11] [PASSED] oob_was/15015404425_disable
[10:55:11] [PASSED] oob_was/16026007364
[10:55:11] [PASSED] oob_was/14020316580
[10:55:11] [PASSED] oob_was/14025883347
[10:55:11] [PASSED] oob_was/16029380221
[10:55:11] [PASSED] oob_was/22022079272
[10:55:11] [PASSED] oob_was/16029897822
[10:55:11] [PASSED] oob_was/14027054324
[10:55:11] [PASSED] oob_was/14025941587
[10:55:11] [PASSED] oob_was/16030224309
[10:55:11] ============== [PASSED] xe_rtp_table_oob_test ==============
[10:55:11] ================ xe_rtp_table_dev_oob_test  ================
[10:55:11] [PASSED] device_oob_was/22010954014
[10:55:11] [PASSED] device_oob_was/15015404425
[10:55:11] [PASSED] device_oob_was/22019338487_display
[10:55:11] [PASSED] device_oob_was/14022085890
[10:55:11] [PASSED] device_oob_was/14026539277
[10:55:11] [PASSED] device_oob_was/14026633728
[10:55:11] [PASSED] device_oob_was/14026746987
[10:55:11] [PASSED] device_oob_was/14026779378
[10:55:11] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[10:55:11] ========== xe_rtp_table_missing_upper_bound_test  ==========
[10:55:11] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865
[10:55:11] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037
[10:55:11] [PASSED] register_whitelist/1806527549
[10:55:11] [PASSED] register_whitelist/allow_read_ctx_timestamp
[10:55:11] [PASSED] register_whitelist/allow_read_queue_timestamp
[10:55:11] [PASSED] register_whitelist/16014440446
[10:55:11] [PASSED] register_whitelist/16017236439
[10:55:11] [PASSED] register_whitelist/16020183090
[10:55:11] [PASSED] register_whitelist/14024997852
[10:55:11] [PASSED] register_whitelist/14024997852
[10:55:11] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ======
[10:55:11] =============== [PASSED] xe_rtp_tables_test ================
[10:55:11] =================== xe_rtp (3 subtests) ====================
[10:55:11] =================== xe_rtp_rules_tests  ====================
[10:55:11] [PASSED] no
[10:55:11] [PASSED] yes
[10:55:11] [PASSED] no-and-no
[10:55:11] [PASSED] no-and-yes
[10:55:11] [PASSED] yes-and-no
[10:55:11] [PASSED] yes-and-yes
[10:55:11] [PASSED] no-or-no
[10:55:11] [PASSED] no-or-yes
[10:55:11] [PASSED] yes-or-no
[10:55:11] [PASSED] yes-or-yes
[10:55:11] [PASSED] no-yes-or-yes-no
[10:55:11] [PASSED] no-yes-or-yes-yes
[10:55:11] [PASSED] yes-yes-or-no-yes
[10:55:11] [PASSED] yes-yes-or-yes-yes
[10:55:11] [PASSED] no-no-or-yes-or-no
[10:55:11] [PASSED] or
[10:55:11] [PASSED] or-yes
[10:55:11] [PASSED] or-no
[10:55:11] [PASSED] yes-or
[10:55:11] [PASSED] no-or
[10:55:11] [PASSED] no-or-or-yes
[10:55:11] [PASSED] yes-or-or-no
[10:55:11] [PASSED] no-or-or-no
[10:55:11] [PASSED] missing-context-engine-class
[10:55:11] [PASSED] missing-context-engine-class-or-yes
[10:55:11] [PASSED] missing-context-engine-class-or-or-yes
[10:55:11] =============== [PASSED] xe_rtp_rules_tests ================
[10:55:11] =============== xe_rtp_process_to_sr_tests  ================
[10:55:11] [PASSED] coalesce-same-reg
[10:55:11] [PASSED] coalesce-same-reg-literal-and-func
[10:55:11] [PASSED] no-match-no-add
[10:55:11] [PASSED] two-regs-two-entries
[10:55:11] [PASSED] clr-one-set-other
[10:55:11] [PASSED] set-field
[10:55:11] [PASSED] conflict-duplicate
[10:55:11] [PASSED] conflict-not-disjoint
[10:55:11] [PASSED] conflict-not-disjoint-literal-and-func
[10:55:11] [PASSED] conflict-reg-type
[10:55:11] [PASSED] bad-mcr-reg-forced-to-regular
[10:55:11] [PASSED] bad-regular-reg-forced-to-mcr
[10:55:11] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[10:55:11] ================== xe_rtp_process_tests  ===================
[10:55:11] [PASSED] active1
[10:55:11] [PASSED] active2
[10:55:11] [PASSED] active-inactive
[10:55:11] [PASSED] inactive-active
[10:55:11] [PASSED] inactive-active-inactive
[10:55:11] [PASSED] inactive-inactive-inactive
[10:55:11] ============== [PASSED] xe_rtp_process_tests ===============
[10:55:11] ===================== [PASSED] xe_rtp ======================
[10:55:11] ==================== xe_wa (1 subtest) =====================
[10:55:11] ======================== xe_wa_gt  =========================
[10:55:11] [PASSED] TIGERLAKE B0
[10:55:11] [PASSED] DG1 A0
[10:55:11] [PASSED] DG1 B0
[10:55:11] [PASSED] ALDERLAKE_S A0
[10:55:11] [PASSED] ALDERLAKE_S B0
[10:55:11] [PASSED] ALDERLAKE_S C0
[10:55:11] [PASSED] ALDERLAKE_S D0
[10:55:11] [PASSED] ALDERLAKE_P A0
[10:55:11] [PASSED] ALDERLAKE_P B0
[10:55:11] [PASSED] ALDERLAKE_P C0
[10:55:11] [PASSED] ALDERLAKE_S RPLS D0
[10:55:11] [PASSED] ALDERLAKE_P RPLU E0
[10:55:11] [PASSED] DG2 G10 C0
[10:55:11] [PASSED] DG2 G11 B1
[10:55:11] [PASSED] DG2 G12 A1
[10:55:11] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[10:55:11] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[10:55:11] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[10:55:11] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[10:55:11] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[10:55:11] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[10:55:11] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[10:55:11] ==================== [PASSED] xe_wa_gt =====================
[10:55:11] ====================== [PASSED] xe_wa ======================
[10:55:11] ============================================================
[10:55:11] Testing complete. Ran 821 tests: passed: 793, skipped: 28
[10:55:11] Elapsed time: 36.576s total, 1.848s configuring, 33.961s building, 0.717s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[10:55:11] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[10:55:13] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[10:55:38] Starting KUnit Kernel (1/1)...
[10:55:38] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[10:55:38] ============ drm_test_pick_cmdline (2 subtests) ============
[10:55:38] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[10:55:38] =============== drm_test_pick_cmdline_named  ===============
[10:55:38] [PASSED] NTSC
[10:55:38] [PASSED] NTSC-J
[10:55:38] [PASSED] PAL
[10:55:38] [PASSED] PAL-M
[10:55:38] =========== [PASSED] drm_test_pick_cmdline_named ===========
[10:55:38] ============== [PASSED] drm_test_pick_cmdline ==============
[10:55:38] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[10:55:38] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[10:55:38] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[10:55:38] =========== drm_validate_clone_mode (2 subtests) ===========
[10:55:38] ============== drm_test_check_in_clone_mode  ===============
[10:55:38] [PASSED] in_clone_mode
[10:55:38] [PASSED] not_in_clone_mode
[10:55:38] ========== [PASSED] drm_test_check_in_clone_mode ===========
[10:55:38] =============== drm_test_check_valid_clones  ===============
[10:55:38] [PASSED] not_in_clone_mode
[10:55:38] [PASSED] valid_clone
[10:55:38] [PASSED] invalid_clone
[10:55:38] =========== [PASSED] drm_test_check_valid_clones ===========
[10:55:38] ============= [PASSED] drm_validate_clone_mode =============
[10:55:38] ============= drm_validate_modeset (1 subtest) =============
[10:55:38] [PASSED] drm_test_check_connector_changed_modeset
[10:55:38] ============== [PASSED] drm_validate_modeset ===============
[10:55:38] ====== drm_test_bridge_get_current_state (1 subtest) =======
[10:55:38] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[10:55:38] ======== [PASSED] drm_test_bridge_get_current_state ========
[10:55:38] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[10:55:38] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[10:55:38] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[10:55:38] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[10:55:38] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[10:55:38] ============== drm_bridge_alloc (2 subtests) ===============
[10:55:38] [PASSED] drm_test_drm_bridge_alloc_basic
[10:55:38] [PASSED] drm_test_drm_bridge_alloc_get_put
[10:55:38] ================ [PASSED] drm_bridge_alloc =================
[10:55:38] ============= drm_bridge_bus_fmt (5 subtests) ==============
[10:55:38] [PASSED] drm_test_bridge_rgb_yuv_rgb
[10:55:38] [PASSED] drm_test_bridge_must_convert_to_yuv444
[10:55:38] [PASSED] drm_test_bridge_hdmi_auto_rgb
[10:55:38] [PASSED] drm_test_bridge_auto_first
[10:55:38] [PASSED] drm_test_bridge_rgb_yuv_no_path
[10:55:38] =============== [PASSED] drm_bridge_bus_fmt ================
[10:55:38] ============= drm_cmdline_parser (40 subtests) =============
[10:55:38] [PASSED] drm_test_cmdline_force_d_only
[10:55:38] [PASSED] drm_test_cmdline_force_D_only_dvi
[10:55:38] [PASSED] drm_test_cmdline_force_D_only_hdmi
[10:55:38] [PASSED] drm_test_cmdline_force_D_only_not_digital
[10:55:38] [PASSED] drm_test_cmdline_force_e_only
[10:55:38] [PASSED] drm_test_cmdline_res
[10:55:38] [PASSED] drm_test_cmdline_res_vesa
[10:55:38] [PASSED] drm_test_cmdline_res_vesa_rblank
[10:55:38] [PASSED] drm_test_cmdline_res_rblank
[10:55:38] [PASSED] drm_test_cmdline_res_bpp
[10:55:38] [PASSED] drm_test_cmdline_res_refresh
[10:55:38] [PASSED] drm_test_cmdline_res_bpp_refresh
[10:55:38] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[10:55:38] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[10:55:38] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[10:55:38] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[10:55:38] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[10:55:38] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[10:55:38] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[10:55:38] [PASSED] drm_test_cmdline_res_margins_force_on
[10:55:38] [PASSED] drm_test_cmdline_res_vesa_margins
[10:55:38] [PASSED] drm_test_cmdline_name
[10:55:38] [PASSED] drm_test_cmdline_name_bpp
[10:55:38] [PASSED] drm_test_cmdline_name_option
[10:55:38] [PASSED] drm_test_cmdline_name_bpp_option
[10:55:38] [PASSED] drm_test_cmdline_rotate_0
[10:55:38] [PASSED] drm_test_cmdline_rotate_90
[10:55:38] [PASSED] drm_test_cmdline_rotate_180
[10:55:38] [PASSED] drm_test_cmdline_rotate_270
[10:55:38] [PASSED] drm_test_cmdline_hmirror
[10:55:38] [PASSED] drm_test_cmdline_vmirror
[10:55:38] [PASSED] drm_test_cmdline_margin_options
[10:55:38] [PASSED] drm_test_cmdline_multiple_options
[10:55:38] [PASSED] drm_test_cmdline_bpp_extra_and_option
[10:55:38] [PASSED] drm_test_cmdline_extra_and_option
[10:55:38] [PASSED] drm_test_cmdline_freestanding_options
[10:55:38] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[10:55:38] [PASSED] drm_test_cmdline_panel_orientation
[10:55:38] ================ drm_test_cmdline_invalid  =================
[10:55:38] [PASSED] margin_only
[10:55:38] [PASSED] interlace_only
[10:55:38] [PASSED] res_missing_x
[10:55:38] [PASSED] res_missing_y
[10:55:38] [PASSED] res_bad_y
[10:55:38] [PASSED] res_missing_y_bpp
[10:55:38] [PASSED] res_bad_bpp
[10:55:38] [PASSED] res_bad_refresh
[10:55:38] [PASSED] res_bpp_refresh_force_on_off
[10:55:38] [PASSED] res_invalid_mode
[10:55:38] [PASSED] res_bpp_wrong_place_mode
[10:55:38] [PASSED] name_bpp_refresh
[10:55:38] [PASSED] name_refresh
[10:55:38] [PASSED] name_refresh_wrong_mode
[10:55:38] [PASSED] name_refresh_invalid_mode
[10:55:38] [PASSED] rotate_multiple
[10:55:38] [PASSED] rotate_invalid_val
[10:55:38] [PASSED] rotate_truncated
[10:55:38] [PASSED] invalid_option
[10:55:38] [PASSED] invalid_tv_option
[10:55:38] [PASSED] truncated_tv_option
[10:55:38] ============ [PASSED] drm_test_cmdline_invalid =============
[10:55:38] =============== drm_test_cmdline_tv_options  ===============
[10:55:38] [PASSED] NTSC
[10:55:38] [PASSED] NTSC_443
[10:55:38] [PASSED] NTSC_J
[10:55:38] [PASSED] PAL
[10:55:38] [PASSED] PAL_M
[10:55:38] [PASSED] PAL_N
[10:55:38] [PASSED] SECAM
[10:55:38] [PASSED] MONO_525
[10:55:38] [PASSED] MONO_625
[10:55:38] =========== [PASSED] drm_test_cmdline_tv_options ===========
[10:55:38] =============== [PASSED] drm_cmdline_parser ================
[10:55:38] ========== drmm_connector_hdmi_init (20 subtests) ==========
[10:55:38] [PASSED] drm_test_connector_hdmi_init_valid
[10:55:38] [PASSED] drm_test_connector_hdmi_init_bpc_8
[10:55:38] [PASSED] drm_test_connector_hdmi_init_bpc_10
[10:55:38] [PASSED] drm_test_connector_hdmi_init_bpc_12
[10:55:38] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[10:55:38] [PASSED] drm_test_connector_hdmi_init_bpc_null
[10:55:38] [PASSED] drm_test_connector_hdmi_init_formats_empty
[10:55:38] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[10:55:38] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[10:55:38] [PASSED] supported_formats=0x9 yuv420_allowed=1
[10:55:38] [PASSED] supported_formats=0x9 yuv420_allowed=0
[10:55:38] [PASSED] supported_formats=0x5 yuv420_allowed=1
[10:55:38] [PASSED] supported_formats=0x5 yuv420_allowed=0
[10:55:38] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[10:55:38] [PASSED] drm_test_connector_hdmi_init_null_ddc
[10:55:38] [PASSED] drm_test_connector_hdmi_init_null_product
[10:55:38] [PASSED] drm_test_connector_hdmi_init_null_vendor
[10:55:38] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[10:55:38] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[10:55:38] [PASSED] drm_test_connector_hdmi_init_product_valid
[10:55:38] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[10:55:38] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[10:55:38] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[10:55:38] ========= drm_test_connector_hdmi_init_type_valid  =========
[10:55:38] [PASSED] HDMI-A
[10:55:38] [PASSED] HDMI-B
[10:55:38] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[10:55:38] ======== drm_test_connector_hdmi_init_type_invalid  ========
[10:55:38] [PASSED] Unknown
[10:55:38] [PASSED] VGA
[10:55:38] [PASSED] DVI-I
[10:55:38] [PASSED] DVI-D
[10:55:38] [PASSED] DVI-A
[10:55:38] [PASSED] Composite
[10:55:38] [PASSED] SVIDEO
[10:55:38] [PASSED] LVDS
[10:55:38] [PASSED] Component
[10:55:38] [PASSED] DIN
[10:55:38] [PASSED] DP
[10:55:38] [PASSED] TV
[10:55:38] [PASSED] eDP
[10:55:38] [PASSED] Virtual
[10:55:38] [PASSED] DSI
[10:55:38] [PASSED] DPI
[10:55:38] [PASSED] Writeback
[10:55:38] [PASSED] SPI
[10:55:38] [PASSED] USB
[10:55:38] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[10:55:38] ============ [PASSED] drmm_connector_hdmi_init =============
[10:55:38] ============= drmm_connector_init (3 subtests) =============
[10:55:38] [PASSED] drm_test_drmm_connector_init
[10:55:38] [PASSED] drm_test_drmm_connector_init_null_ddc
[10:55:38] ========= drm_test_drmm_connector_init_type_valid  =========
[10:55:38] [PASSED] Unknown
[10:55:38] [PASSED] VGA
[10:55:38] [PASSED] DVI-I
[10:55:38] [PASSED] DVI-D
[10:55:38] [PASSED] DVI-A
[10:55:38] [PASSED] Composite
[10:55:38] [PASSED] SVIDEO
[10:55:38] [PASSED] LVDS
[10:55:38] [PASSED] Component
[10:55:38] [PASSED] DIN
[10:55:38] [PASSED] DP
[10:55:38] [PASSED] HDMI-A
[10:55:38] [PASSED] HDMI-B
[10:55:38] [PASSED] TV
[10:55:38] [PASSED] eDP
[10:55:38] [PASSED] Virtual
[10:55:38] [PASSED] DSI
[10:55:38] [PASSED] DPI
[10:55:38] [PASSED] Writeback
[10:55:38] [PASSED] SPI
[10:55:38] [PASSED] USB
[10:55:38] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[10:55:38] =============== [PASSED] drmm_connector_init ===============
[10:55:38] ========= drm_connector_dynamic_init (6 subtests) ==========
[10:55:38] [PASSED] drm_test_drm_connector_dynamic_init
[10:55:38] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[10:55:38] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[10:55:38] [PASSED] drm_test_drm_connector_dynamic_init_properties
[10:55:38] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[10:55:38] [PASSED] Unknown
[10:55:38] [PASSED] VGA
[10:55:38] [PASSED] DVI-I
[10:55:38] [PASSED] DVI-D
[10:55:38] [PASSED] DVI-A
[10:55:38] [PASSED] Composite
[10:55:38] [PASSED] SVIDEO
[10:55:38] [PASSED] LVDS
[10:55:38] [PASSED] Component
[10:55:38] [PASSED] DIN
[10:55:38] [PASSED] DP
[10:55:38] [PASSED] HDMI-A
[10:55:38] [PASSED] HDMI-B
[10:55:38] [PASSED] TV
[10:55:38] [PASSED] eDP
[10:55:38] [PASSED] Virtual
[10:55:38] [PASSED] DSI
[10:55:38] [PASSED] DPI
[10:55:38] [PASSED] Writeback
[10:55:38] [PASSED] SPI
[10:55:38] [PASSED] USB
[10:55:38] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[10:55:38] ======== drm_test_drm_connector_dynamic_init_name  =========
[10:55:38] [PASSED] Unknown
[10:55:38] [PASSED] VGA
[10:55:38] [PASSED] DVI-I
[10:55:38] [PASSED] DVI-D
[10:55:38] [PASSED] DVI-A
[10:55:38] [PASSED] Composite
[10:55:38] [PASSED] SVIDEO
[10:55:38] [PASSED] LVDS
[10:55:38] [PASSED] Component
[10:55:38] [PASSED] DIN
[10:55:38] [PASSED] DP
[10:55:38] [PASSED] HDMI-A
[10:55:38] [PASSED] HDMI-B
[10:55:38] [PASSED] TV
[10:55:38] [PASSED] eDP
[10:55:38] [PASSED] Virtual
[10:55:38] [PASSED] DSI
[10:55:38] [PASSED] DPI
[10:55:38] [PASSED] Writeback
[10:55:38] [PASSED] SPI
[10:55:38] [PASSED] USB
[10:55:38] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[10:55:38] =========== [PASSED] drm_connector_dynamic_init ============
[10:55:38] ==== drm_connector_dynamic_register_early (4 subtests) =====
[10:55:38] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[10:55:38] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[10:55:38] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[10:55:38] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[10:55:38] ====== [PASSED] drm_connector_dynamic_register_early =======
[10:55:38] ======= drm_connector_dynamic_register (7 subtests) ========
[10:55:38] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[10:55:38] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[10:55:38] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[10:55:38] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[10:55:38] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[10:55:38] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[10:55:38] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[10:55:38] ========= [PASSED] drm_connector_dynamic_register ==========
[10:55:38] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[10:55:38] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[10:55:38] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[10:55:38] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[10:55:38] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[10:55:38] ========== drm_test_get_tv_mode_from_name_valid  ===========
[10:55:38] [PASSED] NTSC
[10:55:38] [PASSED] NTSC-443
[10:55:38] [PASSED] NTSC-J
[10:55:38] [PASSED] PAL
[10:55:38] [PASSED] PAL-M
[10:55:38] [PASSED] PAL-N
[10:55:38] [PASSED] SECAM
[10:55:38] [PASSED] Mono
[10:55:38] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[10:55:38] [PASSED] drm_test_get_tv_mode_from_name_truncated
[10:55:38] ============ [PASSED] drm_get_tv_mode_from_name ============
[10:55:38] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[10:55:38] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[10:55:38] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[10:55:38] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[10:55:38] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[10:55:38] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[10:55:38] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[10:55:38] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[10:55:38] [PASSED] VIC 96
[10:55:38] [PASSED] VIC 97
[10:55:38] [PASSED] VIC 101
[10:55:38] [PASSED] VIC 102
[10:55:38] [PASSED] VIC 106
[10:55:38] [PASSED] VIC 107
[10:55:38] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[10:55:38] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[10:55:38] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[10:55:38] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[10:55:38] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[10:55:38] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[10:55:38] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[10:55:38] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[10:55:38] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[10:55:38] [PASSED] Automatic
[10:55:38] [PASSED] Full
[10:55:38] [PASSED] Limited 16:235
[10:55:38] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[10:55:38] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[10:55:38] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[10:55:38] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[10:55:38] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[10:55:38] [PASSED] RGB
[10:55:38] [PASSED] YUV 4:2:0
[10:55:38] [PASSED] YUV 4:2:2
[10:55:38] [PASSED] YUV 4:4:4
[10:55:38] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[10:55:38] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[10:55:38] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[10:55:38] ============= drm_damage_helper (21 subtests) ==============
[10:55:38] [PASSED] drm_test_damage_iter_no_damage
[10:55:38] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[10:55:38] [PASSED] drm_test_damage_iter_no_damage_src_moved
[10:55:38] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[10:55:38] [PASSED] drm_test_damage_iter_no_damage_not_visible
[10:55:38] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[10:55:38] [PASSED] drm_test_damage_iter_no_damage_no_fb
[10:55:38] [PASSED] drm_test_damage_iter_simple_damage
[10:55:38] [PASSED] drm_test_damage_iter_single_damage
[10:55:38] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[10:55:38] [PASSED] drm_test_damage_iter_single_damage_outside_src
[10:55:38] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[10:55:38] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[10:55:38] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[10:55:38] [PASSED] drm_test_damage_iter_single_damage_src_moved
[10:55:38] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[10:55:38] [PASSED] drm_test_damage_iter_damage
[10:55:38] [PASSED] drm_test_damage_iter_damage_one_intersect
[10:55:38] [PASSED] drm_test_damage_iter_damage_one_outside
[10:55:38] [PASSED] drm_test_damage_iter_damage_src_moved
[10:55:38] [PASSED] drm_test_damage_iter_damage_not_visible
[10:55:38] ================ [PASSED] drm_damage_helper ================
[10:55:38] ============== drm_dp_mst_helper (3 subtests) ==============
[10:55:38] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[10:55:38] [PASSED] Clock 154000 BPP 30 DSC disabled
[10:55:38] [PASSED] Clock 234000 BPP 30 DSC disabled
[10:55:38] [PASSED] Clock 297000 BPP 24 DSC disabled
[10:55:38] [PASSED] Clock 332880 BPP 24 DSC enabled
[10:55:38] [PASSED] Clock 324540 BPP 24 DSC enabled
[10:55:38] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[10:55:38] ============== drm_test_dp_mst_calc_pbn_div  ===============
[10:55:38] [PASSED] Link rate 2000000 lane count 4
[10:55:38] [PASSED] Link rate 2000000 lane count 2
[10:55:38] [PASSED] Link rate 2000000 lane count 1
[10:55:38] [PASSED] Link rate 1350000 lane count 4
[10:55:38] [PASSED] Link rate 1350000 lane count 2
[10:55:38] [PASSED] Link rate 1350000 lane count 1
[10:55:38] [PASSED] Link rate 1000000 lane count 4
[10:55:38] [PASSED] Link rate 1000000 lane count 2
[10:55:38] [PASSED] Link rate 1000000 lane count 1
[10:55:38] [PASSED] Link rate 810000 lane count 4
[10:55:38] [PASSED] Link rate 810000 lane count 2
[10:55:38] [PASSED] Link rate 810000 lane count 1
[10:55:38] [PASSED] Link rate 540000 lane count 4
[10:55:38] [PASSED] Link rate 540000 lane count 2
[10:55:38] [PASSED] Link rate 540000 lane count 1
[10:55:38] [PASSED] Link rate 270000 lane count 4
[10:55:38] [PASSED] Link rate 270000 lane count 2
[10:55:38] [PASSED] Link rate 270000 lane count 1
[10:55:38] [PASSED] Link rate 162000 lane count 4
[10:55:38] [PASSED] Link rate 162000 lane count 2
[10:55:38] [PASSED] Link rate 162000 lane count 1
[10:55:38] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[10:55:38] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[10:55:38] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[10:55:38] [PASSED] DP_POWER_UP_PHY with port number
[10:55:38] [PASSED] DP_POWER_DOWN_PHY with port number
[10:55:38] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[10:55:38] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[10:55:38] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[10:55:38] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[10:55:38] [PASSED] DP_QUERY_PAYLOAD with port number
[10:55:38] [PASSED] DP_QUERY_PAYLOAD with VCPI
[10:55:38] [PASSED] DP_REMOTE_DPCD_READ with port number
[10:55:38] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[10:55:38] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[10:55:38] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[10:55:38] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[10:55:38] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[10:55:38] [PASSED] DP_REMOTE_I2C_READ with port number
[10:55:38] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[10:55:38] [PASSED] DP_REMOTE_I2C_READ with transactions array
[10:55:38] [PASSED] DP_REMOTE_I2C_WRITE with port number
[10:55:38] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[10:55:38] [PASSED] DP_REMOTE_I2C_WRITE with data array
[10:55:38] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[10:55:38] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[10:55:38] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[10:55:38] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[10:55:38] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[10:55:38] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[10:55:38] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[10:55:38] ================ [PASSED] drm_dp_mst_helper ================
[10:55:38] ================== drm_exec (7 subtests) ===================
[10:55:38] [PASSED] sanitycheck
[10:55:38] [PASSED] test_lock
[10:55:38] [PASSED] test_lock_unlock
[10:55:38] [PASSED] test_duplicates
[10:55:38] [PASSED] test_prepare
[10:55:38] [PASSED] test_prepare_array
[10:55:38] [PASSED] test_multiple_loops
[10:55:38] ==================== [PASSED] drm_exec =====================
[10:55:38] =========== drm_format_helper_test (17 subtests) ===========
[10:55:38] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[10:55:38] [PASSED] single_pixel_source_buffer
[10:55:38] [PASSED] single_pixel_clip_rectangle
[10:55:38] [PASSED] well_known_colors
[10:55:38] [PASSED] destination_pitch
[10:55:38] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[10:55:38] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[10:55:38] [PASSED] single_pixel_source_buffer
[10:55:38] [PASSED] single_pixel_clip_rectangle
[10:55:38] [PASSED] well_known_colors
[10:55:38] [PASSED] destination_pitch
[10:55:38] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[10:55:38] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[10:55:38] [PASSED] single_pixel_source_buffer
[10:55:38] [PASSED] single_pixel_clip_rectangle
[10:55:38] [PASSED] well_known_colors
[10:55:38] [PASSED] destination_pitch
[10:55:38] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[10:55:38] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[10:55:38] [PASSED] single_pixel_source_buffer
[10:55:38] [PASSED] single_pixel_clip_rectangle
[10:55:38] [PASSED] well_known_colors
[10:55:38] [PASSED] destination_pitch
[10:55:38] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[10:55:38] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[10:55:38] [PASSED] single_pixel_source_buffer
[10:55:38] [PASSED] single_pixel_clip_rectangle
[10:55:38] [PASSED] well_known_colors
[10:55:38] [PASSED] destination_pitch
[10:55:38] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[10:55:38] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[10:55:38] [PASSED] single_pixel_source_buffer
[10:55:38] [PASSED] single_pixel_clip_rectangle
[10:55:38] [PASSED] well_known_colors
[10:55:38] [PASSED] destination_pitch
[10:55:38] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[10:55:38] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[10:55:38] [PASSED] single_pixel_source_buffer
[10:55:38] [PASSED] single_pixel_clip_rectangle
[10:55:38] [PASSED] well_known_colors
[10:55:38] [PASSED] destination_pitch
[10:55:38] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[10:55:38] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[10:55:38] [PASSED] single_pixel_source_buffer
[10:55:38] [PASSED] single_pixel_clip_rectangle
[10:55:38] [PASSED] well_known_colors
[10:55:38] [PASSED] destination_pitch
[10:55:38] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[10:55:38] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[10:55:38] [PASSED] single_pixel_source_buffer
[10:55:38] [PASSED] single_pixel_clip_rectangle
[10:55:38] [PASSED] well_known_colors
[10:55:38] [PASSED] destination_pitch
[10:55:38] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[10:55:38] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[10:55:38] [PASSED] single_pixel_source_buffer
[10:55:38] [PASSED] single_pixel_clip_rectangle
[10:55:38] [PASSED] well_known_colors
[10:55:38] [PASSED] destination_pitch
[10:55:38] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[10:55:38] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[10:55:38] [PASSED] single_pixel_source_buffer
[10:55:38] [PASSED] single_pixel_clip_rectangle
[10:55:38] [PASSED] well_known_colors
[10:55:38] [PASSED] destination_pitch
[10:55:38] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[10:55:38] ============== drm_test_fb_xrgb8888_to_mono  ===============
[10:55:38] [PASSED] single_pixel_source_buffer
[10:55:38] [PASSED] single_pixel_clip_rectangle
[10:55:38] [PASSED] well_known_colors
[10:55:38] [PASSED] destination_pitch
[10:55:38] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[10:55:38] ==================== drm_test_fb_swab  =====================
[10:55:38] [PASSED] single_pixel_source_buffer
[10:55:38] [PASSED] single_pixel_clip_rectangle
[10:55:38] [PASSED] well_known_colors
[10:55:38] [PASSED] destination_pitch
[10:55:38] ================ [PASSED] drm_test_fb_swab =================
[10:55:38] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[10:55:38] [PASSED] single_pixel_source_buffer
[10:55:38] [PASSED] single_pixel_clip_rectangle
[10:55:38] [PASSED] well_known_colors
[10:55:38] [PASSED] destination_pitch
[10:55:38] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[10:55:38] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[10:55:38] [PASSED] single_pixel_source_buffer
[10:55:38] [PASSED] single_pixel_clip_rectangle
[10:55:38] [PASSED] well_known_colors
[10:55:38] [PASSED] destination_pitch
[10:55:38] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[10:55:38] ================= drm_test_fb_clip_offset  =================
[10:55:38] [PASSED] pass through
[10:55:38] [PASSED] horizontal offset
[10:55:38] [PASSED] vertical offset
[10:55:38] [PASSED] horizontal and vertical offset
[10:55:38] [PASSED] horizontal offset (custom pitch)
[10:55:38] [PASSED] vertical offset (custom pitch)
[10:55:38] [PASSED] horizontal and vertical offset (custom pitch)
[10:55:38] ============= [PASSED] drm_test_fb_clip_offset =============
[10:55:38] =================== drm_test_fb_memcpy  ====================
[10:55:38] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[10:55:38] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[10:55:38] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[10:55:38] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[10:55:38] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[10:55:38] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[10:55:38] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[10:55:38] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[10:55:38] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[10:55:38] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[10:55:38] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[10:55:38] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[10:55:38] =============== [PASSED] drm_test_fb_memcpy ================
[10:55:38] ============= [PASSED] drm_format_helper_test ==============
[10:55:38] ================= drm_format (18 subtests) =================
[10:55:38] [PASSED] drm_test_format_block_width_invalid
[10:55:38] [PASSED] drm_test_format_block_width_one_plane
[10:55:38] [PASSED] drm_test_format_block_width_two_plane
[10:55:38] [PASSED] drm_test_format_block_width_three_plane
[10:55:38] [PASSED] drm_test_format_block_width_tiled
[10:55:38] [PASSED] drm_test_format_block_height_invalid
[10:55:38] [PASSED] drm_test_format_block_height_one_plane
[10:55:38] [PASSED] drm_test_format_block_height_two_plane
[10:55:38] [PASSED] drm_test_format_block_height_three_plane
[10:55:38] [PASSED] drm_test_format_block_height_tiled
[10:55:38] [PASSED] drm_test_format_min_pitch_invalid
[10:55:38] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[10:55:38] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[10:55:38] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[10:55:38] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[10:55:38] [PASSED] drm_test_format_min_pitch_two_plane
[10:55:38] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[10:55:38] [PASSED] drm_test_format_min_pitch_tiled
[10:55:38] =================== [PASSED] drm_format ====================
[10:55:38] ============== drm_framebuffer (10 subtests) ===============
[10:55:38] ========== drm_test_framebuffer_check_src_coords  ==========
[10:55:38] [PASSED] Success: source fits into fb
[10:55:38] [PASSED] Fail: overflowing fb with x-axis coordinate
[10:55:38] [PASSED] Fail: overflowing fb with y-axis coordinate
[10:55:38] [PASSED] Fail: overflowing fb with source width
[10:55:38] [PASSED] Fail: overflowing fb with source height
[10:55:38] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[10:55:38] [PASSED] drm_test_framebuffer_cleanup
[10:55:38] =============== drm_test_framebuffer_create  ===============
[10:55:38] [PASSED] ABGR8888 normal sizes
[10:55:38] [PASSED] ABGR8888 max sizes
[10:55:38] [PASSED] ABGR8888 pitch greater than min required
[10:55:38] [PASSED] ABGR8888 pitch less than min required
[10:55:38] [PASSED] ABGR8888 Invalid width
[10:55:38] [PASSED] ABGR8888 Invalid buffer handle
[10:55:38] [PASSED] No pixel format
[10:55:38] [PASSED] ABGR8888 Width 0
[10:55:38] [PASSED] ABGR8888 Height 0
[10:55:38] [PASSED] ABGR8888 Out of bound height * pitch combination
[10:55:38] [PASSED] ABGR8888 Large buffer offset
[10:55:38] [PASSED] ABGR8888 Buffer offset for inexistent plane
[10:55:38] [PASSED] ABGR8888 Invalid flag
[10:55:38] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[10:55:38] [PASSED] ABGR8888 Valid buffer modifier
[10:55:38] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[10:55:38] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[10:55:38] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[10:55:38] [PASSED] NV12 Normal sizes
[10:55:38] [PASSED] NV12 Max sizes
[10:55:38] [PASSED] NV12 Invalid pitch
[10:55:38] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[10:55:38] [PASSED] NV12 different  modifier per-plane
[10:55:38] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[10:55:38] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[10:55:38] [PASSED] NV12 Modifier for inexistent plane
[10:55:38] [PASSED] NV12 Handle for inexistent plane
[10:55:38] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[10:55:38] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[10:55:38] [PASSED] YVU420 Normal sizes
[10:55:38] [PASSED] YVU420 Max sizes
[10:55:38] [PASSED] YVU420 Invalid pitch
[10:55:38] [PASSED] YVU420 Different pitches
[10:55:38] [PASSED] YVU420 Different buffer offsets/pitches
[10:55:38] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[10:55:38] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[10:55:38] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[10:55:38] [PASSED] YVU420 Valid modifier
[10:55:38] [PASSED] YVU420 Different modifiers per plane
[10:55:38] [PASSED] YVU420 Modifier for inexistent plane
[10:55:38] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[10:55:38] [PASSED] X0L2 Normal sizes
[10:55:38] [PASSED] X0L2 Max sizes
[10:55:38] [PASSED] X0L2 Invalid pitch
[10:55:38] [PASSED] X0L2 Pitch greater than minimum required
[10:55:38] [PASSED] X0L2 Handle for inexistent plane
[10:55:38] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[10:55:38] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[10:55:38] [PASSED] X0L2 Valid modifier
[10:55:38] [PASSED] X0L2 Modifier for inexistent plane
[10:55:38] =========== [PASSED] drm_test_framebuffer_create ===========
[10:55:38] [PASSED] drm_test_framebuffer_free
[10:55:38] [PASSED] drm_test_framebuffer_init
[10:55:38] [PASSED] drm_test_framebuffer_init_bad_format
[10:55:38] [PASSED] drm_test_framebuffer_init_dev_mismatch
[10:55:38] [PASSED] drm_test_framebuffer_lookup
[10:55:38] [PASSED] drm_test_framebuffer_lookup_inexistent
[10:55:38] [PASSED] drm_test_framebuffer_modifiers_not_supported
[10:55:38] ================= [PASSED] drm_framebuffer =================
[10:55:38] ================ drm_gem_shmem (8 subtests) ================
[10:55:38] [PASSED] drm_gem_shmem_test_obj_create
[10:55:38] [PASSED] drm_gem_shmem_test_obj_create_private
[10:55:38] [PASSED] drm_gem_shmem_test_pin_pages
[10:55:38] [PASSED] drm_gem_shmem_test_vmap
[10:55:38] [PASSED] drm_gem_shmem_test_get_sg_table
[10:55:38] [PASSED] drm_gem_shmem_test_get_pages_sgt
[10:55:38] [PASSED] drm_gem_shmem_test_madvise
[10:55:38] [PASSED] drm_gem_shmem_test_purge
[10:55:38] ================== [PASSED] drm_gem_shmem ==================
[10:55:38] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[10:55:38] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[10:55:38] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[10:55:38] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[10:55:38] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[10:55:38] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[10:55:38] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[10:55:38] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[10:55:38] [PASSED] Automatic
[10:55:38] [PASSED] Full
[10:55:38] [PASSED] Limited 16:235
[10:55:38] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[10:55:38] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[10:55:38] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[10:55:38] [PASSED] drm_test_check_disable_connector
[10:55:38] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[10:55:38] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[10:55:38] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[10:55:38] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[10:55:38] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[10:55:38] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[10:55:38] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[10:55:38] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[10:55:38] [PASSED] drm_test_check_output_bpc_dvi
[10:55:38] [PASSED] drm_test_check_output_bpc_format_vic_1
[10:55:38] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[10:55:38] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[10:55:38] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[10:55:38] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[10:55:38] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[10:55:38] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[10:55:38] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[10:55:38] ============ drm_test_check_hdmi_color_format  =============
[10:55:38] [PASSED] AUTO -> RGB
[10:55:38] [PASSED] YCBCR422 -> YUV422
[10:55:38] [PASSED] YCBCR420 -> YUV420
[10:55:38] [PASSED] YCBCR444 -> YUV444
[10:55:38] [PASSED] RGB -> RGB
[10:55:38] ======== [PASSED] drm_test_check_hdmi_color_format =========
[10:55:38] ======== drm_test_check_hdmi_color_format_420_only  ========
[10:55:38] [PASSED] RGB should fail
[10:55:38] [PASSED] YUV444 should fail
[10:55:38] [PASSED] YUV422 should fail
[10:55:38] [PASSED] YUV420 should work
[10:55:38] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[10:55:38] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[10:55:38] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[10:55:38] [PASSED] drm_test_check_broadcast_rgb_value
[10:55:38] [PASSED] drm_test_check_bpc_8_value
[10:55:38] [PASSED] drm_test_check_bpc_10_value
[10:55:38] [PASSED] drm_test_check_bpc_12_value
[10:55:38] [PASSED] drm_test_check_format_value
[10:55:38] [PASSED] drm_test_check_tmds_char_value
[10:55:38] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[10:55:38] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[10:55:38] [PASSED] drm_test_check_mode_valid
[10:55:38] [PASSED] drm_test_check_mode_valid_reject
[10:55:38] [PASSED] drm_test_check_mode_valid_reject_rate
[10:55:38] [PASSED] drm_test_check_mode_valid_reject_max_clock
[10:55:38] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[10:55:38] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[10:55:38] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[10:55:38] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[10:55:38] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[10:55:38] [PASSED] drm_test_check_infoframes
[10:55:38] [PASSED] drm_test_check_reject_avi_infoframe
[10:55:38] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[10:55:38] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[10:55:38] [PASSED] drm_test_check_reject_audio_infoframe
[10:55:38] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[10:55:38] ================= drm_managed (2 subtests) =================
[10:55:38] [PASSED] drm_test_managed_release_action
[10:55:38] [PASSED] drm_test_managed_run_action
[10:55:38] =================== [PASSED] drm_managed ===================
[10:55:38] =================== drm_mm (6 subtests) ====================
[10:55:38] [PASSED] drm_test_mm_init
[10:55:38] [PASSED] drm_test_mm_debug
[10:55:38] [PASSED] drm_test_mm_align32
[10:55:38] [PASSED] drm_test_mm_align64
[10:55:38] [PASSED] drm_test_mm_lowest
[10:55:38] [PASSED] drm_test_mm_highest
[10:55:38] ===================== [PASSED] drm_mm ======================
[10:55:38] ============= drm_modes_analog_tv (5 subtests) =============
[10:55:38] [PASSED] drm_test_modes_analog_tv_mono_576i
[10:55:38] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[10:55:38] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[10:55:38] [PASSED] drm_test_modes_analog_tv_pal_576i
[10:55:38] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[10:55:38] =============== [PASSED] drm_modes_analog_tv ===============
[10:55:38] ============== drm_panic_helper (3 subtests) ===============
[10:55:38] ============= drm_test_panic_screen_user_map  ==============
[10:55:38] [PASSED] Panic screen user, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[10:55:38] [PASSED] Panic screen user, mode: 494 x 494 	XR24 little-endian (0x34325258)
[10:55:38] [PASSED] Panic screen user, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[10:55:38] [PASSED] Panic screen user, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[10:55:38] [PASSED] Panic screen user, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[10:55:38] [PASSED] Panic screen kmsg, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[10:55:38] [PASSED] Panic screen kmsg, mode: 494 x 494 	XR24 little-endian (0x34325258)
[10:55:38] [PASSED] Panic screen kmsg, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[10:55:38] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[10:55:38] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[10:55:38] ========= [PASSED] drm_test_panic_screen_user_map ==========
[10:55:38] ============= drm_test_panic_screen_user_page  =============
[10:55:38] [PASSED] Panic screen user, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[10:55:38] [PASSED] Panic screen user, mode: 494 x 494 	XR24 little-endian (0x34325258)
[10:55:38] [PASSED] Panic screen user, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[10:55:38] [PASSED] Panic screen user, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[10:55:38] [PASSED] Panic screen user, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[10:55:38] [PASSED] Panic screen kmsg, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[10:55:38] [PASSED] Panic screen kmsg, mode: 494 x 494 	XR24 little-endian (0x34325258)
[10:55:39] [PASSED] Panic screen kmsg, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[10:55:39] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[10:55:39] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[10:55:39] ========= [PASSED] drm_test_panic_screen_user_page =========
[10:55:39] ========== drm_test_panic_screen_user_set_pixel  ===========
[10:55:39] [PASSED] Panic screen user, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[10:55:39] [PASSED] Panic screen user, mode: 494 x 494 	XR24 little-endian (0x34325258)
[10:55:39] [PASSED] Panic screen user, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[10:55:39] [PASSED] Panic screen user, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[10:55:39] [PASSED] Panic screen user, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[10:55:39] [PASSED] Panic screen kmsg, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[10:55:39] [PASSED] Panic screen kmsg, mode: 494 x 494 	XR24 little-endian (0x34325258)
[10:55:39] [PASSED] Panic screen kmsg, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[10:55:39] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[10:55:39] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[10:55:39] ====== [PASSED] drm_test_panic_screen_user_set_pixel =======
[10:55:39] ================ [PASSED] drm_panic_helper =================
[10:55:39] ============== drm_plane_helper (2 subtests) ===============
[10:55:39] =============== drm_test_check_plane_state  ================
[10:55:39] [PASSED] clipping_simple
[10:55:39] [PASSED] clipping_rotate_reflect
[10:55:39] [PASSED] positioning_simple
[10:55:39] [PASSED] upscaling
[10:55:39] [PASSED] downscaling
[10:55:39] [PASSED] rounding1
[10:55:39] [PASSED] rounding2
[10:55:39] [PASSED] rounding3
[10:55:39] [PASSED] rounding4
[10:55:39] =========== [PASSED] drm_test_check_plane_state ============
[10:55:39] =========== drm_test_check_invalid_plane_state  ============
[10:55:39] [PASSED] positioning_invalid
[10:55:39] [PASSED] upscaling_invalid
[10:55:39] [PASSED] downscaling_invalid
[10:55:39] ======= [PASSED] drm_test_check_invalid_plane_state ========
[10:55:39] ================ [PASSED] drm_plane_helper =================
[10:55:39] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[10:55:39] ====== drm_test_connector_helper_tv_get_modes_check  =======
[10:55:39] [PASSED] None
[10:55:39] [PASSED] PAL
[10:55:39] [PASSED] NTSC
[10:55:39] [PASSED] Both, NTSC Default
[10:55:39] [PASSED] Both, PAL Default
[10:55:39] [PASSED] Both, NTSC Default, with PAL on command-line
[10:55:39] [PASSED] Both, PAL Default, with NTSC on command-line
[10:55:39] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[10:55:39] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[10:55:39] ================== drm_rect (9 subtests) ===================
[10:55:39] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[10:55:39] [PASSED] drm_test_rect_clip_scaled_not_clipped
[10:55:39] [PASSED] drm_test_rect_clip_scaled_clipped
[10:55:39] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[10:55:39] ================= drm_test_rect_intersect  =================
[10:55:39] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[10:55:39] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[10:55:39] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[10:55:39] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[10:55:39] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[10:55:39] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[10:55:39] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[10:55:39] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[10:55:39] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[10:55:39] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[10:55:39] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[10:55:39] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[10:55:39] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[10:55:39] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[10:55:39] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[10:55:39] ============= [PASSED] drm_test_rect_intersect =============
[10:55:39] ================ drm_test_rect_calc_hscale  ================
[10:55:39] [PASSED] normal use
[10:55:39] [PASSED] out of max range
[10:55:39] [PASSED] out of min range
[10:55:39] [PASSED] zero dst
[10:55:39] [PASSED] negative src
[10:55:39] [PASSED] negative dst
[10:55:39] ============ [PASSED] drm_test_rect_calc_hscale ============
[10:55:39] ================ drm_test_rect_calc_vscale  ================
[10:55:39] [PASSED] normal use
[10:55:39] [PASSED] out of max range
[10:55:39] [PASSED] out of min range
[10:55:39] [PASSED] zero dst
[10:55:39] [PASSED] negative src
[10:55:39] [PASSED] negative dst
[10:55:39] ============ [PASSED] drm_test_rect_calc_vscale ============
[10:55:39] ================== drm_test_rect_rotate  ===================
[10:55:39] [PASSED] reflect-x
[10:55:39] [PASSED] reflect-y
[10:55:39] [PASSED] rotate-0
[10:55:39] [PASSED] rotate-90
[10:55:39] [PASSED] rotate-180
[10:55:39] [PASSED] rotate-270
[10:55:39] ============== [PASSED] drm_test_rect_rotate ===============
[10:55:39] ================ drm_test_rect_rotate_inv  =================
[10:55:39] [PASSED] reflect-x
[10:55:39] [PASSED] reflect-y
[10:55:39] [PASSED] rotate-0
[10:55:39] [PASSED] rotate-90
[10:55:39] [PASSED] rotate-180
[10:55:39] [PASSED] rotate-270
[10:55:39] ============ [PASSED] drm_test_rect_rotate_inv =============
[10:55:39] ==================== [PASSED] drm_rect =====================
[10:55:39] ============ drm_sysfb_modeset_test (1 subtest) ============
[10:55:39] ============ drm_test_sysfb_build_fourcc_list  =============
[10:55:39] [PASSED] no native formats
[10:55:39] [PASSED] XRGB8888 as native format
[10:55:39] [PASSED] remove duplicates
[10:55:39] [PASSED] convert alpha formats
[10:55:39] [PASSED] random formats
[10:55:39] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[10:55:39] ============= [PASSED] drm_sysfb_modeset_test ==============
[10:55:39] ================== drm_fixp (2 subtests) ===================
[10:55:39] [PASSED] drm_test_int2fixp
[10:55:39] [PASSED] drm_test_sm2fixp
[10:55:39] ==================== [PASSED] drm_fixp =====================
[10:55:39] ============================================================
[10:55:39] Testing complete. Ran 667 tests: passed: 667
[10:55:39] Elapsed time: 27.417s total, 1.749s configuring, 25.251s building, 0.411s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[10:55:39] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[10:55:41] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[10:55:51] Starting KUnit Kernel (1/1)...
[10:55:51] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[10:55:51] ================= ttm_device (5 subtests) ==================
[10:55:51] [PASSED] ttm_device_init_basic
[10:55:51] [PASSED] ttm_device_init_multiple
[10:55:51] [PASSED] ttm_device_fini_basic
[10:55:51] [PASSED] ttm_device_init_no_vma_man
[10:55:51] ================== ttm_device_init_pools  ==================
[10:55:51] [PASSED] No DMA allocations, no DMA32 required
[10:55:51] [PASSED] DMA allocations, DMA32 required
[10:55:51] [PASSED] No DMA allocations, DMA32 required
[10:55:51] [PASSED] DMA allocations, no DMA32 required
[10:55:51] ============== [PASSED] ttm_device_init_pools ==============
[10:55:51] =================== [PASSED] ttm_device ====================
[10:55:51] ================== ttm_pool (8 subtests) ===================
[10:55:51] ================== ttm_pool_alloc_basic  ===================
[10:55:51] [PASSED] One page
[10:55:51] [PASSED] More than one page
[10:55:51] [PASSED] Above the allocation limit
[10:55:51] [PASSED] One page, with coherent DMA mappings enabled
[10:55:51] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[10:55:51] ============== [PASSED] ttm_pool_alloc_basic ===============
[10:55:51] ============== ttm_pool_alloc_basic_dma_addr  ==============
[10:55:51] [PASSED] One page
[10:55:51] [PASSED] More than one page
[10:55:51] [PASSED] Above the allocation limit
[10:55:51] [PASSED] One page, with coherent DMA mappings enabled
[10:55:51] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[10:55:51] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[10:55:51] [PASSED] ttm_pool_alloc_order_caching_match
[10:55:51] [PASSED] ttm_pool_alloc_caching_mismatch
[10:55:51] [PASSED] ttm_pool_alloc_order_mismatch
[10:55:51] [PASSED] ttm_pool_free_dma_alloc
[10:55:51] [PASSED] ttm_pool_free_no_dma_alloc
[10:55:51] [PASSED] ttm_pool_fini_basic
[10:55:51] ==================== [PASSED] ttm_pool =====================
[10:55:51] ================ ttm_resource (8 subtests) =================
[10:55:51] ================= ttm_resource_init_basic  =================
[10:55:51] [PASSED] Init resource in TTM_PL_SYSTEM
[10:55:51] [PASSED] Init resource in TTM_PL_VRAM
[10:55:51] [PASSED] Init resource in a private placement
[10:55:51] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[10:55:51] ============= [PASSED] ttm_resource_init_basic =============
[10:55:51] [PASSED] ttm_resource_init_pinned
[10:55:51] [PASSED] ttm_resource_fini_basic
[10:55:51] [PASSED] ttm_resource_manager_init_basic
[10:55:51] [PASSED] ttm_resource_manager_usage_basic
[10:55:51] [PASSED] ttm_resource_manager_set_used_basic
[10:55:51] [PASSED] ttm_sys_man_alloc_basic
[10:55:51] [PASSED] ttm_sys_man_free_basic
[10:55:51] ================== [PASSED] ttm_resource ===================
[10:55:51] =================== ttm_tt (15 subtests) ===================
[10:55:51] ==================== ttm_tt_init_basic  ====================
[10:55:51] [PASSED] Page-aligned size
[10:55:51] [PASSED] Extra pages requested
[10:55:51] ================ [PASSED] ttm_tt_init_basic ================
[10:55:51] [PASSED] ttm_tt_init_misaligned
[10:55:51] [PASSED] ttm_tt_fini_basic
[10:55:51] [PASSED] ttm_tt_fini_sg
[10:55:51] [PASSED] ttm_tt_fini_shmem
[10:55:51] [PASSED] ttm_tt_create_basic
[10:55:51] [PASSED] ttm_tt_create_invalid_bo_type
[10:55:51] [PASSED] ttm_tt_create_ttm_exists
[10:55:51] [PASSED] ttm_tt_create_failed
[10:55:51] [PASSED] ttm_tt_destroy_basic
[10:55:51] [PASSED] ttm_tt_populate_null_ttm
[10:55:51] [PASSED] ttm_tt_populate_populated_ttm
[10:55:51] [PASSED] ttm_tt_unpopulate_basic
[10:55:51] [PASSED] ttm_tt_unpopulate_empty_ttm
[10:55:51] [PASSED] ttm_tt_swapin_basic
[10:55:51] ===================== [PASSED] ttm_tt ======================
[10:55:51] =================== ttm_bo (14 subtests) ===================
[10:55:51] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[10:55:51] [PASSED] Cannot be interrupted and sleeps
[10:55:51] [PASSED] Cannot be interrupted, locks straight away
[10:55:51] [PASSED] Can be interrupted, sleeps
[10:55:51] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[10:55:51] [PASSED] ttm_bo_reserve_locked_no_sleep
[10:55:51] [PASSED] ttm_bo_reserve_no_wait_ticket
[10:55:51] [PASSED] ttm_bo_reserve_double_resv
[10:55:51] [PASSED] ttm_bo_reserve_interrupted
[10:55:51] [PASSED] ttm_bo_reserve_deadlock
[10:55:51] [PASSED] ttm_bo_unreserve_basic
[10:55:51] [PASSED] ttm_bo_unreserve_pinned
[10:55:51] [PASSED] ttm_bo_unreserve_bulk
[10:55:51] [PASSED] ttm_bo_fini_basic
[10:55:51] [PASSED] ttm_bo_fini_shared_resv
[10:55:51] [PASSED] ttm_bo_pin_basic
[10:55:51] [PASSED] ttm_bo_pin_unpin_resource
[10:55:51] [PASSED] ttm_bo_multiple_pin_one_unpin
[10:55:51] ===================== [PASSED] ttm_bo ======================
[10:55:51] ============== ttm_bo_validate (22 subtests) ===============
[10:55:51] ============== ttm_bo_init_reserved_sys_man  ===============
[10:55:51] [PASSED] Buffer object for userspace
[10:55:51] [PASSED] Kernel buffer object
[10:55:51] [PASSED] Shared buffer object
[10:55:51] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[10:55:51] ============== ttm_bo_init_reserved_mock_man  ==============
[10:55:51] [PASSED] Buffer object for userspace
[10:55:51] [PASSED] Kernel buffer object
[10:55:51] [PASSED] Shared buffer object
[10:55:51] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[10:55:51] [PASSED] ttm_bo_init_reserved_resv
[10:55:51] ================== ttm_bo_validate_basic  ==================
[10:55:51] [PASSED] Buffer object for userspace
[10:55:51] [PASSED] Kernel buffer object
[10:55:51] [PASSED] Shared buffer object
[10:55:51] ============== [PASSED] ttm_bo_validate_basic ==============
[10:55:51] [PASSED] ttm_bo_validate_invalid_placement
[10:55:51] ============= ttm_bo_validate_same_placement  ==============
[10:55:51] [PASSED] System manager
[10:55:51] [PASSED] VRAM manager
[10:55:51] ========= [PASSED] ttm_bo_validate_same_placement ==========
[10:55:51] [PASSED] ttm_bo_validate_failed_alloc
[10:55:51] [PASSED] ttm_bo_validate_pinned
[10:55:51] [PASSED] ttm_bo_validate_busy_placement
[10:55:51] ================ ttm_bo_validate_multihop  =================
[10:55:51] [PASSED] Buffer object for userspace
[10:55:51] [PASSED] Kernel buffer object
[10:55:51] [PASSED] Shared buffer object
[10:55:51] ============ [PASSED] ttm_bo_validate_multihop =============
[10:55:51] ========== ttm_bo_validate_no_placement_signaled  ==========
[10:55:51] [PASSED] Buffer object in system domain, no page vector
[10:55:51] [PASSED] Buffer object in system domain with an existing page vector
[10:55:51] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[10:55:51] ======== ttm_bo_validate_no_placement_not_signaled  ========
[10:55:51] [PASSED] Buffer object for userspace
[10:55:51] [PASSED] Kernel buffer object
[10:55:51] [PASSED] Shared buffer object
[10:55:51] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[10:55:51] [PASSED] ttm_bo_validate_move_fence_signaled
[10:55:51] ========= ttm_bo_validate_move_fence_not_signaled  =========
[10:55:51] [PASSED] Waits for GPU
[10:55:51] [PASSED] Tries to lock straight away
[10:55:51] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[10:55:51] [PASSED] ttm_bo_validate_swapout
[10:55:51] [PASSED] ttm_bo_validate_happy_evict
[10:55:51] [PASSED] ttm_bo_validate_all_pinned_evict
[10:55:51] [PASSED] ttm_bo_validate_allowed_only_evict
[10:55:51] [PASSED] ttm_bo_validate_deleted_evict
[10:55:51] [PASSED] ttm_bo_validate_busy_domain_evict
[10:55:51] [PASSED] ttm_bo_validate_evict_gutting
[10:55:51] [PASSED] ttm_bo_validate_recrusive_evict
[10:55:51] ================= [PASSED] ttm_bo_validate =================
[10:55:51] ============================================================
[10:55:51] Testing complete. Ran 102 tests: passed: 102
[10:55:51] Elapsed time: 12.218s total, 1.886s configuring, 10.117s building, 0.174s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/dma-buf/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/dma-buf/.kunitconfig
[10:55:51] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[10:55:53] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[10:56:02] Starting KUnit Kernel (1/1)...
[10:56:02] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[10:56:02] =============== dma-buf-fence (12 subtests) ================
[10:56:02] [PASSED] test_sanitycheck
[10:56:02] [PASSED] test_signaling
[10:56:02] [PASSED] test_add_callback
[10:56:02] [PASSED] test_late_add_callback
[10:56:02] [PASSED] test_rm_callback
[10:56:02] [PASSED] test_late_rm_callback
[10:56:02] [PASSED] test_status
[10:56:02] [PASSED] test_error
[10:56:02] [PASSED] test_wait
[10:56:02] [PASSED] test_wait_timeout
[10:56:02] [PASSED] test_stub
[10:56:02] [SKIPPED] test_race_signal_callback (requires at least 2 CPUs)
[10:56:02] ================== [PASSED] dma-buf-fence ==================
[10:56:02] ============ dma-buf-fence-chain (11 subtests) =============
[10:56:02] [PASSED] test_sanitycheck
[10:56:02] [PASSED] test_find_seqno
[10:56:02] [PASSED] test_find_signaled
[10:56:02] [PASSED] test_find_out_of_order
[10:56:07] [PASSED] test_find_gap
[10:56:07] [PASSED] test_find_race
[10:56:07] [PASSED] test_signal_forward
[10:56:07] [PASSED] test_signal_backward
[10:56:07] [PASSED] test_wait_forward
[10:56:07] [PASSED] test_wait_backward
[10:56:07] [PASSED] test_wait_random
[10:56:07] =============== [PASSED] dma-buf-fence-chain ===============
[10:56:07] ============ dma-buf-fence-unwrap (10 subtests) ============
[10:56:07] [PASSED] test_sanitycheck
[10:56:07] [PASSED] test_unwrap_array
[10:56:07] [PASSED] test_unwrap_chain
[10:56:07] [PASSED] test_unwrap_chain_array
[10:56:07] [PASSED] test_unwrap_merge
[10:56:07] [PASSED] test_unwrap_merge_duplicate
[10:56:07] [PASSED] test_unwrap_merge_seqno
[10:56:07] [PASSED] test_unwrap_merge_order
[10:56:07] [PASSED] test_unwrap_merge_complex
[10:56:07] [PASSED] test_unwrap_merge_complex_seqno
[10:56:07] ============== [PASSED] dma-buf-fence-unwrap ===============
[10:56:07] ================ dma-buf-resv (5 subtests) =================
[10:56:07] [PASSED] test_sanitycheck
[10:56:07] ===================== test_signaling  ======================
[10:56:07] [PASSED] kernel
[10:56:07] [PASSED] write
[10:56:07] [PASSED] read
[10:56:07] [PASSED] bookkeep
[10:56:07] ================= [PASSED] test_signaling ==================
[10:56:07] ====================== test_for_each  ======================
[10:56:07] [PASSED] kernel
[10:56:07] [PASSED] write
[10:56:07] [PASSED] read
[10:56:07] [PASSED] bookkeep
[10:56:07] ================== [PASSED] test_for_each ==================
[10:56:07] ================= test_for_each_unlocked  ==================
[10:56:07] [PASSED] kernel
[10:56:07] [PASSED] write
[10:56:07] [PASSED] read
[10:56:07] [PASSED] bookkeep
[10:56:07] ============= [PASSED] test_for_each_unlocked ==============
[10:56:07] ===================== test_get_fences  =====================
[10:56:07] [PASSED] kernel
[10:56:07] [PASSED] write
[10:56:07] [PASSED] read
[10:56:07] [PASSED] bookkeep
[10:56:07] ================= [PASSED] test_get_fences =================
[10:56:07] ================== [PASSED] dma-buf-resv ===================
[10:56:07] ============================================================
[10:56:07] Testing complete. Ran 50 tests: passed: 49, skipped: 1
[10:56:07] Elapsed time: 15.916s total, 1.864s configuring, 8.731s building, 5.270s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✗ Xe.CI.BAT: failure for Add CPER logging support for CRI (rev4)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 1757 bytes --]

== Series Details ==

Series: Add CPER logging support for CRI (rev4)
URL   : https://patchwork.freedesktop.org/series/169692/
State : failure

== Summary ==

CI Bug Log - changes from xe-5915-3bd4f625aafdf70814dbf075de96e224355c9f1e_BAT -> xe-pw-169692v4_BAT
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with xe-pw-169692v4_BAT absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in xe-pw-169692v4_BAT, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (14 -> 14)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in xe-pw-169692v4_BAT:

### IGT changes ###

#### Possible regressions ####

  * igt@xe_exec_fault_mode@twice-bindexecqueue-prefetch:
    - bat-wcl-1:          [PASS][1] -> [FAIL][2]
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5915-3bd4f625aafdf70814dbf075de96e224355c9f1e/bat-wcl-1/igt@xe_exec_fault_mode@twice-bindexecqueue-prefetch.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/bat-wcl-1/igt@xe_exec_fault_mode@twice-bindexecqueue-prefetch.html

  


Build changes
-------------

  * Linux: xe-5915-3bd4f625aafdf70814dbf075de96e224355c9f1e -> xe-pw-169692v4

  IGT_9138: 9138
  xe-5915-3bd4f625aafdf70814dbf075de96e224355c9f1e: 3bd4f625aafdf70814dbf075de96e224355c9f1e
  xe-pw-169692v4: 169692v4

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/index.html

[-- Attachment #2: Type: text/html, Size: 2342 bytes --]

Re: [PATCH v4 01/12] drm/xe/cper: Add CPER reporting entry point for xe_log

[Nilawar, Badal]

On 09-10-2026 16:13, sashiko-bot@kernel.org wrote:
> Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
> - [Medium] drm/xe: Silent telemetry loss when hardware SIGIDs lack exact RAS data payload
> --
>
> commit a8ad6417f3a91a193b5e9bf972e9a0e60ff46e5a
> Author: Badal Nilawar <badal.nilawar@intel.com>
>
> drm/xe/cper: Add CPER reporting entry point for xe_log
>
> Introduce xe_cper_emit() as the single entry point for emitting
> CPER records from xe_log. Hardware SIGIDs are routed to a hardware
> error helper, and software SIGIDs are left as TODO.
>
>> diff --git a/drivers/gpu/drm/xe/xe_cper.c b/drivers/gpu/drm/xe/xe_cper.c
>> new file mode 100644
>> index 0000000000000..c5caa0e8f496a
>> --- /dev/null
>> +++ b/drivers/gpu/drm/xe/xe_cper.c
> [ ... ]
>> +void xe_cper_emit(struct xe_device *xe, int cper_sev, enum xe_sigid sigid,
>> +		  u32 component, u32 location, const void *data, size_t len,
>> +		  struct va_format *vaf)
>> +{
>> +	if (!xe)
>> +		return;
>> +
>> +	if (is_hw_sigid(sigid)) {
>> +		if (!IS_ERR_OR_NULL(data) && len == sizeof(struct xe_ras_error_class))
>> +			xe_cper_emit_hw_err(xe, cper_sev, sigid, data);
>> +		return;
> [Severity: Medium]
> If a hardware SIGID log entry is missing the expected RAS data payload (e.g.,
> the data pointer is ERR_PTR, NULL, or the length is unexpected), does this
> unconditionally return and drop the telemetry?
>
> Since there is no fallback to emit a software CPER log or print a warning,
> it looks like this could result in a silent loss of hardware error data.

The log entry is not lost: __xe_log_emit() emits the dmesg entry before 
the CPER path, so the hardware error is always reported in dmesg.

A hardware CPER record is built from the firmware error counter, which 
requires the RAS error class; without it there is no meaningful record 
to emit.

All hardware SIGID users (xe_ras.c) pass the error class, so this path 
is only a guard against misuse.

Thanks,
Badal

>
>> +	}
>> +
>> +	/* TODO software CPER */
>> +}

Re: [PATCH v4 02/12] drm/xe/cper: Retrieve the error counter record for CPER reporting

[Nilawar, Badal]

On 09-10-2026 16:16, sashiko-bot@kernel.org wrote:
> Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
> - [High] drm/xe: out-of-bounds array access on informational or reserved RAS errors
> --
>
> commit 27317cc719f71d74be0f7fcd94c5a8fbf53f9e5e
> Author: Badal Nilawar <badal.nilawar@intel.com>
>
> drm/xe/cper: Retrieve the error counter record for CPER reporting
>      
> Retrieve error counter record required to build a CPER record.
>
>> diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
>> index 7a85735c57d58..5cfc9beff8c13 100644
>> --- a/drivers/gpu/drm/xe/xe_ras.c
>> +++ b/drivers/gpu/drm/xe/xe_ras.c
> [ ... ]
>> @@ -284,21 +282,21 @@ static void ras_send_error_event(struct xe_device *xe, u8 severity, u8 component)
>>   {
>>   	struct xe_ras_error_class counter = {0};
>> +	struct xe_ras_get_counter_response response = {0};
>>   	u8 drm_severity, drm_component;
>> -	u32 value;
>>   	int ret;
>>   
>>   	counter.common.severity = severity;
>>   	counter.common.component = component;
>>   
>> -	ret = get_counter(xe, &counter, &value);
>> +	ret = xe_ras_get_counter_response(xe, &counter, &response);
>>   	if (ret)
>>   		return;
>>   
>>   	drm_severity = xe_to_drm_ras_severity(severity);
>>   	drm_component = xe_to_drm_ras_component(component);
>>   
>> -	xe_drm_ras_event(xe, drm_component, drm_severity, value);
>> +	xe_drm_ras_event(xe, drm_component, drm_severity, response.value);
> [Severity: High]
> When firmware returns valid but unmapped values, like
> XE_RAS_SEV_INFORMATIONAL or XE_RAS_COMP_RESERVED, is it possible that
> xe_to_drm_ras_severity() and xe_to_drm_ras_component() will map these to
> their MAX values (DRM_XE_RAS_ERR_SEV_MAX and DRM_XE_RAS_ERR_COMP_MAX)?
>
> If so, does this call to xe_drm_ras_event() cause out-of-bounds array
> accesses?
>
> In drivers/gpu/drm/xe/xe_drm_ras.c:xe_drm_ras_event():
>
>      struct xe_drm_ras_counter *info = ras->info[severity];
>      ...
>      node = &ras->node[severity];
>
>      if (!info || !info[component].name)
>          return;
>
> Since the arrays are sized for the valid drm enum mappings, using the MAX
> values as indices would lead to wild pointer dereferences.

Good catch. This is pre-existing (from 6a9493e47075) and is not 
introduced by this series.

I'll send a separate fix that skips the drm_ras event when the severity 
or component has no drm mapping.

Thanks,
Badal

>
>>   }
>>   
>>   static u8 handle_core_compute_errors(struct xe_ras_error_array *arr)

Re: [PATCH v4 05/12] drm/xe/xe_ras: Add support to retrieve info queue data for CRI

[Nilawar, Badal]

On 09-10-2026 16:10, sashiko-bot@kernel.org wrote:
> Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
> - [Medium] xe_ras: missing validation of operation_status in get_info_queue_data
> --
>
> commit 7080ef5206c9792b353853f321f38646d98e4924
> Author: Badal Nilawar <badal.nilawar@intel.com>
>
> drm/xe/xe_ras: Add support to retrieve info queue data for CRI
>
> Retrieve the RAS info queue data, in multiple chunks, and assemble it into
> a flat buffer. A follow-up patch will use this data to prepare the CPER
> error info.
>
>> diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
>> index 5cfc9beff8c13..900319938fe54 100644
>> --- a/drivers/gpu/drm/xe/xe_ras.c
>> +++ b/drivers/gpu/drm/xe/xe_ras.c
> [ ... ]
>> +static int get_info_queue_data(struct xe_device *xe,
>> +			       struct xe_ras_get_info_queue_request *req,
>> +			       struct xe_ras_get_info_queue_response *out)
>> +{
> [ ... ]
>> +	if (rlen != sizeof(response)) {
>> +		xe_err(xe, "sysctrl: unexpected get info queue data response length %zu (expected %zu)\n",
>> +		       rlen, sizeof(response));
>> +		return -EIO;
>> +	}
>> +
>> +	hdr = &response.queue_response.header;
>> +	xe_dbg(xe, "[RAS]: info queue data: status=%u chunk_size=%u flags=0x%x\n",
>> +	       response.operation_status, hdr->chunk_size, hdr->flags);
>> +
>> +	*out = response;
>> +	return 0;
>> +}
> [Severity: Medium]
> Does this code need to validate response.operation_status and return an error
> if the firmware operation failed?
>
> get_info_queue_data() executes the XE_SYSCTRL_CMD_GET_INFO_QUEUE mailbox
> command to fetch chunks from the firmware. The firmware response includes an
> operation_status field to indicate whether the request was successful or
> rejected (e.g., due to an invalid session ID or out-of-bounds offset).
>
> However, this only logs the status in a debug message and unconditionally
> returns 0 (success). Because it fails to return an error (such as converting
> the status via ras_status_to_errno()), the caller
> xe_ras_drain_info_queue_raw() will proceed to validate and process the
> payload. If the firmware did not populate the payload on error, it will
> contain zeroes or garbage, resulting in a confusing "invalid info queue
> chunk" warning or silent failure, rather than properly halting the fetch
> with the correct error code.

The firmware does not use operation_status for GET_INFO_QUEUE.

It should have been marked reserved like the other unused info queue 
fields, and I missed it in v4.

I'll mark it reserved in v5 and drop it from the debug print.

The field stays in the struct because the response layout is part of the 
firmware ABI.

Each chunk header is still validated by chunk_is_valid() (expected 
offset, non-zero size, bounds) before any data is copied, so a rejected 
or malformed response stops the drain.

Thanks,
Badal

>

Re: [PATCH v4 06/12] drm/xe/cper: Prepare Intel CPER error info records

[Nilawar, Badal]

On 09-10-2026 16:11, sashiko-bot@kernel.org wrote:
> Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
> - [High] xe/cper: missing __packed attributes on CPER structs causes ABI breakage and unaligned access
> --
>
> commit 48cc4e07bb3144fabbe0d059b7aa4e8d590267c1
> Author: Badal Nilawar <badal.nilawar@intel.com>
>
> drm/xe/cper: Prepare Intel CPER error info records
>
> This commit prepares xe_cper_sec_intel_error_info records from RAS info
> queue data. Depending on the error class type, one or more error info
> records may be generated and embedded in the CPER record.
>
>> diff --git a/drivers/gpu/drm/xe/xe_cper.c b/drivers/gpu/drm/xe/xe_cper.c
>> index 1000c78b41e97..7acb503efd118 100644
>> --- a/drivers/gpu/drm/xe/xe_cper.c
>> +++ b/drivers/gpu/drm/xe/xe_cper.c
> [ ... ]
>> +static struct xe_cper_sec_intel_error_info *
>> +build_einfo(const struct xe_ras_error_log *logs, u32 num_logs,
>> +	    const struct xe_ras_error_class *ec, u32 error_count)
>> +{
>> +	u32 queue_len = num_logs * XE_CPER_RAS_LOG_ENTRY_SIZE;
>> +	struct xe_cper_sec_intel_error_info *einfo;
>> +	struct xe_intel_priv_event_entry *entry;
>> +	u32 i;
>> +
>> +	einfo = kzalloc_flex(*einfo, event_queue, queue_len);
>> +	if (!einfo)
>> +		return NULL;
>> +
>> +	einfo->error_count        = error_count;
>> +	einfo->event_queue_length = queue_len;
>> +	einfo->event_queue_count  = num_logs;
>> +	fill_cper_error_class(&einfo->error_class, ec);
>> +
>> +	entry = (struct xe_intel_priv_event_entry *)einfo->event_queue;
>> +	for (i = 0; i < num_logs; i++) {
>> +		entry->entry_length = sizeof_field(struct xe_ras_error_log, error_details);
>> +		entry->timestamp    = logs[i].timestamp;
> [Severity: High]
> Can this assignment cause an alignment fault?
>
> Because xe_cper_sec_intel_error_info is evaluated as 28 bytes in size,
> event_queue starts at offset 28. In xe_intel_priv_event_entry, the
> timestamp is at offset 8. The resulting address for the timestamp field is
> therefore 36 bytes from the kzalloc base, which is not 8-byte aligned.
>
> Writing a 64-bit value to a 4-byte-aligned address can cause a kernel panic
> on architectures that strictly enforce 64-bit alignment.

No, these structures are inside the #pragma pack(push, 1) / #pragma 
pack(pop) block in xe_cper_types.h, so they are packed.

struct xe_cper_sec_intel_error_info is 24 bytes and @timestamp sits at 
offset 4 in struct xe_intel_priv_event_entry.

Because the members are accessed through packed types, the compiler 
emits unaligned-safe accesses, so this can't cause an alignment fault

>
>> +		memcpy(entry->metadata, logs[i].error_details, sizeof(logs[i].error_details));
>> +		entry = (void *)entry + XE_CPER_RAS_LOG_ENTRY_SIZE;
>> +	}
>> +
>> +	return einfo;
>> +}
> [ ... ]
>> diff --git a/drivers/gpu/drm/xe/xe_cper_types.h b/drivers/gpu/drm/xe/xe_cper_types.h
>> index 7612518c9d47b..627c7117f23eb 100644
>> --- a/drivers/gpu/drm/xe/xe_cper_types.h
>> +++ b/drivers/gpu/drm/xe/xe_cper_types.h
> [ ... ]
>> +struct xe_cper_sec_intel_error_info {
>> +	/** @error_class: Error classification */
>> +	struct xe_cper_error_class error_class;
>> +	/** @error_count: Total number of errors recorded */
>> +	u32 error_count;
>> +	/** @event_queue_length: Total byte size of the @event_queue array */
>> +	u32 event_queue_length;
>> +	/** @event_queue_count: Number of entries in @event_queue */
>> +	u32 event_queue_count;
>> +	/** @event_queue: Packed array of &xe_intel_priv_event_entry records */
>> +	u8 event_queue[];
>> +};
>> +
>> +/**
>> + * struct xe_intel_priv_event_entry - Single error event in the event queue
>> + *
>> + * Each entry is variable-length; @entry_length gives the byte size of
>> + * @metadata only (not including @entry_length or @timestamp).
>> + */
>> +struct xe_intel_priv_event_entry {
>> +	/** @entry_length: Byte length of the @metadata payload */
>> +	u32 entry_length;
>> +	/** @timestamp: Timestamp of this event, in firmware ticks */
>> +	u64 timestamp;
>> +	/** @metadata: Event-specific payload bytes */
>> +	u8  metadata[];
>> +};
> [Severity: High]
> Are these structures missing the __packed attribute?
>
> Without it, the compiler injects a 4-byte hole before the timestamp field,
> which also enforces 8-byte alignment for the struct. This implicit padding
> corrupts the intended binary CPER layout, potentially leading to ABI
> breakage when the records are parsed by external tools. It also causes the
> memory alignment issues mentioned above.

No, they are packed by the same #pragma pack block, so there is no hole 
before @timestamp.

Thanks,
Badal

✓ Xe.CI.FULL: success for Add CPER logging support for CRI (rev4)

[Patchwork]

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== Series Details ==

Series: Add CPER logging support for CRI (rev4)
URL   : https://patchwork.freedesktop.org/series/169692/
State : success

== Summary ==

CI Bug Log - changes from xe-5915-3bd4f625aafdf70814dbf075de96e224355c9f1e_FULL -> xe-pw-169692v4_FULL
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (3 -> 3)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in xe-pw-169692v4_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_async_flips@async-flip-suspend-resume@pipe-a-edp-1:
    - shard-ptl:          [PASS][1] -> [ABORT][2] ([Intel XE#9362]) +6 other tests abort
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5915-3bd4f625aafdf70814dbf075de96e224355c9f1e/shard-ptl-4/igt@kms_async_flips@async-flip-suspend-resume@pipe-a-edp-1.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-ptl-2/igt@kms_async_flips@async-flip-suspend-resume@pipe-a-edp-1.html

  * igt@kms_atomic_transition@plane-all-modeset-transition:
    - shard-ptl:          NOTRUN -> [SKIP][3] ([Intel XE#5947])
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-ptl-4/igt@kms_atomic_transition@plane-all-modeset-transition.html

  * igt@kms_big_fb@4-tiled-8bpp-rotate-90:
    - shard-bmg:          NOTRUN -> [SKIP][4] ([Intel XE#2327]) +4 other tests skip
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-10/igt@kms_big_fb@4-tiled-8bpp-rotate-90.html
    - shard-lnl:          NOTRUN -> [SKIP][5] ([Intel XE#1407]) +1 other test skip
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-lnl-7/igt@kms_big_fb@4-tiled-8bpp-rotate-90.html

  * igt@kms_big_fb@linear-16bpp-rotate-270:
    - shard-ptl:          NOTRUN -> [SKIP][6] ([Intel XE#5901]) +1 other test skip
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-ptl-8/igt@kms_big_fb@linear-16bpp-rotate-270.html

  * igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-180-hflip:
    - shard-ptl:          NOTRUN -> [SKIP][7] ([Intel XE#7085])
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-ptl-4/igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-180-hflip.html

  * igt@kms_big_fb@y-tiled-16bpp-rotate-90:
    - shard-lnl:          NOTRUN -> [SKIP][8] ([Intel XE#1124]) +1 other test skip
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-lnl-7/igt@kms_big_fb@y-tiled-16bpp-rotate-90.html

  * igt@kms_big_fb@y-tiled-addfb-size-offset-overflow:
    - shard-ptl:          NOTRUN -> [SKIP][9] ([Intel XE#5851])
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-ptl-8/igt@kms_big_fb@y-tiled-addfb-size-offset-overflow.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-async-flip:
    - shard-bmg:          NOTRUN -> [SKIP][10] ([Intel XE#1124]) +9 other tests skip
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-7/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html

  * igt@kms_big_fb@yf-tiled-64bpp-rotate-180:
    - shard-ptl:          NOTRUN -> [SKIP][11] ([Intel XE#5808]) +14 other tests skip
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-ptl-5/igt@kms_big_fb@yf-tiled-64bpp-rotate-180.html

  * igt@kms_big_fb@yf-tiled-addfb-size-overflow:
    - shard-bmg:          NOTRUN -> [SKIP][12] ([Intel XE#610] / [Intel XE#7387])
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-1/igt@kms_big_fb@yf-tiled-addfb-size-overflow.html

  * igt@kms_bw@connected-linear-tiling-4-displays-target-1920x1080p:
    - shard-bmg:          NOTRUN -> [SKIP][13] ([Intel XE#7679]) +2 other tests skip
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-7/igt@kms_bw@connected-linear-tiling-4-displays-target-1920x1080p.html
    - shard-ptl:          NOTRUN -> [SKIP][14] ([Intel XE#7679]) +1 other test skip
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-ptl-8/igt@kms_bw@connected-linear-tiling-4-displays-target-1920x1080p.html

  * igt@kms_bw@linear-tiling-3-displays-target-2560x1440p:
    - shard-ptl:          NOTRUN -> [SKIP][15] ([Intel XE#367]) +1 other test skip
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-ptl-5/igt@kms_bw@linear-tiling-3-displays-target-2560x1440p.html

  * igt@kms_bw@linear-tiling-4-displays-target-2560x1440p:
    - shard-bmg:          NOTRUN -> [SKIP][16] ([Intel XE#367])
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-5/igt@kms_bw@linear-tiling-4-displays-target-2560x1440p.html

  * igt@kms_ccs@bad-rotation-90-4-tiled-bmg-ccs@pipe-c-edp-1:
    - shard-ptl:          NOTRUN -> [SKIP][17] ([Intel XE#5823] / [Intel XE#6918]) +4 other tests skip
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-ptl-8/igt@kms_ccs@bad-rotation-90-4-tiled-bmg-ccs@pipe-c-edp-1.html

  * igt@kms_ccs@bad-rotation-90-y-tiled-gen12-rc-ccs-cc:
    - shard-bmg:          NOTRUN -> [SKIP][18] ([Intel XE#2887]) +13 other tests skip
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-5/igt@kms_ccs@bad-rotation-90-y-tiled-gen12-rc-ccs-cc.html

  * igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-mc-ccs:
    - shard-ptl:          NOTRUN -> [SKIP][19] ([Intel XE#5822]) +12 other tests skip
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-ptl-5/igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-mc-ccs.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-a-dp-2:
    - shard-bmg:          NOTRUN -> [SKIP][20] ([Intel XE#2652]) +8 other tests skip
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-1/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-a-dp-2.html

  * igt@kms_ccs@crc-primary-suspend-y-tiled-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][21] ([Intel XE#3432])
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-6/igt@kms_ccs@crc-primary-suspend-y-tiled-ccs.html

  * igt@kms_ccs@missing-ccs-buffer-y-tiled-gen12-rc-ccs-cc:
    - shard-lnl:          NOTRUN -> [SKIP][22] ([Intel XE#2887]) +4 other tests skip
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-lnl-7/igt@kms_ccs@missing-ccs-buffer-y-tiled-gen12-rc-ccs-cc.html

  * igt@kms_chamelium_color@ctm-blue-to-red:
    - shard-lnl:          NOTRUN -> [SKIP][23] ([Intel XE#306] / [Intel XE#7358])
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-lnl-7/igt@kms_chamelium_color@ctm-blue-to-red.html

  * igt@kms_chamelium_color@degamma:
    - shard-ptl:          NOTRUN -> [SKIP][24] ([Intel XE#5824])
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-ptl-8/igt@kms_chamelium_color@degamma.html

  * igt@kms_chamelium_color@gamma:
    - shard-bmg:          NOTRUN -> [SKIP][25] ([Intel XE#2325] / [Intel XE#7358])
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-6/igt@kms_chamelium_color@gamma.html

  * igt@kms_chamelium_color_pipeline@plane-ctm3x4:
    - shard-ptl:          NOTRUN -> [SKIP][26] ([Intel XE#8391]) +1 other test skip
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-ptl-8/igt@kms_chamelium_color_pipeline@plane-ctm3x4.html

  * igt@kms_chamelium_color_pipeline@plane-lut1d:
    - shard-bmg:          NOTRUN -> [SKIP][27] ([Intel XE#7358]) +1 other test skip
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-1/igt@kms_chamelium_color_pipeline@plane-lut1d.html

  * igt@kms_chamelium_edid@dp-edid-change-during-hibernate:
    - shard-bmg:          NOTRUN -> [SKIP][28] ([Intel XE#2252]) +8 other tests skip
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-10/igt@kms_chamelium_edid@dp-edid-change-during-hibernate.html

  * igt@kms_chamelium_frames@hdmi-crc-nonplanar-formats:
    - shard-ptl:          NOTRUN -> [SKIP][29] ([Intel XE#2252]) +3 other tests skip
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-ptl-8/igt@kms_chamelium_frames@hdmi-crc-nonplanar-formats.html

  * igt@kms_chamelium_hpd@hdmi-hpd-storm:
    - shard-lnl:          NOTRUN -> [SKIP][30] ([Intel XE#373]) +2 other tests skip
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-lnl-7/igt@kms_chamelium_hpd@hdmi-hpd-storm.html

  * igt@kms_color_pipeline@plane-lut1d-ctm3x4-lut1d@pipe-c-plane-4:
    - shard-lnl:          NOTRUN -> [SKIP][31] ([Intel XE#6969]) +5 other tests skip
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-lnl-7/igt@kms_color_pipeline@plane-lut1d-ctm3x4-lut1d@pipe-c-plane-4.html

  * igt@kms_color_pipeline@plane-lut1d-lut1d@pipe-b-plane-3:
    - shard-ptl:          NOTRUN -> [SKIP][32] ([Intel XE#6969]) +7 other tests skip
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-ptl-4/igt@kms_color_pipeline@plane-lut1d-lut1d@pipe-b-plane-3.html

  * igt@kms_content_protection@dp-mst-type-0-suspend-resume:
    - shard-lnl:          NOTRUN -> [SKIP][33] ([Intel XE#6974])
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-lnl-7/igt@kms_content_protection@dp-mst-type-0-suspend-resume.html

  * igt@kms_content_protection@dp-mst-type-1:
    - shard-bmg:          NOTRUN -> [SKIP][34] ([Intel XE#2390] / [Intel XE#6974])
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-6/igt@kms_content_protection@dp-mst-type-1.html

  * igt@kms_content_protection@legacy@pipe-a-dp-1:
    - shard-bmg:          NOTRUN -> [FAIL][35] ([Intel XE#3304])
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-7/igt@kms_content_protection@legacy@pipe-a-dp-1.html

  * igt@kms_content_protection@lic-type-0-hdcp14@pipe-a-dp-2:
    - shard-bmg:          NOTRUN -> [FAIL][36] ([Intel XE#1178] / [Intel XE#3304] / [Intel XE#7374]) +3 other tests fail
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-5/igt@kms_content_protection@lic-type-0-hdcp14@pipe-a-dp-2.html

  * igt@kms_content_protection@lic-type-1:
    - shard-ptl:          NOTRUN -> [SKIP][37] ([Intel XE#7642]) +2 other tests skip
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-ptl-4/igt@kms_content_protection@lic-type-1.html

  * igt@kms_content_protection@uevent:
    - shard-bmg:          NOTRUN -> [FAIL][38] ([Intel XE#6707] / [Intel XE#7439]) +1 other test fail
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-1/igt@kms_content_protection@uevent.html

  * igt@kms_cursor_crc@cursor-offscreen-32x32:
    - shard-bmg:          NOTRUN -> [SKIP][39] ([Intel XE#2320]) +4 other tests skip
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-7/igt@kms_cursor_crc@cursor-offscreen-32x32.html

  * igt@kms_cursor_crc@cursor-onscreen-512x512:
    - shard-ptl:          NOTRUN -> [SKIP][40] ([Intel XE#5846])
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-ptl-5/igt@kms_cursor_crc@cursor-onscreen-512x512.html

  * igt@kms_cursor_crc@cursor-random-512x170:
    - shard-bmg:          NOTRUN -> [SKIP][41] ([Intel XE#2321] / [Intel XE#7355]) +1 other test skip
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-1/igt@kms_cursor_crc@cursor-random-512x170.html

  * igt@kms_cursor_crc@cursor-random-max-size:
    - shard-ptl:          NOTRUN -> [SKIP][42] ([Intel XE#5900]) +2 other tests skip
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-ptl-4/igt@kms_cursor_crc@cursor-random-max-size.html

  * igt@kms_cursor_crc@cursor-rapid-movement-64x21:
    - shard-lnl:          NOTRUN -> [SKIP][43] ([Intel XE#1424]) +1 other test skip
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-lnl-7/igt@kms_cursor_crc@cursor-rapid-movement-64x21.html

  * igt@kms_cursor_legacy@2x-cursor-vs-flip-atomic:
    - shard-lnl:          NOTRUN -> [SKIP][44] ([Intel XE#309] / [Intel XE#7343])
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-lnl-7/igt@kms_cursor_legacy@2x-cursor-vs-flip-atomic.html

  * igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size:
    - shard-ptl:          NOTRUN -> [SKIP][45] ([Intel XE#5962]) +1 other test skip
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-ptl-8/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size.html

  * igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions:
    - shard-ptl:          NOTRUN -> [SKIP][46] ([Intel XE#5962] / [Intel XE#7343])
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-ptl-5/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html

  * igt@kms_dp_link_training@non-uhbr-mst:
    - shard-lnl:          NOTRUN -> [SKIP][47] ([Intel XE#9536])
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-lnl-7/igt@kms_dp_link_training@non-uhbr-mst.html

  * igt@kms_dsc@dsc-fractional-bpp-ultrajoiner:
    - shard-lnl:          NOTRUN -> [SKIP][48] ([Intel XE#8265])
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-lnl-7/igt@kms_dsc@dsc-fractional-bpp-ultrajoiner.html

  * igt@kms_dsc@dsc-with-bpc-formats-bigjoiner:
    - shard-bmg:          NOTRUN -> [SKIP][49] ([Intel XE#8265]) +1 other test skip
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-5/igt@kms_dsc@dsc-with-bpc-formats-bigjoiner.html

  * igt@kms_dsc@dsc-with-bpc-ultrajoiner:
    - shard-ptl:          NOTRUN -> [SKIP][50] ([Intel XE#5907]) +2 other tests skip
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-ptl-4/igt@kms_dsc@dsc-with-bpc-ultrajoiner.html

  * igt@kms_feature_discovery@chamelium:
    - shard-bmg:          NOTRUN -> [SKIP][51] ([Intel XE#2372] / [Intel XE#7359])
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-1/igt@kms_feature_discovery@chamelium.html

  * igt@kms_feature_discovery@psr1:
    - shard-bmg:          NOTRUN -> [SKIP][52] ([Intel XE#2374] / [Intel XE#6127])
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-6/igt@kms_feature_discovery@psr1.html

  * igt@kms_flip@2x-absolute-wf_vblank-interruptible:
    - shard-ptl:          NOTRUN -> [SKIP][53] ([Intel XE#2316]) +5 other tests skip
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-ptl-8/igt@kms_flip@2x-absolute-wf_vblank-interruptible.html

  * igt@kms_flip@2x-flip-vs-expired-vblank:
    - shard-lnl:          NOTRUN -> [SKIP][54] ([Intel XE#1421]) +2 other tests skip
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-lnl-7/igt@kms_flip@2x-flip-vs-expired-vblank.html

  * igt@kms_flip@2x-plain-flip-fb-recreate:
    - shard-bmg:          NOTRUN -> [FAIL][55] ([Intel XE#5408] / [Intel XE#6266]) +1 other test fail
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-8/igt@kms_flip@2x-plain-flip-fb-recreate.html

  * igt@kms_flip@flip-vs-expired-vblank@a-edp1:
    - shard-lnl:          [PASS][56] -> [FAIL][57] ([Intel XE#301])
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5915-3bd4f625aafdf70814dbf075de96e224355c9f1e/shard-lnl-3/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-lnl-3/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html

  * igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling:
    - shard-ptl:          NOTRUN -> [SKIP][58] ([Intel XE#7178]) +2 other tests skip
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-ptl-4/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-upscaling:
    - shard-lnl:          NOTRUN -> [SKIP][59] ([Intel XE#7178] / [Intel XE#7351])
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-lnl-7/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-upscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-downscaling@pipe-a-default-mode:
    - shard-ptl:          NOTRUN -> [SKIP][60] ([Intel XE#5828]) +3 other tests skip
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-ptl-8/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-downscaling@pipe-a-default-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling:
    - shard-bmg:          NOTRUN -> [SKIP][61] ([Intel XE#7178] / [Intel XE#7349])
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-6/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling:
    - shard-bmg:          NOTRUN -> [SKIP][62] ([Intel XE#7178] / [Intel XE#7351])
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-6/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling.html

  * igt@kms_flip_scaled_crc@flip-p016-linear-to-p016-linear-reflect-x:
    - shard-bmg:          NOTRUN -> [SKIP][63] ([Intel XE#7179])
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-10/igt@kms_flip_scaled_crc@flip-p016-linear-to-p016-linear-reflect-x.html
    - shard-lnl:          NOTRUN -> [SKIP][64] ([Intel XE#7179])
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-lnl-7/igt@kms_flip_scaled_crc@flip-p016-linear-to-p016-linear-reflect-x.html

  * igt@kms_frontbuffer_tracking@drrs-1p-primscrn-pri-shrfb-draw-mmap-wc:
    - shard-lnl:          NOTRUN -> [SKIP][65] ([Intel XE#6312] / [Intel XE#651]) +3 other tests skip
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-lnl-7/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-pri-shrfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@drrs-1p-primscrn-spr-indfb-onoff:
    - shard-ptl:          NOTRUN -> [SKIP][66] ([Intel XE#5800] / [Intel XE#6312]) +10 other tests skip
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-ptl-5/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-spr-indfb-onoff.html

  * igt@kms_frontbuffer_tracking@drrs-argb161616f-draw-render:
    - shard-lnl:          NOTRUN -> [SKIP][67] ([Intel XE#7061] / [Intel XE#7356])
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-lnl-7/igt@kms_frontbuffer_tracking@drrs-argb161616f-draw-render.html

  * igt@kms_frontbuffer_tracking@drrshdr-1p-primscrn-indfb-msflip-blt:
    - shard-ptl:          NOTRUN -> [SKIP][68] ([Intel XE#6312]) +10 other tests skip
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-ptl-8/igt@kms_frontbuffer_tracking@drrshdr-1p-primscrn-indfb-msflip-blt.html

  * igt@kms_frontbuffer_tracking@drrshdr-1p-primscrn-shrfb-pgflip-blt:
    - shard-lnl:          NOTRUN -> [SKIP][69] ([Intel XE#6312]) +2 other tests skip
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-lnl-7/igt@kms_frontbuffer_tracking@drrshdr-1p-primscrn-shrfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@drrshdr-2p-scndscrn-spr-indfb-draw-blt:
    - shard-bmg:          NOTRUN -> [SKIP][70] ([Intel XE#2311]) +49 other tests skip
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-6/igt@kms_frontbuffer_tracking@drrshdr-2p-scndscrn-spr-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff:
    - shard-bmg:          NOTRUN -> [SKIP][71] ([Intel XE#4141]) +12 other tests skip
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-abgr161616f-draw-blt:
    - shard-ptl:          NOTRUN -> [SKIP][72] ([Intel XE#7061] / [Intel XE#7356]) +1 other test skip
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-ptl-4/igt@kms_frontbuffer_tracking@fbcdrrs-abgr161616f-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-argb161616f-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][73] ([Intel XE#7061] / [Intel XE#7356]) +4 other tests skip
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcdrrs-argb161616f-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbchdr-argb161616f-draw-mmap-wc:
    - shard-ptl:          NOTRUN -> [SKIP][74] ([Intel XE#7061]) +1 other test skip
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-ptl-8/igt@kms_frontbuffer_tracking@fbchdr-argb161616f-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbchdr-argb161616f-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][75] ([Intel XE#7061]) +9 other tests skip
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-1/igt@kms_frontbuffer_tracking@fbchdr-argb161616f-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-onoff:
    - shard-ptl:          NOTRUN -> [SKIP][76] ([Intel XE#5812]) +63 other tests skip
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-ptl-8/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-onoff.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-draw-mmap-wc:
    - shard-lnl:          NOTRUN -> [SKIP][77] ([Intel XE#656] / [Intel XE#7905]) +8 other tests skip
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-lnl-7/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcpsrhdr-2p-scndscrn-shrfb-msflip-blt:
    - shard-lnl:          NOTRUN -> [SKIP][78] ([Intel XE#7905]) +12 other tests skip
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-lnl-7/igt@kms_frontbuffer_tracking@fbcpsrhdr-2p-scndscrn-shrfb-msflip-blt.html

  * igt@kms_frontbuffer_tracking@hdr-1p-offscreen-pri-shrfb-draw-mmap-wc:
    - shard-lnl:          NOTRUN -> [SKIP][79] ([Intel XE#7865]) +3 other tests skip
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-lnl-7/igt@kms_frontbuffer_tracking@hdr-1p-offscreen-pri-shrfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@hdr-1p-primscrn-pri-indfb-draw-blt:
    - shard-ptl:          NOTRUN -> [SKIP][80] ([Intel XE#7865]) +21 other tests skip
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-ptl-8/igt@kms_frontbuffer_tracking@hdr-1p-primscrn-pri-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@psrhdr-2p-scndscrn-pri-indfb-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][81] ([Intel XE#2313]) +40 other tests skip
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-1/igt@kms_frontbuffer_tracking@psrhdr-2p-scndscrn-pri-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@psrhdr-abgr161616f-draw-mmap-wc:
    - shard-lnl:          NOTRUN -> [SKIP][82] ([Intel XE#7061]) +1 other test skip
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-lnl-7/igt@kms_frontbuffer_tracking@psrhdr-abgr161616f-draw-mmap-wc.html

  * igt@kms_hdmi_audio_bw@dpms-audio-recovery:
    - shard-lnl:          NOTRUN -> [SKIP][83] ([Intel XE#9312])
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-lnl-7/igt@kms_hdmi_audio_bw@dpms-audio-recovery.html

  * igt@kms_hdr@static-toggle:
    - shard-ptl:          NOTRUN -> [SKIP][84] ([Intel XE#5917] / [Intel XE#6174])
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-ptl-8/igt@kms_hdr@static-toggle.html

  * igt@kms_multipipe_modeset@basic-max-pipe-crc-check:
    - shard-bmg:          NOTRUN -> [SKIP][85] ([Intel XE#7591])
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-1/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html

  * igt@kms_plane@pixel-format-4-tiled-mtl-mc-ccs-modifier-source-clamping:
    - shard-ptl:          NOTRUN -> [SKIP][86] ([Intel XE#7283]) +4 other tests skip
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-ptl-4/igt@kms_plane@pixel-format-4-tiled-mtl-mc-ccs-modifier-source-clamping.html

  * igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-cc-modifier:
    - shard-lnl:          NOTRUN -> [SKIP][87] ([Intel XE#7283]) +1 other test skip
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-lnl-7/igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-cc-modifier.html

  * igt@kms_plane@pixel-format-yf-tiled-ccs-modifier-source-clamping:
    - shard-bmg:          NOTRUN -> [SKIP][88] ([Intel XE#7283]) +1 other test skip
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-6/igt@kms_plane@pixel-format-yf-tiled-ccs-modifier-source-clamping.html

  * igt@kms_plane@plane-panning-bottom-right-suspend:
    - shard-bmg:          [PASS][89] -> [ABORT][90] ([Intel XE#9422]) +1 other test abort
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5915-3bd4f625aafdf70814dbf075de96e224355c9f1e/shard-bmg-3/igt@kms_plane@plane-panning-bottom-right-suspend.html
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-7/igt@kms_plane@plane-panning-bottom-right-suspend.html

  * igt@kms_plane_multiple@2x-tiling-yf:
    - shard-ptl:          NOTRUN -> [SKIP][91] ([Intel XE#4596] / [Intel XE#5854])
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-ptl-4/igt@kms_plane_multiple@2x-tiling-yf.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-5-upscale-20x20@pipe-b:
    - shard-ptl:          NOTRUN -> [SKIP][92] ([Intel XE#6886]) +9 other tests skip
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-ptl-4/igt@kms_plane_scaling@planes-downscale-factor-0-5-upscale-20x20@pipe-b.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-75@pipe-a:
    - shard-bmg:          NOTRUN -> [SKIP][93] ([Intel XE#2763] / [Intel XE#6886]) +4 other tests skip
   [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-1/igt@kms_plane_scaling@planes-downscale-factor-0-75@pipe-a.html

  * igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-75@pipe-a:
    - shard-lnl:          NOTRUN -> [SKIP][94] ([Intel XE#2763] / [Intel XE#6886]) +3 other tests skip
   [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-lnl-7/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-75@pipe-a.html

  * igt@kms_pm_backlight@bad-brightness:
    - shard-bmg:          NOTRUN -> [SKIP][95] ([Intel XE#7376] / [Intel XE#7760] / [Intel XE#870])
   [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-7/igt@kms_pm_backlight@bad-brightness.html

  * igt@kms_pm_dc@dc6-psr:
    - shard-bmg:          NOTRUN -> [SKIP][96] ([Intel XE#7794])
   [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-1/igt@kms_pm_dc@dc6-psr.html

  * igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-sf@pipe-a-edp-1:
    - shard-ptl:          NOTRUN -> [SKIP][97] ([Intel XE#5858])
   [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-ptl-4/igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-sf@pipe-a-edp-1.html

  * igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-sf@pipe-b-edp-1:
    - shard-ptl:          NOTRUN -> [SKIP][98] ([Intel XE#5858] / [Intel XE#7304]) +1 other test skip
   [98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-ptl-4/igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-sf@pipe-b-edp-1.html

  * igt@kms_psr2_sf@pr-cursor-plane-update-sf:
    - shard-lnl:          NOTRUN -> [SKIP][99] ([Intel XE#2893] / [Intel XE#7304]) +1 other test skip
   [99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-lnl-7/igt@kms_psr2_sf@pr-cursor-plane-update-sf.html

  * igt@kms_psr2_sf@pr-overlay-plane-update-continuous-sf:
    - shard-ptl:          NOTRUN -> [SKIP][100] ([Intel XE#7304]) +2 other tests skip
   [100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-ptl-8/igt@kms_psr2_sf@pr-overlay-plane-update-continuous-sf.html

  * igt@kms_psr2_sf@psr2-primary-plane-update-sf-dmg-area-big-fb:
    - shard-bmg:          NOTRUN -> [SKIP][101] ([Intel XE#1489]) +6 other tests skip
   [101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-5/igt@kms_psr2_sf@psr2-primary-plane-update-sf-dmg-area-big-fb.html

  * igt@kms_psr2_su@page_flip-p010:
    - shard-bmg:          NOTRUN -> [SKIP][102] ([Intel XE#2387] / [Intel XE#7429])
   [102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-1/igt@kms_psr2_su@page_flip-p010.html

  * igt@kms_psr@fbc-pr-cursor-plane-move:
    - shard-ptl:          NOTRUN -> [SKIP][103] ([Intel XE#1406]) +2 other tests skip
   [103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-ptl-8/igt@kms_psr@fbc-pr-cursor-plane-move.html

  * igt@kms_psr@fbc-pr-sprite-plane-onoff:
    - shard-lnl:          NOTRUN -> [SKIP][104] ([Intel XE#1406])
   [104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-lnl-7/igt@kms_psr@fbc-pr-sprite-plane-onoff.html

  * igt@kms_psr@fbc-psr2-basic:
    - shard-lnl:          NOTRUN -> [SKIP][105] ([Intel XE#1406] / [Intel XE#7345])
   [105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-lnl-7/igt@kms_psr@fbc-psr2-basic.html

  * igt@kms_psr@fbc-psr2-basic@edp-1:
    - shard-lnl:          NOTRUN -> [SKIP][106] ([Intel XE#1406] / [Intel XE#4609] / [Intel XE#7345])
   [106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-lnl-7/igt@kms_psr@fbc-psr2-basic@edp-1.html

  * igt@kms_psr@fbc-psr2-sprite-blt@edp-1:
    - shard-ptl:          NOTRUN -> [SKIP][107] ([Intel XE#1406] / [Intel XE#5835]) +1 other test skip
   [107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-ptl-4/igt@kms_psr@fbc-psr2-sprite-blt@edp-1.html

  * igt@kms_psr@pr-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][108] ([Intel XE#2234] / [Intel XE#2850]) +9 other tests skip
   [108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-5/igt@kms_psr@pr-suspend.html

  * igt@kms_psr@psr2-primary-render:
    - shard-bmg:          NOTRUN -> [SKIP][109] ([Intel XE#2234])
   [109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-8/igt@kms_psr@psr2-primary-render.html

  * igt@kms_psr_stress_test@invalidate-primary-flip-overlay:
    - shard-bmg:          NOTRUN -> [SKIP][110] ([Intel XE#7795])
   [110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-5/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html

  * igt@kms_rotation_crc@bad-tiling:
    - shard-ptl:          NOTRUN -> [SKIP][111] ([Intel XE#5821])
   [111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-ptl-8/igt@kms_rotation_crc@bad-tiling.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0:
    - shard-bmg:          NOTRUN -> [SKIP][112] ([Intel XE#2330] / [Intel XE#5813])
   [112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-7/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180:
    - shard-ptl:          NOTRUN -> [SKIP][113] ([Intel XE#5813]) +2 other tests skip
   [113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-ptl-5/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180.html

  * igt@kms_rotation_crc@sprite-rotation-270:
    - shard-bmg:          NOTRUN -> [SKIP][114] ([Intel XE#3904] / [Intel XE#7342])
   [114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-5/igt@kms_rotation_crc@sprite-rotation-270.html

  * igt@kms_scaling_modes@scaling-mode-full-aspect:
    - shard-bmg:          NOTRUN -> [SKIP][115] ([Intel XE#2413]) +1 other test skip
   [115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-1/igt@kms_scaling_modes@scaling-mode-full-aspect.html

  * igt@kms_setmode@invalid-clone-exclusive-crtc:
    - shard-ptl:          NOTRUN -> [SKIP][116] ([Intel XE#5910])
   [116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-ptl-8/igt@kms_setmode@invalid-clone-exclusive-crtc.html

  * igt@kms_sharpness_filter@filter-suspend:
    - shard-ptl:          [PASS][117] -> [ABORT][118] ([Intel XE#9375]) +1 other test abort
   [117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5915-3bd4f625aafdf70814dbf075de96e224355c9f1e/shard-ptl-4/igt@kms_sharpness_filter@filter-suspend.html
   [118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-ptl-7/igt@kms_sharpness_filter@filter-suspend.html

  * igt@kms_tiled_display@basic-test-pattern:
    - shard-bmg:          NOTRUN -> [SKIP][119] ([Intel XE#2426] / [Intel XE#5848]) +1 other test skip
   [119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-6/igt@kms_tiled_display@basic-test-pattern.html

  * igt@kms_tiled_display@basic-test-pattern-with-chamelium:
    - shard-ptl:          NOTRUN -> [SKIP][120] ([Intel XE#5848])
   [120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-ptl-8/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html

  * igt@kms_vblank@ts-continuation-dpms-suspend:
    - shard-bmg:          NOTRUN -> [DMESG-WARN][121] ([Intel XE#9365] / [Intel XE#9465])
   [121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-10/igt@kms_vblank@ts-continuation-dpms-suspend.html

  * igt@kms_vblank@ts-continuation-dpms-suspend@pipe-d-dp-2:
    - shard-bmg:          NOTRUN -> [DMESG-WARN][122] ([Intel XE#9365])
   [122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-10/igt@kms_vblank@ts-continuation-dpms-suspend@pipe-d-dp-2.html

  * igt@kms_vrr@flip-dpms@pipe-a-edp-1:
    - shard-ptl:          [PASS][123] -> [FAIL][124] ([Intel XE#4227] / [Intel XE#7397]) +1 other test fail
   [123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5915-3bd4f625aafdf70814dbf075de96e224355c9f1e/shard-ptl-7/igt@kms_vrr@flip-dpms@pipe-a-edp-1.html
   [124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-ptl-1/igt@kms_vrr@flip-dpms@pipe-a-edp-1.html

  * igt@kms_vrr@lobf:
    - shard-bmg:          NOTRUN -> [SKIP][125] ([Intel XE#2168] / [Intel XE#7444])
   [125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-8/igt@kms_vrr@lobf.html

  * igt@kms_vrr@seamless-rr-switch-virtual:
    - shard-bmg:          NOTRUN -> [SKIP][126] ([Intel XE#1499] / [Intel XE#9271])
   [126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-1/igt@kms_vrr@seamless-rr-switch-virtual.html

  * igt@xe_ccs@vm-bind-fault-mode-decompress:
    - shard-lnl:          NOTRUN -> [SKIP][127] ([Intel XE#7644])
   [127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-lnl-7/igt@xe_ccs@vm-bind-fault-mode-decompress.html

  * igt@xe_compute@eu-busy-10s:
    - shard-bmg:          NOTRUN -> [SKIP][128] ([Intel XE#6599])
   [128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-1/igt@xe_compute@eu-busy-10s.html

  * igt@xe_compute_preempt@compute-preempt-many-vram-evict:
    - shard-ptl:          NOTRUN -> [SKIP][129] ([Intel XE#5191]) +1 other test skip
   [129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-ptl-5/igt@xe_compute_preempt@compute-preempt-many-vram-evict.html

  * igt@xe_create@multigpu-create-massive-size:
    - shard-ptl:          NOTRUN -> [SKIP][130] ([Intel XE#5878])
   [130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-ptl-4/igt@xe_create@multigpu-create-massive-size.html

  * igt@xe_evict@evict-beng-mixed-many-threads-large:
    - shard-lnl:          NOTRUN -> [SKIP][131] ([Intel XE#6540] / [Intel XE#688]) +2 other tests skip
   [131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-lnl-7/igt@xe_evict@evict-beng-mixed-many-threads-large.html

  * igt@xe_evict@evict-large-external:
    - shard-ptl:          NOTRUN -> [SKIP][132] ([Intel XE#5764]) +6 other tests skip
   [132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-ptl-4/igt@xe_evict@evict-large-external.html

  * igt@xe_evict@evict-mixed-many-threads-small:
    - shard-bmg:          NOTRUN -> [INCOMPLETE][133] ([Intel XE#6321] / [Intel XE#8355]) +1 other test incomplete
   [133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-1/igt@xe_evict@evict-mixed-many-threads-small.html

  * igt@xe_evict@evict-small-multi-queue-priority-cm:
    - shard-bmg:          NOTRUN -> [SKIP][134] ([Intel XE#8370])
   [134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-5/igt@xe_evict@evict-small-multi-queue-priority-cm.html

  * igt@xe_evict_ccs@evict-overcommit-standalone-nofree-samefd:
    - shard-ptl:          NOTRUN -> [SKIP][135] ([Intel XE#6144])
   [135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-ptl-4/igt@xe_evict_ccs@evict-overcommit-standalone-nofree-samefd.html

  * igt@xe_exec_balancer@many-execqueues-cm-parallel-rebind:
    - shard-lnl:          NOTRUN -> [SKIP][136] ([Intel XE#7482]) +4 other tests skip
   [136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-lnl-7/igt@xe_exec_balancer@many-execqueues-cm-parallel-rebind.html

  * igt@xe_exec_balancer@virtual-all-active:
    - shard-ptl:          NOTRUN -> [SKIP][137] ([Intel XE#7482]) +13 other tests skip
   [137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-ptl-5/igt@xe_exec_balancer@virtual-all-active.html

  * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr-invalidate-race:
    - shard-bmg:          NOTRUN -> [SKIP][138] ([Intel XE#2322] / [Intel XE#7372]) +4 other tests skip
   [138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-6/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr-invalidate-race.html

  * igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-userptr-rebind:
    - shard-lnl:          NOTRUN -> [SKIP][139] ([Intel XE#1392]) +1 other test skip
   [139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-lnl-7/igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-userptr-rebind.html

  * igt@xe_exec_basic@multigpu-no-exec-userptr-invalidate-race:
    - shard-ptl:          NOTRUN -> [SKIP][140] ([Intel XE#5575] / [Intel XE#7484]) +7 other tests skip
   [140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-ptl-4/igt@xe_exec_basic@multigpu-no-exec-userptr-invalidate-race.html

  * igt@xe_exec_fault_mode@many-execqueues-multi-queue-prefetch:
    - shard-ptl:          NOTRUN -> [SKIP][141] ([Intel XE#8374]) +12 other tests skip
   [141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-ptl-5/igt@xe_exec_fault_mode@many-execqueues-multi-queue-prefetch.html

  * igt@xe_exec_fault_mode@once-multi-queue-rebind-prefetch:
    - shard-bmg:          NOTRUN -> [SKIP][142] ([Intel XE#8374]) +8 other tests skip
   [142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-1/igt@xe_exec_fault_mode@once-multi-queue-rebind-prefetch.html

  * igt@xe_exec_fault_mode@twice-multi-queue-invalid-userptr-fault:
    - shard-lnl:          NOTRUN -> [SKIP][143] ([Intel XE#8374]) +2 other tests skip
   [143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-lnl-7/igt@xe_exec_fault_mode@twice-multi-queue-invalid-userptr-fault.html

  * igt@xe_exec_multi_queue@many-execs-close-fd-smem:
    - shard-bmg:          NOTRUN -> [SKIP][144] ([Intel XE#8364]) +24 other tests skip
   [144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-1/igt@xe_exec_multi_queue@many-execs-close-fd-smem.html

  * igt@xe_exec_multi_queue@one-queue-close-fd-smem:
    - shard-ptl:          NOTRUN -> [SKIP][145] ([Intel XE#8364]) +18 other tests skip
   [145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-ptl-8/igt@xe_exec_multi_queue@one-queue-close-fd-smem.html

  * igt@xe_exec_multi_queue@one-queue-preempt-mode-fault-close-fd-smem:
    - shard-lnl:          NOTRUN -> [SKIP][146] ([Intel XE#8364]) +6 other tests skip
   [146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-lnl-7/igt@xe_exec_multi_queue@one-queue-preempt-mode-fault-close-fd-smem.html

  * igt@xe_exec_reset@cm-multi-queue-gt-reset:
    - shard-bmg:          NOTRUN -> [SKIP][147] ([Intel XE#8369]) +1 other test skip
   [147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-8/igt@xe_exec_reset@cm-multi-queue-gt-reset.html

  * igt@xe_exec_reset@multi-queue-cat-error-on-secondary:
    - shard-lnl:          NOTRUN -> [SKIP][148] ([Intel XE#8369]) +1 other test skip
   [148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-lnl-7/igt@xe_exec_reset@multi-queue-cat-error-on-secondary.html

  * igt@xe_exec_reset@multi-queue-gt-reset:
    - shard-ptl:          NOTRUN -> [SKIP][149] ([Intel XE#8369]) +1 other test skip
   [149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-ptl-4/igt@xe_exec_reset@multi-queue-gt-reset.html

  * igt@xe_exec_threads@threads-hang-userptr-invalidate-race:
    - shard-lnl:          [PASS][150] -> [FAIL][151] ([Intel XE#9096])
   [150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5915-3bd4f625aafdf70814dbf075de96e224355c9f1e/shard-lnl-4/igt@xe_exec_threads@threads-hang-userptr-invalidate-race.html
   [151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-lnl-2/igt@xe_exec_threads@threads-hang-userptr-invalidate-race.html

  * igt@xe_exec_threads@threads-multi-queue-cm-shared-vm-userptr-rebind:
    - shard-lnl:          NOTRUN -> [SKIP][152] ([Intel XE#8378]) +1 other test skip
   [152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-lnl-7/igt@xe_exec_threads@threads-multi-queue-cm-shared-vm-userptr-rebind.html

  * igt@xe_exec_threads@threads-multi-queue-cm-userptr-invalidate-race:
    - shard-ptl:          NOTRUN -> [SKIP][153] ([Intel XE#8378]) +6 other tests skip
   [153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-ptl-5/igt@xe_exec_threads@threads-multi-queue-cm-userptr-invalidate-race.html

  * igt@xe_exec_threads@threads-multi-queue-mixed-shared-vm-userptr:
    - shard-bmg:          NOTRUN -> [SKIP][154] ([Intel XE#8378]) +8 other tests skip
   [154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-1/igt@xe_exec_threads@threads-multi-queue-mixed-shared-vm-userptr.html

  * igt@xe_mmap@pci-membarrier-bad-pagesize:
    - shard-lnl:          NOTRUN -> [SKIP][155] ([Intel XE#5100] / [Intel XE#7322] / [Intel XE#7408])
   [155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-lnl-7/igt@xe_mmap@pci-membarrier-bad-pagesize.html

  * igt@xe_mmap@small-bar:
    - shard-ptl:          NOTRUN -> [SKIP][156] ([Intel XE#5867])
   [156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-ptl-8/igt@xe_mmap@small-bar.html

  * igt@xe_multigpu_svm@mgpu-atomic-op-basic:
    - shard-bmg:          NOTRUN -> [SKIP][157] ([Intel XE#6964]) +4 other tests skip
   [157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-5/igt@xe_multigpu_svm@mgpu-atomic-op-basic.html

  * igt@xe_multigpu_svm@mgpu-atomic-op-prefetch:
    - shard-lnl:          NOTRUN -> [SKIP][158] ([Intel XE#6964])
   [158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-lnl-7/igt@xe_multigpu_svm@mgpu-atomic-op-prefetch.html

  * igt@xe_multigpu_svm@mgpu-latency-copy-prefetch:
    - shard-ptl:          NOTRUN -> [SKIP][159] ([Intel XE#6964]) +1 other test skip
   [159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-ptl-5/igt@xe_multigpu_svm@mgpu-latency-copy-prefetch.html

  * igt@xe_oa@oa-tlb-invalidate:
    - shard-bmg:          NOTRUN -> [SKIP][160] ([Intel XE#2248] / [Intel XE#7325] / [Intel XE#7393])
   [160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-1/igt@xe_oa@oa-tlb-invalidate.html

  * igt@xe_page_reclaim@prl-max-entries:
    - shard-bmg:          NOTRUN -> [SKIP][161] ([Intel XE#7793]) +2 other tests skip
   [161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-7/igt@xe_page_reclaim@prl-max-entries.html
    - shard-ptl:          NOTRUN -> [SKIP][162] ([Intel XE#7793]) +2 other tests skip
   [162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-ptl-8/igt@xe_page_reclaim@prl-max-entries.html

  * igt@xe_page_reclaim@random:
    - shard-lnl:          NOTRUN -> [SKIP][163] ([Intel XE#7793])
   [163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-lnl-7/igt@xe_page_reclaim@random.html

  * igt@xe_pm@d3cold-multiple-execs:
    - shard-lnl:          NOTRUN -> [SKIP][164] ([Intel XE#2284] / [Intel XE#366] / [Intel XE#7370])
   [164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-lnl-7/igt@xe_pm@d3cold-multiple-execs.html

  * igt@xe_pm@s2idle-d3cold-basic-exec:
    - shard-bmg:          NOTRUN -> [SKIP][165] ([Intel XE#2284] / [Intel XE#7370]) +3 other tests skip
   [165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-1/igt@xe_pm@s2idle-d3cold-basic-exec.html

  * igt@xe_pm@s4-basic:
    - shard-lnl:          [PASS][166] -> [ABORT][167] ([Intel XE#9362])
   [166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5915-3bd4f625aafdf70814dbf075de96e224355c9f1e/shard-lnl-3/igt@xe_pm@s4-basic.html
   [167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-lnl-4/igt@xe_pm@s4-basic.html

  * igt@xe_pm@s4-mocs:
    - shard-ptl:          [PASS][168] -> [DMESG-WARN][169] ([Intel XE#7727])
   [168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5915-3bd4f625aafdf70814dbf075de96e224355c9f1e/shard-ptl-2/igt@xe_pm@s4-mocs.html
   [169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-ptl-6/igt@xe_pm@s4-mocs.html

  * igt@xe_pm_residency@cpg-basic:
    - shard-bmg:          [PASS][170] -> [ABORT][171] ([Intel XE#9362]) +1 other test abort
   [170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5915-3bd4f625aafdf70814dbf075de96e224355c9f1e/shard-bmg-9/igt@xe_pm_residency@cpg-basic.html
   [171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-2/igt@xe_pm_residency@cpg-basic.html

  * igt@xe_prefetch_fault@l2-prefetch-fault:
    - shard-lnl:          NOTRUN -> [SKIP][172] ([Intel XE#8815])
   [172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-lnl-7/igt@xe_prefetch_fault@l2-prefetch-fault.html

  * igt@xe_prefetch_fault@l2-prefetch-fault-svm:
    - shard-ptl:          NOTRUN -> [SKIP][173] ([Intel XE#8815])
   [173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-ptl-4/igt@xe_prefetch_fault@l2-prefetch-fault-svm.html

  * igt@xe_prefetch_fault@prefetch-fault-svm:
    - shard-bmg:          NOTRUN -> [SKIP][174] ([Intel XE#7599])
   [174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-6/igt@xe_prefetch_fault@prefetch-fault-svm.html

  * igt@xe_pxp@pxp-stale-queue-post-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][175] ([Intel XE#4733] / [Intel XE#7417])
   [175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-10/igt@xe_pxp@pxp-stale-queue-post-suspend.html

  * igt@xe_query@multigpu-query-gt-list:
    - shard-lnl:          NOTRUN -> [SKIP][176] ([Intel XE#944])
   [176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-lnl-7/igt@xe_query@multigpu-query-gt-list.html

  * igt@xe_query@multigpu-query-invalid-extension:
    - shard-bmg:          NOTRUN -> [SKIP][177] ([Intel XE#944]) +2 other tests skip
   [177]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-1/igt@xe_query@multigpu-query-invalid-extension.html

  * igt@xe_query@multigpu-query-mem-usage:
    - shard-ptl:          NOTRUN -> [SKIP][178] ([Intel XE#6019]) +2 other tests skip
   [178]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-ptl-5/igt@xe_query@multigpu-query-mem-usage.html

  * igt@xe_sriov_admin@default-sched-attributes-vfs-disabled:
    - shard-lnl:          NOTRUN -> [SKIP][179] ([Intel XE#7174])
   [179]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-lnl-7/igt@xe_sriov_admin@default-sched-attributes-vfs-disabled.html

  * igt@xe_survivability@runtime-survivability:
    - shard-lnl:          NOTRUN -> [SKIP][180] ([Intel XE#8415])
   [180]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-lnl-7/igt@xe_survivability@runtime-survivability.html

  * igt@xe_wedged@wedged-at-any-timeout:
    - shard-bmg:          NOTRUN -> [DMESG-WARN][181] ([Intel XE#8963])
   [181]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-1/igt@xe_wedged@wedged-at-any-timeout.html

  
#### Possible fixes ####

  * igt@kms_atomic_transition@plane-all-modeset-transition-fencing:
    - shard-bmg:          [FAIL][182] ([Intel XE#8098]) -> [PASS][183]
   [182]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5915-3bd4f625aafdf70814dbf075de96e224355c9f1e/shard-bmg-7/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html
   [183]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-8/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs:
    - shard-bmg:          [ABORT][184] ([Intel XE#9393] / [Intel XE#9422]) -> [PASS][185]
   [184]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5915-3bd4f625aafdf70814dbf075de96e224355c9f1e/shard-bmg-7/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
   [185]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-8/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs@pipe-b-hdmi-a-3:
    - shard-bmg:          [DMESG-WARN][186] -> [PASS][187]
   [186]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5915-3bd4f625aafdf70814dbf075de96e224355c9f1e/shard-bmg-7/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs@pipe-b-hdmi-a-3.html
   [187]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-8/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs@pipe-b-hdmi-a-3.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs@pipe-c-hdmi-a-3:
    - shard-bmg:          [INCOMPLETE][188] ([Intel XE#7084] / [Intel XE#8150]) -> [PASS][189]
   [188]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5915-3bd4f625aafdf70814dbf075de96e224355c9f1e/shard-bmg-7/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs@pipe-c-hdmi-a-3.html
   [189]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-8/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs@pipe-c-hdmi-a-3.html

  * igt@kms_cursor_crc@cursor-suspend:
    - shard-bmg:          [DMESG-WARN][190] ([Intel XE#9365]) -> [PASS][191] +1 other test pass
   [190]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5915-3bd4f625aafdf70814dbf075de96e224355c9f1e/shard-bmg-1/igt@kms_cursor_crc@cursor-suspend.html
   [191]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-3/igt@kms_cursor_crc@cursor-suspend.html

  * igt@kms_flip@flip-vs-expired-vblank@b-edp1:
    - shard-lnl:          [FAIL][192] ([Intel XE#301]) -> [PASS][193]
   [192]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5915-3bd4f625aafdf70814dbf075de96e224355c9f1e/shard-lnl-3/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html
   [193]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-lnl-3/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html

  * igt@kms_flip@flip-vs-suspend:
    - shard-bmg:          [ABORT][194] ([Intel XE#9362]) -> [PASS][195] +4 other tests pass
   [194]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5915-3bd4f625aafdf70814dbf075de96e224355c9f1e/shard-bmg-3/igt@kms_flip@flip-vs-suspend.html
   [195]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-10/igt@kms_flip@flip-vs-suspend.html

  * igt@kms_pm_backlight@fade-with-suspend:
    - shard-ptl:          [ABORT][196] ([Intel XE#9362]) -> [PASS][197] +3 other tests pass
   [196]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5915-3bd4f625aafdf70814dbf075de96e224355c9f1e/shard-ptl-5/igt@kms_pm_backlight@fade-with-suspend.html
   [197]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-ptl-5/igt@kms_pm_backlight@fade-with-suspend.html

  * igt@xe_fault_injection@inject-fault-probe-function-xe_device_probe_early:
    - shard-bmg:          [ABORT][198] ([Intel XE#9463]) -> [PASS][199] +1 other test pass
   [198]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5915-3bd4f625aafdf70814dbf075de96e224355c9f1e/shard-bmg-4/igt@xe_fault_injection@inject-fault-probe-function-xe_device_probe_early.html
   [199]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-6/igt@xe_fault_injection@inject-fault-probe-function-xe_device_probe_early.html

  
#### Warnings ####

  * igt@kms_hdr@brightness-with-hdr:
    - shard-bmg:          [SKIP][200] ([Intel XE#3374] / [Intel XE#3544]) -> [SKIP][201] ([Intel XE#3544])
   [200]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5915-3bd4f625aafdf70814dbf075de96e224355c9f1e/shard-bmg-6/igt@kms_hdr@brightness-with-hdr.html
   [201]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-bmg-9/igt@kms_hdr@brightness-with-hdr.html

  * igt@xe_pat@pat-sw-hw-suspend:
    - shard-ptl:          [ABORT][202] ([Intel XE#9362]) -> [FAIL][203] ([Intel XE#7695])
   [202]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5915-3bd4f625aafdf70814dbf075de96e224355c9f1e/shard-ptl-8/igt@xe_pat@pat-sw-hw-suspend.html
   [203]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/shard-ptl-8/igt@xe_pat@pat-sw-hw-suspend.html

  
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
  [Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
  [Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
  [Intel XE#1407]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1407
  [Intel XE#1421]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1421
  [Intel XE#1424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1424
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
  [Intel XE#2168]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2168
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2248]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2248
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
  [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
  [Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
  [Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
  [Intel XE#2330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2330
  [Intel XE#2372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2372
  [Intel XE#2374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2374
  [Intel XE#2387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2387
  [Intel XE#2390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2390
  [Intel XE#2413]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2413
  [Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
  [Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
  [Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#2893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2893
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306
  [Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
  [Intel XE#3304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3304
  [Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374
  [Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
  [Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
  [Intel XE#366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/366
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
  [Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
  [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
  [Intel XE#4227]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4227
  [Intel XE#4596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4596
  [Intel XE#4609]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4609
  [Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
  [Intel XE#5100]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5100
  [Intel XE#5191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5191
  [Intel XE#5408]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5408
  [Intel XE#5575]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5575
  [Intel XE#5764]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5764
  [Intel XE#5800]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5800
  [Intel XE#5808]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5808
  [Intel XE#5812]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5812
  [Intel XE#5813]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5813
  [Intel XE#5821]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5821
  [Intel XE#5822]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5822
  [Intel XE#5823]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5823
  [Intel XE#5824]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5824
  [Intel XE#5828]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5828
  [Intel XE#5835]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5835
  [Intel XE#5846]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5846
  [Intel XE#5848]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5848
  [Intel XE#5851]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5851
  [Intel XE#5854]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5854
  [Intel XE#5858]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5858
  [Intel XE#5867]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5867
  [Intel XE#5878]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5878
  [Intel XE#5900]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5900
  [Intel XE#5901]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5901
  [Intel XE#5907]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5907
  [Intel XE#5910]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5910
  [Intel XE#5917]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5917
  [Intel XE#5947]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5947
  [Intel XE#5962]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5962
  [Intel XE#6019]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6019
  [Intel XE#610]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/610
  [Intel XE#6127]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6127
  [Intel XE#6144]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6144
  [Intel XE#6174]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6174
  [Intel XE#6266]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6266
  [Intel XE#6312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6312
  [Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
  [Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
  [Intel XE#6540]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6540
  [Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
  [Intel XE#6599]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6599
  [Intel XE#6707]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6707
  [Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
  [Intel XE#6886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6886
  [Intel XE#6918]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6918
  [Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
  [Intel XE#6969]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6969
  [Intel XE#6974]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6974
  [Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
  [Intel XE#7084]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7084
  [Intel XE#7085]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7085
  [Intel XE#7174]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7174
  [Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
  [Intel XE#7179]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7179
  [Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
  [Intel XE#7304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7304
  [Intel XE#7322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7322
  [Intel XE#7325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7325
  [Intel XE#7342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7342
  [Intel XE#7343]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7343
  [Intel XE#7345]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7345
  [Intel XE#7349]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7349
  [Intel XE#7351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7351
  [Intel XE#7355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7355
  [Intel XE#7356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7356
  [Intel XE#7358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7358
  [Intel XE#7359]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7359
  [Intel XE#7370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7370
  [Intel XE#7372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7372
  [Intel XE#7374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7374
  [Intel XE#7376]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7376
  [Intel XE#7387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7387
  [Intel XE#7393]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7393
  [Intel XE#7397]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7397
  [Intel XE#7408]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7408
  [Intel XE#7417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7417
  [Intel XE#7429]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7429
  [Intel XE#7439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7439
  [Intel XE#7444]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7444
  [Intel XE#7482]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7482
  [Intel XE#7484]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7484
  [Intel XE#7591]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7591
  [Intel XE#7599]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7599
  [Intel XE#7642]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7642
  [Intel XE#7644]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7644
  [Intel XE#7679]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7679
  [Intel XE#7695]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7695
  [Intel XE#7727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7727
  [Intel XE#7760]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7760
  [Intel XE#7793]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7793
  [Intel XE#7794]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7794
  [Intel XE#7795]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7795
  [Intel XE#7865]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7865
  [Intel XE#7905]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7905
  [Intel XE#8098]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8098
  [Intel XE#8150]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8150
  [Intel XE#8265]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8265
  [Intel XE#8355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8355
  [Intel XE#8364]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8364
  [Intel XE#8369]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8369
  [Intel XE#8370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8370
  [Intel XE#8374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8374
  [Intel XE#8378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8378
  [Intel XE#8391]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8391
  [Intel XE#8415]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8415
  [Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870
  [Intel XE#8815]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8815
  [Intel XE#8963]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8963
  [Intel XE#9096]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9096
  [Intel XE#9271]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9271
  [Intel XE#9312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9312
  [Intel XE#9362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9362
  [Intel XE#9365]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9365
  [Intel XE#9375]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9375
  [Intel XE#9393]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9393
  [Intel XE#9422]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9422
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
  [Intel XE#9463]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9463
  [Intel XE#9465]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9465
  [Intel XE#9536]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9536


Build changes
-------------

  * Linux: xe-5915-3bd4f625aafdf70814dbf075de96e224355c9f1e -> xe-pw-169692v4

  IGT_9138: 9138
  xe-5915-3bd4f625aafdf70814dbf075de96e224355c9f1e: 3bd4f625aafdf70814dbf075de96e224355c9f1e
  xe-pw-169692v4: 169692v4

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v4/index.html

[-- Attachment #2: Type: text/html, Size: 75938 bytes --]

Re: [PATCH v4 00/12] Add CPER logging support for CRI

[Raag Jadav]

On Fri, Oct 09, 2026 at 04:16:03PM +0530, Badal Nilawar wrote:
> This patch series adds CPER (Common Platform Error Record) logging support
> for Correctable errors reported by Intel Xe GPUs. CPER logging is done

Is it still correctable errors?

Raag

> through trace event.
> 
> v2:
>    - Extended CPER logging to Uncorrectable errors and xe_ras_get_counter
>      request
>    - Log CPER records via xe_log SIGID infra 
> 
> v3:
>   - Added the patches in incremental order (Raag)
>   - Fixed Sashiko warnings which are applicable 
> 
> v4:
>   - Split the patches further for incremental review (Raag)
>   - Refactor info queue handling (Raag)
>   - Fix applicable Sashiko warnings
> 
> Badal Nilawar (12):
>   drm/xe/cper: Add CPER reporting entry point for xe_log
>   drm/xe/cper: Retrieve the error counter record for CPER reporting
>   drm/xe/cper: Initialize Intel-specific error section header
>   drm/xe/cper: Construct CPER record for hardware errors
>   drm/xe/xe_ras: Add support to retrieve info queue data for CRI
>   drm/xe/cper: Prepare Intel CPER error info records
>   drm/xe/cper: Log CPER records for aggregate counter retrieval
>   drm/xe/cper: Emit cper record to trace buf
>   drm/xe/xe_ras: Report device memory errors using SIGID
>   drm/xe/xe_ras: Report core compute errors using SIGID
>   drm/xe/xe_ras: Report soc internal errors using SIGID
>   drm/xe/xe_ras: Report correctable errors using SIGID
> 
>  .../ABI/testing/sysfs-driver-intel-xe-cper    |  18 +
>  drivers/gpu/drm/xe/Makefile                   |   3 +
>  drivers/gpu/drm/xe/xe_cper.c                  | 530 ++++++++++++++++++
>  drivers/gpu/drm/xe/xe_cper.h                  |  37 ++
>  drivers/gpu/drm/xe/xe_cper_types.h            | 185 ++++++
>  drivers/gpu/drm/xe/xe_device_types.h          |   4 +
>  drivers/gpu/drm/xe/xe_log.c                   |   5 +-
>  drivers/gpu/drm/xe/xe_ras.c                   | 254 ++++++++-
>  drivers/gpu/drm/xe/xe_ras.h                   |   5 +
>  drivers/gpu/drm/xe/xe_ras_types.h             | 118 +++-
>  drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h |   2 +
>  drivers/gpu/drm/xe/xe_trace_cper.c            |   9 +
>  drivers/gpu/drm/xe/xe_trace_cper.h            |  66 +++
>  13 files changed, 1202 insertions(+), 34 deletions(-)
>  create mode 100644 Documentation/ABI/testing/sysfs-driver-intel-xe-cper
>  create mode 100644 drivers/gpu/drm/xe/xe_cper.c
>  create mode 100644 drivers/gpu/drm/xe/xe_cper.h
>  create mode 100644 drivers/gpu/drm/xe/xe_cper_types.h
>  create mode 100644 drivers/gpu/drm/xe/xe_trace_cper.c
>  create mode 100644 drivers/gpu/drm/xe/xe_trace_cper.h
> 
> -- 
> 2.54.0
> 

Re: [PATCH v4 01/12] drm/xe/cper: Add CPER reporting entry point for xe_log

[Raag Jadav]

On Fri, Oct 09, 2026 at 04:16:04PM +0530, Badal Nilawar wrote:
> Introduce xe_cper_emit() as the single entry point for emitting
> CPER records from xe_log. xe_log now forwards every SIGID log entry
> with its full context (component, location, data/len and formatted
> message), and xe_cper decides how to report it. Hardware SIGIDs are
> routed to a hardware error helper, software SIGIDs are left as TODO.
> 
> No functional change is intended yet, as the CPER emission logic
> is added in follow-up patches.

This line isn't telling me anything and redundant for this patch.

> Assisted-by: Copilot:Claude-Opus-5.5
> Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
> ---
> v4:
>   - s/CONFIG_UEFI_CPER_X86/CONFIG_UEFI_CPER/ (Raag)
>   - Use in_range() for hardware SIGID check in xe_cper (Raag)
>   - Drop unused response param and constify error_class
>   - Check data len against struct xe_ras_error_class before use (Michal)
> ---
>  drivers/gpu/drm/xe/Makefile  |  2 ++
>  drivers/gpu/drm/xe/xe_cper.c | 51 ++++++++++++++++++++++++++++++++++++
>  drivers/gpu/drm/xe/xe_cper.h | 26 ++++++++++++++++++
>  drivers/gpu/drm/xe/xe_log.c  |  5 +++-
>  4 files changed, 83 insertions(+), 1 deletion(-)
>  create mode 100644 drivers/gpu/drm/xe/xe_cper.c
>  create mode 100644 drivers/gpu/drm/xe/xe_cper.h
> 
> diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
> index 10930c924070..da78026b0bb4 100644
> --- a/drivers/gpu/drm/xe/Makefile
> +++ b/drivers/gpu/drm/xe/Makefile
> @@ -168,6 +168,8 @@ xe-$(CONFIG_HWMON) += xe_hwmon.o
>  xe-$(CONFIG_PERF_EVENTS) += xe_pmu.o
>  xe-$(CONFIG_CONFIGFS_FS) += xe_configfs.o
>  
> +xe-$(CONFIG_UEFI_CPER) += xe_cper.o
> +
>  # graphics virtualization (SR-IOV) support
>  xe-y += \
>  	xe_gt_sriov_vf.o \
> diff --git a/drivers/gpu/drm/xe/xe_cper.c b/drivers/gpu/drm/xe/xe_cper.c
> new file mode 100644
> index 000000000000..c5caa0e8f496
> --- /dev/null
> +++ b/drivers/gpu/drm/xe/xe_cper.c
> @@ -0,0 +1,51 @@
> +// SPDX-License-Identifier: MIT
> +/*
> + * Copyright © 2026 Intel Corporation
> + */
> +
> +#include <linux/err.h>
> +#include <linux/minmax.h>
> +
> +#include "xe_cper.h"
> +#include "xe_device.h"
> +#include "xe_ras_types.h"
> +
> +static bool is_hw_sigid(enum xe_sigid sigid)
> +{
> +	return in_range(sigid, INTEL_SIGID_GPU_XE_HARDWARE_START, INTEL_SIGID_BATCH);
> +}
> +
> +static void xe_cper_emit_hw_err(struct xe_device *xe, int cper_sev, enum xe_sigid sigid,
> +				const struct xe_ras_error_class *error_class)
> +{
> +	/* TODO */
> +}
> +
> +/**
> + * xe_cper_emit() - Emit a CPER record for a SIGID log entry
> + * @xe: The &xe_device
> + * @cper_sev: CPER severity
> + * @sigid: Error signature identifier
> + * @component: Component identifier
> + * @location: Location details of the @component
> + * @data: Pointer to the additional details, or ERR_PTR, or NULL if not applicable
> + * @len: Length of the @data in bytes, or 0 if not applicable
> + * @vaf: Formatted log message
> + *
> + * Emit a CPER record for a SIGID log entry
> + */
> +void xe_cper_emit(struct xe_device *xe, int cper_sev, enum xe_sigid sigid,
> +		  u32 component, u32 location, const void *data, size_t len,
> +		  struct va_format *vaf)
> +{
> +	if (!xe)

Why? Do we plan to shoot in out foot?

> +		return;
> +
> +	if (is_hw_sigid(sigid)) {
> +		if (!IS_ERR_OR_NULL(data) && len == sizeof(struct xe_ras_error_class))

Why the 'len' check?

Note: Any caller with incorrect length is abusing xe_log and will fail
silently here, so let's not hide bugs.

Raag

> +			xe_cper_emit_hw_err(xe, cper_sev, sigid, data);
> +		return;
> +	}
> +
> +	/* TODO software CPER */
> +}
> diff --git a/drivers/gpu/drm/xe/xe_cper.h b/drivers/gpu/drm/xe/xe_cper.h
> new file mode 100644
> index 000000000000..84676c7645a5
> --- /dev/null
> +++ b/drivers/gpu/drm/xe/xe_cper.h
> @@ -0,0 +1,26 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright © 2026 Intel Corporation
> + */
> +
> +#ifndef _XE_CPER_H_
> +#define _XE_CPER_H_
> +
> +#include <linux/types.h>
> +
> +#include "abi/xe_sigid_abi.h"
> +
> +struct va_format;
> +struct xe_device;
> +
> +#if IS_ENABLED(CONFIG_UEFI_CPER)
> +void xe_cper_emit(struct xe_device *xe, int cper_sev, enum xe_sigid sigid,
> +		  u32 component, u32 location, const void *data, size_t len,
> +		  struct va_format *vaf);
> +#else
> +static inline void xe_cper_emit(struct xe_device *xe, int cper_sev, enum xe_sigid sigid,
> +				u32 component, u32 location, const void *data, size_t len,
> +				struct va_format *vaf) {}
> +#endif
> +
> +#endif /* _XE_CPER_H_ */
> diff --git a/drivers/gpu/drm/xe/xe_log.c b/drivers/gpu/drm/xe/xe_log.c
> index 29eb16db3320..80e2b1724ceb 100644
> --- a/drivers/gpu/drm/xe/xe_log.c
> +++ b/drivers/gpu/drm/xe/xe_log.c
> @@ -8,6 +8,7 @@
>  
>  #include "abi/xe_log_abi.h"
>  
> +#include "xe_cper.h"
>  #include "xe_device.h"
>  #include "xe_log.h"
>  #include "xe_pci_types.h"
> @@ -19,7 +20,9 @@ static void log_emit_cper(struct pci_dev *pdev, int cper_sev, enum xe_sigid sigi
>  {
>  	KUNIT_STATIC_STUB_REDIRECT(log_emit_cper, pdev, cper_sev, sigid,
>  				   component, location, data, len, vaf);
> -	/* TODO */
> +
> +	xe_cper_emit(xe_any_to_xe(pdev), cper_sev, sigid,
> +		     component, location, data, len, vaf);
>  }
>  
>  static const char *log_unknown_component_prefix(u32 component)
> -- 
> 2.54.0
> 

Re: [PATCH v4 02/12] drm/xe/cper: Retrieve the error counter record for CPER reporting

[Raag Jadav]

On Fri, Oct 09, 2026 at 04:16:05PM +0530, Badal Nilawar wrote:
> Retrieve error counter record required to build a CPER record.
> 
> Assisted-by: Copilot:Claude-Opus-5.5
> Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
> ---
> v4:
>   - Drop redundant xe_ras_counter_is_valid() check (Raag)
>   - Add might_sleep() to assert that the caller is in a sleepable
>     context (sashiko)
>   - Add xe_device_assert_mem_access() to assert the outer runtime PM
>     wake reference requirement (sashiko)
> ---
>  drivers/gpu/drm/xe/xe_cper.c | 14 ++++++++++-
>  drivers/gpu/drm/xe/xe_ras.c  | 45 ++++++++++++++++++++++++------------
>  drivers/gpu/drm/xe/xe_ras.h  |  2 ++
>  3 files changed, 45 insertions(+), 16 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_cper.c b/drivers/gpu/drm/xe/xe_cper.c
> index c5caa0e8f496..4f0ed5096aac 100644
> --- a/drivers/gpu/drm/xe/xe_cper.c
> +++ b/drivers/gpu/drm/xe/xe_cper.c
> @@ -4,10 +4,13 @@
>   */
>  
>  #include <linux/err.h>
> +#include <linux/kernel.h>
>  #include <linux/minmax.h>
>  
>  #include "xe_cper.h"
>  #include "xe_device.h"
> +#include "xe_printk.h"
> +#include "xe_ras.h"
>  #include "xe_ras_types.h"
>  
>  static bool is_hw_sigid(enum xe_sigid sigid)
> @@ -18,7 +21,16 @@ static bool is_hw_sigid(enum xe_sigid sigid)
>  static void xe_cper_emit_hw_err(struct xe_device *xe, int cper_sev, enum xe_sigid sigid,
>  				const struct xe_ras_error_class *error_class)
>  {
> -	/* TODO */
> +	struct xe_ras_get_counter_response local_resp;

Why 'local'? Do we have any other?

> +	/* Fetching the counter sends a sysctrl command */
> +	might_sleep();
> +	xe_device_assert_mem_access(xe);
> +
> +	if (xe_ras_get_counter_response(xe, error_class, &local_resp)) {

Make the naming consistent with existing code, i.e.
xe_ras_get_counter_response(xe, &counter, &response)

> +		xe_err(xe, "CPER: failed to get counter, skipping record\n");
> +		return;
> +	}
>  }
>  
>  /**
> diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
> index 7a85735c57d5..5cfc9beff8c1 100644
> --- a/drivers/gpu/drm/xe/xe_ras.c
> +++ b/drivers/gpu/drm/xe/xe_ras.c
> @@ -103,8 +103,6 @@ static const char * const gpu_health_states[] = {
>  };
>  static_assert(ARRAY_SIZE(gpu_health_states) == XE_RAS_HEALTH_MAX);
>  
> -static int get_counter(struct xe_device *xe, struct xe_ras_error_class *counter, u32 *value);
> -
>  static u8 drm_to_xe_ras_severity(u8 severity)
>  {
>  	switch (severity) {
> @@ -284,21 +282,21 @@ static void ras_usp_aer_init(struct xe_device *xe)
>  static void ras_send_error_event(struct xe_device *xe, u8 severity, u8 component)
>  {
>  	struct xe_ras_error_class counter = {0};
> +	struct xe_ras_get_counter_response response = {0};

Hm, not all users of get_counter() are interested in the entire response.
So why not have it wrapped? Perhaps something like

static get_counter()
{
	response = {0};
	
	ret = xe_ras_get_counter_response(xe, &counter, &response);
	if (ret)
		return ret;

	*value = response.value;
	return 0;
}

Tidy? ;)

>  	u8 drm_severity, drm_component;
> -	u32 value;
>  	int ret;
>  
>  	counter.common.severity = severity;
>  	counter.common.component = component;
>  
> -	ret = get_counter(xe, &counter, &value);
> +	ret = xe_ras_get_counter_response(xe, &counter, &response);
>  	if (ret)
>  		return;
>  
>  	drm_severity = xe_to_drm_ras_severity(severity);
>  	drm_component = xe_to_drm_ras_component(component);
>  
> -	xe_drm_ras_event(xe, drm_component, drm_severity, value);
> +	xe_drm_ras_event(xe, drm_component, drm_severity, response.value);
>  }
>  
>  static u8 handle_core_compute_errors(struct xe_ras_error_array *arr)
> @@ -433,19 +431,30 @@ void xe_ras_counter_threshold_crossed(struct xe_device *xe,
>  	}
>  }
>  
> -static int get_counter(struct xe_device *xe, struct xe_ras_error_class *counter, u32 *value)
> +/**
> + * xe_ras_get_counter_response() - Get error counter record
> + * @xe: Xe device instance
> + * @counter: RAS error class
> + * @out: Counter record retrieved

Nit: ... to be retrieved

> + * Retrieve the counter record of a specific error class from firmware.
> + *
> + * Return: 0 on success, negative error code on failure.
> + */
> +int xe_ras_get_counter_response(struct xe_device *xe, const struct xe_ras_error_class *counter,
> +				struct xe_ras_get_counter_response *out)

'response'?

>  {
> -	struct xe_ras_get_counter_response response = {0};
>  	struct xe_ras_get_counter_request request = {0};
>  	struct xe_sysctrl_mailbox_command command = {0};
>  	struct xe_ras_error_common *common;
>  	size_t rlen;
>  	int ret;
>  
> +	memset(out, 0, sizeof(*out));

Nack. No modifying input data, the caller is responsible for this.

>  	request.counter = *counter;
>  
>  	xe_sysctrl_create_command(&command, XE_SYSCTRL_GROUP_GFSP, XE_SYSCTRL_CMD_GET_COUNTER,
> -				  &request, sizeof(request), &response, sizeof(response));
> +				  &request, sizeof(request), out, sizeof(*out));
>  
>  	ret = xe_sysctrl_send_command(&xe->sc, &command, &rlen);
>  	if (ret) {
> @@ -453,19 +462,18 @@ static int get_counter(struct xe_device *xe, struct xe_ras_error_class *counter,
>  		return ret;
>  	}
>  
> -	if (rlen != sizeof(response)) {
> +	if (rlen != sizeof(*out)) {
>  		xe_err(xe, "sysctrl: unexpected get counter response length %zu (expected %zu)\n",
> -		       rlen, sizeof(response));
> +		       rlen, sizeof(*out));
>  		return -EIO;
>  	}
>  
> -	if (!ras_counter_is_valid(xe, &response.counter))
> +	if (!ras_counter_is_valid(xe, &out->counter))
>  		return -EBADMSG;
>  
> -	common = &response.counter.common;
> -	*value = response.value;
> +	common = &out->counter.common;
>  
> -	xe_dbg(xe, "[RAS]: get counter %u for %s %s\n", *value, comp_to_str(common->component),
> +	xe_dbg(xe, "[RAS]: get counter %u for %s %s\n", out->value, comp_to_str(common->component),
>  	       sev_to_str(common->severity));
>  
>  	return 0;
> @@ -596,12 +604,19 @@ enum xe_ras_recovery_action xe_ras_process_errors(struct xe_device *xe)
>  int xe_ras_get_counter(struct xe_device *xe, u8 severity, u8 component, u32 *value)
>  {
>  	struct xe_ras_error_class counter = {0};
> +	struct xe_ras_get_counter_response response = {0};

With get_counter() intact, this won't be needed.

Raag

> +	int ret;
>  
>  	counter.common.severity = drm_to_xe_ras_severity(severity);
>  	counter.common.component = drm_to_xe_ras_component(component);
>  
>  	guard(xe_pm_runtime)(xe);
> -	return get_counter(xe, &counter, value);
> +	ret = xe_ras_get_counter_response(xe, &counter, &response);
> +	if (ret)
> +		return ret;
> +
> +	*value = response.value;
> +	return 0;
>  }
>  
>  /**
> diff --git a/drivers/gpu/drm/xe/xe_ras.h b/drivers/gpu/drm/xe/xe_ras.h
> index 0b8669f28d56..84700ea63394 100644
> --- a/drivers/gpu/drm/xe/xe_ras.h
> +++ b/drivers/gpu/drm/xe/xe_ras.h
> @@ -20,5 +20,7 @@ int xe_ras_get_threshold(struct xe_device *xe, u8 severity, u8 component, u32 *t
>  int xe_ras_set_threshold(struct xe_device *xe, u8 severity, u8 component, u32 threshold);
>  void xe_ras_init(struct xe_device *xe);
>  enum xe_ras_recovery_action xe_ras_process_errors(struct xe_device *xe);
> +int xe_ras_get_counter_response(struct xe_device *xe, const struct xe_ras_error_class *counter,
> +				struct xe_ras_get_counter_response *out);
>  
>  #endif
> -- 
> 2.54.0
>