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* [PATCH] pinctrl: single: add big endian support
@ 2026-10-10 16:15 Rustam Adilov
  2026-10-10 16:32 ` sashiko-bot
  0 siblings, 1 reply; 3+ messages in thread
From: Rustam Adilov @ 2026-10-10 16:15 UTC (permalink / raw)
  To: Tony Lindgren, Haojian Zhuang, Linus Walleij, linux-arm-kernel,
	linux-omap, linux-gpio, linux-kernel
  Cc: Rustam Adilov

Add support for big endian pin controllers by taking into account
a big-endian device tree property.

This is needed on big endian MIPS platforms like RTL930X, RTL931X
and RTL9607C who use pinctrl-single, because when SWAP_IO_SPACE is
enabled, the mmio accessors in pinctrl-single perform a byte swap.

Signed-off-by: Rustam Adilov <adilov@disroot.org>
---
 drivers/pinctrl/pinctrl-single.c | 41 ++++++++++++++++++++++++++++----
 1 file changed, 37 insertions(+), 4 deletions(-)

diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c
index e0eb7240a985..001a0c157d6a 100644
--- a/drivers/pinctrl/pinctrl-single.c
+++ b/drivers/pinctrl/pinctrl-single.c
@@ -265,6 +265,26 @@ static void pcs_writel(unsigned int val, void __iomem *reg)
 	writel(val, reg);
 }
 
+static unsigned int pcs_readw_be(void __iomem *reg)
+{
+	return readw_be(reg);
+}
+
+static unsigned int pcs_readl_be(void __iomem *reg)
+{
+	return readl_be(reg);
+}
+
+static void pcs_writew_be(unsigned int val, void __iomem *reg)
+{
+	writew_be(val, reg);
+}
+
+static void pcs_writel_be(unsigned int val, void __iomem *reg)
+{
+	writel_be(val, reg);
+}
+
 static unsigned int pcs_pin_reg_offset_get(struct pcs_device *pcs,
 					   unsigned int pin)
 {
@@ -1785,6 +1805,7 @@ static int pcs_probe(struct platform_device *pdev)
 	struct resource *res;
 	struct pcs_device *pcs;
 	const struct pcs_soc_data *soc;
+	bool byte_be;
 	int ret;
 
 	soc = of_device_get_match_data(&pdev->dev);
@@ -1860,18 +1881,30 @@ static int pcs_probe(struct platform_device *pdev)
 
 	platform_set_drvdata(pdev, pcs);
 
+	byte_be = device_is_big_endian(pcs->dev);
+
 	switch (pcs->width) {
 	case 8:
 		pcs->read = pcs_readb;
 		pcs->write = pcs_writeb;
 		break;
 	case 16:
-		pcs->read = pcs_readw;
-		pcs->write = pcs_writew;
+		if (byte_be) {
+			pcs->read = pcs_readw_be;
+			pcs->write = pcs_writew_be;
+		} else {
+			pcs->read = pcs_readw;
+			pcs->write = pcs_writew;
+		}
 		break;
 	case 32:
-		pcs->read = pcs_readl;
-		pcs->write = pcs_writel;
+		if (byte_be) {
+			pcs->read = pcs_readl_be;
+			pcs->write = pcs_writel_be;
+		} else {
+			pcs->read = pcs_readl;
+			pcs->write = pcs_writel;
+		}
 		break;
 	default:
 		break;
-- 
2.56.0


^ permalink raw reply related	[flat|nested] 3+ messages in thread

* Re: [PATCH] pinctrl: single: add big endian support
  2026-10-10 16:15 [PATCH] pinctrl: single: add big endian support Rustam Adilov
@ 2026-10-10 16:32 ` sashiko-bot
  2026-10-10 17:47   ` Rustam Adilov
  0 siblings, 1 reply; 3+ messages in thread
From: sashiko-bot @ 2026-10-10 16:32 UTC (permalink / raw)
  To: Rustam Adilov; +Cc: linux-gpio

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] api: undefined readl_be/writel_be macros break generic build
--

commit 37f4a78fd7a9ab63fc123070591147a5473d3fdf
Author: Rustam Adilov <adilov@disroot.org>

pinctrl: single: add big endian support

This commit adds big-endian support for pinctrl-single to handle big-endian
device tree properties. It implements custom I/O accessor functions for 
big-endian MMIO access, intended to support MIPS platforms like RTL930X.

> diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c
> index e0eb7240a9859..001a0c157d6a0 100644
> --- a/drivers/pinctrl/pinctrl-single.c
> +++ b/drivers/pinctrl/pinctrl-single.c
> @@ -265,6 +265,26 @@ static void pcs_writel(unsigned int val, void __iomem *reg)
>  	writel(val, reg);
>  }
>  
> +static unsigned int pcs_readw_be(void __iomem *reg)
> +{
> +	return readw_be(reg);
> +}
> +
> +static unsigned int pcs_readl_be(void __iomem *reg)
> +{
> +	return readl_be(reg);
> +}
> +
> +static void pcs_writew_be(unsigned int val, void __iomem *reg)
> +{
> +	writew_be(val, reg);
> +}
> +
> +static void pcs_writel_be(unsigned int val, void __iomem *reg)
> +{
> +	writel_be(val, reg);
> +}

[Severity: Low]
Will this break the build on architectures like ARM and ARM64?

The macros readw_be, readl_be, writew_be, and writel_be are strictly
architecture-specific and do not exist in standard generic headers like
<asm-generic/io.h>. Since pinctrl-single is a generic driver heavily used on
architectures like ARM and ARM64, compiling these macros will result in build
failures due to undefined reference or implicit declaration errors.

Should this use the generic kernel APIs ioread32be / iowrite32be (and their
16-bit equivalents ioread16be / iowrite16be) for big-endian MMIO access
instead?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261010161545.62959-1-adilov@disroot.org?part=1

^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [PATCH] pinctrl: single: add big endian support
  2026-10-10 16:32 ` sashiko-bot
@ 2026-10-10 17:47   ` Rustam Adilov
  0 siblings, 0 replies; 3+ messages in thread
From: Rustam Adilov @ 2026-10-10 17:47 UTC (permalink / raw)
  To: sashiko-reviews; +Cc: linux-gpio

On 2026-10-10 16:32, sashiko-bot@kernel.org wrote:
> Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
> - [Low] api: undefined readl_be/writel_be macros break generic build
> --
> 
> commit 37f4a78fd7a9ab63fc123070591147a5473d3fdf
> Author: Rustam Adilov <adilov@disroot.org>
> 
> pinctrl: single: add big endian support
> 
> This commit adds big-endian support for pinctrl-single to handle big-endian
> device tree properties. It implements custom I/O accessor functions for 
> big-endian MMIO access, intended to support MIPS platforms like RTL930X.
> 
>> diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c
>> index e0eb7240a9859..001a0c157d6a0 100644
>> --- a/drivers/pinctrl/pinctrl-single.c
>> +++ b/drivers/pinctrl/pinctrl-single.c
>> @@ -265,6 +265,26 @@ static void pcs_writel(unsigned int val, void __iomem *reg)
>>  	writel(val, reg);
>>  }
>>  
>> +static unsigned int pcs_readw_be(void __iomem *reg)
>> +{
>> +	return readw_be(reg);
>> +}
>> +
>> +static unsigned int pcs_readl_be(void __iomem *reg)
>> +{
>> +	return readl_be(reg);
>> +}
>> +
>> +static void pcs_writew_be(unsigned int val, void __iomem *reg)
>> +{
>> +	writew_be(val, reg);
>> +}
>> +
>> +static void pcs_writel_be(unsigned int val, void __iomem *reg)
>> +{
>> +	writel_be(val, reg);
>> +}
> 
> [Severity: Low]
> Will this break the build on architectures like ARM and ARM64?
> 
> The macros readw_be, readl_be, writew_be, and writel_be are strictly
> architecture-specific and do not exist in standard generic headers like
> <asm-generic/io.h>. Since pinctrl-single is a generic driver heavily used on
> architectures like ARM and ARM64, compiling these macros will result in build
> failures due to undefined reference or implicit declaration errors.
> 
> Should this use the generic kernel APIs ioread32be / iowrite32be (and their
> 16-bit equivalents ioread16be / iowrite16be) for big-endian MMIO access
> instead?

Interesting that these macros are not in generic files... Why then this is a
low severity if it will cause build issue on some architectures is questionable
to me but i will change the patch to use the the mentioned functions instead.

^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2026-10-10 17:47 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
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2026-10-10 16:15 [PATCH] pinctrl: single: add big endian support Rustam Adilov
2026-10-10 16:32 ` sashiko-bot
2026-10-10 17:47   ` Rustam Adilov

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