From: sashiko-bot@kernel.org
To: "Ankit Nautiyal" <ankit.k.nautiyal@intel.com>
Cc: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org,
dri-devel@lists.freedesktop.org
Subject: Re: [PATCH v2 56/56] drm/i915/hdmi: Allow Pipe joiner for HDMI
Date: Mon, 12 Oct 2026 05:01:47 +0000 [thread overview]
Message-ID: <sashiko-outbox-167649@kernel.org> (raw)
In-Reply-To: <20261012035806.3361439-57-ankit.k.nautiyal@intel.com>
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [High] drm/i915/hdmi: TMDS validation bypasses max plane size, breaking wide modes and FRL joiner fallback
- [High] drm/i915: NULL pointer deref in intel_hdmi_has_joiner for SDVO
--
commit ede50d511c51a1eac2ca7425fa38667d98b1e4a1
Author: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
drm/i915/hdmi: Allow Pipe joiner for HDMI
Pipe joiner is used only with FRL mode, so allow it only when the platform
and the sink both support FRL.
> diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
> --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
[ ... ]
> @@ -4378,3 +4378,11 @@ void intel_hdmi_frl_get_config(struct intel_crtc_state *crtc_state)
>
> intel_hdmi_frl_dfm_read(crtc_state);
> }
> +
> +bool intel_hdmi_has_joiner(struct intel_hdmi *intel_hdmi)
> +{
> + struct intel_display *display = to_intel_display(intel_hdmi);
> + struct intel_encoder *encoder = &hdmi_to_dig_port(intel_hdmi)->base;
> +
> + return HAS_HDMI_FRL(display) && intel_bios_hdmi_max_frl_rate(encoder->devdata);
> +}
[Severity: High]
Does the existing TMDS validation bypass the max plane size, breaking the wide
modes and the FRL joiner fallback that this patch relies on?
In intel_hdmi_mode_valid_format(), if the TMDS clock is valid, it returns
MODE_OK immediately:
status = intel_hdmi_tmds_mode_clock_valid(&connector->base, clock,
has_hdmi_sink, sink_format);
if (status == MODE_OK)
return status;
This bypasses intel_mode_valid_max_plane_size(), meaning a mode with an
hdisplay greater than 5120 but a valid TMDS clock (like 7680x1080@60Hz) is
incorrectly advertised as valid to userspace.
Then during atomic commit in intel_hdmi_compute_config(), it tries TMDS first:
ret = intel_hdmi_compute_formats(encoder, pipe_config,
conn_state, false);
if (ret && enable_frl) {
ret = intel_hdmi_compute_formats(encoder, pipe_config,
conn_state, true);
Since TMDS only checks the clock and ignores the plane size, it succeeds and
skips the FRL fallback. Later, intel_plane_atomic_check() calling
skl_plane_check() rejects the un-split plane because the width exceeds the max
width of 5120, returning -EINVAL. This causes atomic commits to fail for
advertised modes and prevents the driver from falling back to FRL, where the
pipe joiner could have correctly handled the wide mode.
> diff --git a/drivers/gpu/drm/i915/display/intel_joiner.c b/drivers/gpu/drm/i915/display/intel_joiner.c
> --- a/drivers/gpu/drm/i915/display/intel_joiner.c
> +++ b/drivers/gpu/drm/i915/display/intel_joiner.c
[ ... ]
> @@ -33,6 +34,9 @@ bool intel_joiner_connector_can_join(struct intel_connector *connector)
> case DRM_MODE_CONNECTOR_DisplayPort:
> case DRM_MODE_CONNECTOR_eDP:
> return intel_dp_has_joiner(intel_attached_dp(connector));
> + case DRM_MODE_CONNECTOR_HDMIA:
> + case DRM_MODE_CONNECTOR_HDMIB:
> + return intel_hdmi_has_joiner(intel_attached_hdmi(connector));
[Severity: High]
Does this code handle SDVO HDMI connectors correctly? When this is called for
SDVO HDMI connectors on older platforms, the connector type is initialized to
DRM_MODE_CONNECTOR_HDMIA. However, SDVO HDMI connectors are not backed by an
intel_digital_port.
When intel_attached_hdmi() is called for an SDVO connector, it calls
enc_to_dig_port(), which evaluates to NULL because the encoder type is
INTEL_OUTPUT_SDVO. Then enc_to_intel_hdmi() takes the address of &NULL->hdmi,
resulting in an invalid pointer offset.
When this invalid pointer is passed to intel_hdmi_has_joiner(), the
to_intel_display() macro calls hdmi_to_dig_port(). This reverses the offset
back to NULL and dereferences it to find the device pointer, causing an
unconditional kernel panic during boot.
> default:
> return false;
> }
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261012035806.3361439-1-ankit.k.nautiyal@intel.com?part=56
next prev parent reply other threads:[~2026-10-12 5:02 UTC|newest]
Thread overview: 95+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-12 3:57 [PATCH v2 00/56] Enable HDMI FRL for MTL+ Ankit Nautiyal
2026-10-12 3:57 ` [PATCH v2 01/56] drm/i915/hdmi: Parse FRL max link rate from VBT Ankit Nautiyal
2026-10-12 4:34 ` sashiko-bot
2026-10-12 8:01 ` Shankar, Uma
2026-10-12 8:10 ` Shankar, Uma
2026-10-12 3:57 ` [PATCH v2 02/56] drm/i915/hdmi: Add new data members for FRL configuration Ankit Nautiyal
2026-10-12 4:36 ` sashiko-bot
2026-10-12 8:35 ` Shankar, Uma
2026-10-12 3:57 ` [PATCH v2 03/56] drm/i915/hdmi: Add FRL link rate cap Ankit Nautiyal
2026-10-12 8:43 ` Shankar, Uma
2026-10-12 3:57 ` [PATCH v2 04/56] drm/drm_scdc_helper: Add SCDC helper funcs for FRL Ankit Nautiyal
2026-10-12 4:32 ` sashiko-bot
2026-10-12 3:57 ` [PATCH v2 05/56] drm/i915/display: Add registers for HDMI FRL configuration Ankit Nautiyal
2026-10-12 3:57 ` [PATCH v2 06/56] drm/i915/display: Add new members in crtc_state for " Ankit Nautiyal
2026-10-12 3:57 ` [PATCH v2 07/56] drm/i915/intel_cx0_phy_regs: Add HDMI FRL SHIFT EN bit in PORT_BUF_CTL_1 Ankit Nautiyal
2026-10-12 3:57 ` [PATCH v2 08/56] drm/i915/ddi: Update Transcoder/DDI registers with the frl bits Ankit Nautiyal
2026-10-12 4:35 ` sashiko-bot
2026-10-12 3:57 ` [PATCH v2 09/56] drm/i915/hdmi: Enable Scrambling only for TMDS mode Ankit Nautiyal
2026-10-12 3:57 ` [PATCH v2 10/56] drm/i915/ddi: Simplify intel_ddi_enable() Ankit Nautiyal
2026-10-12 3:57 ` [PATCH v2 11/56] drm/i915/ddi: Factor out common transcoder/vblank enable sequence Ankit Nautiyal
2026-10-12 3:57 ` [PATCH v2 12/56] drm/i915/ddi: Update HDMI modeset sequence for MTL+ Ankit Nautiyal
2026-10-12 3:57 ` [PATCH v2 13/56] drm/i915/hdmi: Add function to prepare registers for FRL mode Ankit Nautiyal
2026-10-12 3:57 ` [PATCH v2 14/56] drm/i915/hdmi: Add functions for FRL training state machine Ankit Nautiyal
2026-10-12 4:49 ` sashiko-bot
2026-10-12 3:57 ` [PATCH v2 15/56] drm/i915/intel_hdmi: Add helper to disable FRL Ankit Nautiyal
2026-10-12 4:44 ` sashiko-bot
2026-10-12 3:57 ` [PATCH v2 16/56] drm/i915/hdmi: Reduce FRL rate cap on rate change during training Ankit Nautiyal
2026-10-12 4:47 ` sashiko-bot
2026-10-12 3:57 ` [PATCH v2 17/56] drm/i915/hdmi: Introduce intel_hdmi_frl_level() for per-lane TxFFE Ankit Nautiyal
2026-10-12 4:49 ` sashiko-bot
2026-10-12 3:57 ` [PATCH v2 18/56] drm/i915/hdmi: Drive per-lane TxFFE during FRL link training Ankit Nautiyal
2026-10-12 4:34 ` sashiko-bot
2026-10-12 3:57 ` [PATCH v2 19/56] drm/i915/ltphy: Add PLL tables for HDMI FRL Ankit Nautiyal
2026-10-12 4:26 ` sashiko-bot
2026-10-12 3:57 ` [PATCH v2 20/56] drm/i915/ltphy: Add safegaurd when calculation HDMI FRL state Ankit Nautiyal
2026-10-12 4:40 ` sashiko-bot
2026-10-12 3:57 ` [PATCH v2 21/56] drm/i915/ltphy: Calculate port clock for HDMI FRL Ankit Nautiyal
2026-10-12 4:35 ` sashiko-bot
2026-10-12 3:57 ` [PATCH v2 22/56] drm/i915/ltphy: Verify HDMI FRL tables Ankit Nautiyal
2026-10-12 3:57 ` [PATCH v2 23/56] drm/i915/ddi_buf: Add Vswing table for HDMI FRL Ankit Nautiyal
2026-10-12 4:33 ` sashiko-bot
2026-10-12 3:57 ` [PATCH v2 24/56] drm/i915/hdmi: Add provision for FRL mode while computing output format Ankit Nautiyal
2026-10-12 3:57 ` [PATCH v2 25/56] drm/i915/cx0: Add helper to check if the FRL rate is valid Ankit Nautiyal
2026-10-12 3:57 ` [PATCH v2 26/56] drm/i915/lt_phy: " Ankit Nautiyal
2026-10-12 3:57 ` [PATCH v2 27/56] drm/i915/hdmi_frl_dfm_regs: Define DFM registers Ankit Nautiyal
2026-10-12 4:35 ` sashiko-bot
2026-10-12 3:57 ` [PATCH v2 28/56] drm/i915/hdmi_frl_dfm: Define frl_dfm structure Ankit Nautiyal
2026-10-12 3:57 ` [PATCH v2 29/56] drm/i915/hdmi_frl_dfm: Add non dsc frl capacity computation helpers Ankit Nautiyal
2026-10-12 4:48 ` sashiko-bot
2026-10-12 3:57 ` [PATCH v2 30/56] drm/i915/hdmi_frl_dfm: Add support for DFM calculation with DSC Ankit Nautiyal
2026-10-12 3:57 ` [PATCH v2 31/56] drm/i915/hdmi: Add helper to write FRL CFG register Ankit Nautiyal
2026-10-12 4:33 ` sashiko-bot
2026-10-12 3:57 ` [PATCH v2 32/56] drm/i915/hdmi_frl_dfm: Add helpers to read/write FRL DFM registers Ankit Nautiyal
2026-10-12 4:42 ` sashiko-bot
2026-10-12 3:57 ` [PATCH v2 33/56] drm/i915/hdmi: Rename port clock limit to specify tmds clock Ankit Nautiyal
2026-10-12 3:57 ` [PATCH v2 34/56] drm/i915/hdmi: Rename port clock valid " Ankit Nautiyal
2026-10-12 3:57 ` [PATCH v2 35/56] drm/i915/hdmi: Rename mode " Ankit Nautiyal
2026-10-12 3:57 ` [PATCH v2 36/56] drm/i915/hdmi: Validate FRL modes in mode_valid using the FRL DFM Ankit Nautiyal
2026-10-12 4:49 ` sashiko-bot
2026-10-12 3:57 ` [PATCH v2 37/56] drm/i915/hdmi: Add FRL port clock valid Ankit Nautiyal
2026-10-12 4:56 ` sashiko-bot
2026-10-12 3:57 ` [PATCH v2 38/56] drm/i915/hdmi: Add FRL clock computation based on DFM Ankit Nautiyal
2026-10-12 4:51 ` sashiko-bot
2026-10-12 3:57 ` [PATCH v2 39/56] drm/i915/hdmi: Add support for sending uevent to user for FRL training failure Ankit Nautiyal
2026-10-12 4:49 ` sashiko-bot
2026-10-12 3:57 ` [PATCH v2 40/56] drm/i915/ddi: Wire FRL into the HDMI DDI enable/disable path Ankit Nautiyal
2026-10-12 4:54 ` sashiko-bot
2026-10-12 3:57 ` [PATCH v2 41/56] drm/i915/ltphy: Fix HDMI FRL per-lane TX mapping Ankit Nautiyal
2026-10-12 3:57 ` [PATCH v2 42/56] drm/i915/hdmi: Add read out for FRL state Ankit Nautiyal
2026-10-12 4:51 ` sashiko-bot
2026-10-12 3:57 ` [PATCH v2 43/56] drm/i915/hdmi: Compute FRL Link M/N Ankit Nautiyal
2026-10-12 3:57 ` [PATCH v2 44/56] drm/i915/hdmi_frl_dfm: Write and read back " Ankit Nautiyal
2026-10-12 3:57 ` [PATCH v2 45/56] drm/i915/hdmi: Use the real pixel clock as crtc_clock for FRL Ankit Nautiyal
2026-10-12 3:57 ` [PATCH v2 46/56] drm/i915/display: Add FRL members to the state checker Ankit Nautiyal
2026-10-12 4:54 ` sashiko-bot
2026-10-12 3:57 ` [PATCH v2 47/56] drm/i915/hdmi: Compute output format for HDMI FRL mode Ankit Nautiyal
2026-10-12 4:53 ` sashiko-bot
2026-10-12 3:57 ` [PATCH v2 48/56] drm/i915/hdmi: Add a helper to check non DSC audio support for HDMI FRL Ankit Nautiyal
2026-10-12 3:57 ` [PATCH v2 49/56] drm/i915/audio: Add the mode pruning logic " Ankit Nautiyal
2026-10-12 3:57 ` [PATCH v2 50/56] drm/i915/hdmi: Enable FRL based mode clock valid Ankit Nautiyal
2026-10-12 4:58 ` sashiko-bot
2026-10-12 3:58 ` [PATCH v2 51/56] drm/i915/joiner: Prepare to move joiner helpers to a new file Ankit Nautiyal
2026-10-12 3:58 ` [PATCH v2 52/56] drm/i915/joiner: Move joiner candidate helpers to intel_joiner.c Ankit Nautiyal
2026-10-12 3:58 ` [PATCH v2 53/56] drm/i915/joiner: Move joiner pipe mask helper " Ankit Nautiyal
2026-10-12 4:51 ` sashiko-bot
2026-10-12 3:58 ` [PATCH v2 54/56] drm/i915/hdmi: Iterate through joiner candidates in compute_config path Ankit Nautiyal
2026-10-12 3:58 ` [PATCH v2 55/56] drm/i915/hdmi: Iterate through joiner candidates in mode_valid path Ankit Nautiyal
2026-10-12 4:53 ` sashiko-bot
2026-10-12 3:58 ` [PATCH v2 56/56] drm/i915/hdmi: Allow Pipe joiner for HDMI Ankit Nautiyal
2026-10-12 5:01 ` sashiko-bot [this message]
2026-10-12 4:59 ` ✗ CI.checkpatch: warning for Enable HDMI FRL for MTL+ (rev2) Patchwork
2026-10-12 5:01 ` ✓ CI.KUnit: success " Patchwork
2026-10-12 5:39 ` ✓ i915.CI.BAT: " Patchwork
2026-10-12 5:41 ` ✓ Xe.CI.BAT: " Patchwork
2026-10-12 7:12 ` ✗ Xe.CI.FULL: failure " Patchwork
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