[PATCH net-next] ice: correct PTP register access debug messages

[PATCH net-next] ice: correct PTP register access debug messages

[Alok Tiwari]

Report a write failure rather than a read failure when updating
PHY_VENDOR_TXLANE_THRESH.

Fix newline placement in PHY register read and threshold write failure
messages. No functional changes.

Signed-off-by: Alok Tiwari <alok.a.tiwari@oracle.com>
---
 drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c
index 3a41c711e751..289e0b3ef6ae 100644
--- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c
+++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c
@@ -1529,7 +1529,7 @@ static int ice_phy_cfg_parpcs_eth56g(struct ice_hw *hw, u8 port)
 	err = ice_write_xpcs_reg_eth56g(hw, port, PHY_VENDOR_TXLANE_THRESH,
 					ICE_ETH56G_NOMINAL_THRESH4);
 	if (err) {
-		ice_debug(hw, ICE_DBG_PTP, "Failed to read VENDOR_TXLANE_THRESH, status: %d",
+		ice_debug(hw, ICE_DBG_PTP, "Failed to write VENDOR_TXLANE_THRESH, status: %d",
 			  err);
 		return err;
 	}
@@ -2589,14 +2589,14 @@ ice_read_64b_phy_reg_e82x(struct ice_hw *hw, u8 port, u16 low_addr, u64 *val)
 
 	err = ice_read_phy_reg_e82x(hw, port, low_addr, &low);
 	if (err) {
-		ice_debug(hw, ICE_DBG_PTP, "Failed to read from low register 0x%08x\n, err %d",
+		ice_debug(hw, ICE_DBG_PTP, "Failed to read from low register 0x%08x, err %d\n",
 			  low_addr, err);
 		return err;
 	}
 
 	err = ice_read_phy_reg_e82x(hw, port, high_addr, &high);
 	if (err) {
-		ice_debug(hw, ICE_DBG_PTP, "Failed to read from high register 0x%08x\n, err %d",
+		ice_debug(hw, ICE_DBG_PTP, "Failed to read from high register 0x%08x, err %d\n",
 			  high_addr, err);
 		return err;
 	}
-- 
2.52.0

RE: [PATCH net-next] ice: correct PTP register access debug messages

[Loktionov, Aleksandr]

> -----Original Message-----
> From: Alok Tiwari <alok.a.tiwari@oracle.com>
> Sent: Sunday, October 11, 2026 1:36 PM
> To: richardcochran@gmail.com; Nguyen, Anthony L
> <anthony.l.nguyen@intel.com>; Kitszel, Przemyslaw
> <przemyslaw.kitszel@intel.com>; andrew+netdev@lunn.ch;
> davem@davemloft.net; edumazet@google.com; kuba@kernel.org;
> pabeni@redhat.com; netdev@vger.kernel.org; intel-wired-
> lan@lists.osuosl.org
> Cc: alok.a.tiwarilinux@gmail.com; alok.a.tiwari@oracle.com
> Subject: [PATCH net-next] ice: correct PTP register access debug
> messages
> 
> Report a write failure rather than a read failure when updating
> PHY_VENDOR_TXLANE_THRESH.
> 
> Fix newline placement in PHY register read and threshold write failure
> messages. No functional changes.
> 
> Signed-off-by: Alok Tiwari <alok.a.tiwari@oracle.com>
> ---
>  drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c
> b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c
> index 3a41c711e751..289e0b3ef6ae 100644
> --- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c
> +++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c
> @@ -1529,7 +1529,7 @@ static int ice_phy_cfg_parpcs_eth56g(struct ice_hw
> *hw, u8 port)
>  	err = ice_write_xpcs_reg_eth56g(hw, port,
> PHY_VENDOR_TXLANE_THRESH,
>  					ICE_ETH56G_NOMINAL_THRESH4);
>  	if (err) {
> -		ice_debug(hw, ICE_DBG_PTP, "Failed to read
> VENDOR_TXLANE_THRESH, status: %d",
> +		ice_debug(hw, ICE_DBG_PTP, "Failed to write
> VENDOR_TXLANE_THRESH, status: %d",
>  			  err);
>  		return err;
>  	}
> @@ -2589,14 +2589,14 @@ ice_read_64b_phy_reg_e82x(struct ice_hw *hw, u8
> port, u16 low_addr, u64 *val)
> 
>  	err = ice_read_phy_reg_e82x(hw, port, low_addr, &low);
>  	if (err) {
> -		ice_debug(hw, ICE_DBG_PTP, "Failed to read from low
> register 0x%08x\n, err %d",
> +		ice_debug(hw, ICE_DBG_PTP, "Failed to read from low
> register 0x%08x, err %d\n",
>  			  low_addr, err);
>  		return err;
>  	}
> 
>  	err = ice_read_phy_reg_e82x(hw, port, high_addr, &high);
>  	if (err) {
> -		ice_debug(hw, ICE_DBG_PTP, "Failed to read from high
> register 0x%08x\n, err %d",
> +		ice_debug(hw, ICE_DBG_PTP, "Failed to read from high
> register 0x%08x, err %d\n",
>  			  high_addr, err);
>  		return err;
>  	}
> --
> 2.52.0

Reviewed-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com>

Re: [PATCH net-next] ice: correct PTP register access debug messages

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] ice: missing trailing newline in debug message for threshold write failure
--

commit 3dfc5e0655da8eeda86700792eb12011c421ed4e
Author: Alok Tiwari <alok.a.tiwari@oracle.com>

ice: correct PTP register access debug messages

This commit updates the debug message for PHY_VENDOR_TXLANE_THRESH to
report a write failure rather than a read failure. It also intends to fix
newline placement in PHY register read and threshold write failure
messages.

> diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c
> index 3a41c711e751b..289e0b3ef6ae9 100644
> --- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c
> +++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c
> @@ -1529,7 +1529,7 @@ static int ice_phy_cfg_parpcs_eth56g(struct ice_hw *hw, u8 port)
>  	err = ice_write_xpcs_reg_eth56g(hw, port, PHY_VENDOR_TXLANE_THRESH,
>  					ICE_ETH56G_NOMINAL_THRESH4);
>  	if (err) {
> -		ice_debug(hw, ICE_DBG_PTP, "Failed to read VENDOR_TXLANE_THRESH, status: %d",
> +		ice_debug(hw, ICE_DBG_PTP, "Failed to write VENDOR_TXLANE_THRESH, status: %d",
>  			  err);

[Severity: Low]
In ice_phy_cfg_parpcs_eth56g(), is this missing a newline at the end of the
format string? The commit message indicates that it fixes newline placement
for the threshold write failure message, but the modified format string
still lacks a trailing newline when ice_write_xpcs_reg_eth56g() fails while
updating PHY_VENDOR_TXLANE_THRESH. Should a \n be appended to the string
here?

>  		return err;
>  	}

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261011113545.16718-1-alok.a.tiwari@oracle.com?part=1