[PATCH 0/3] drm/panel: Use mipi_dsi_*_multi() in feiyang and rm68200

[PATCH 0/3] drm/panel: Use mipi_dsi_*_multi() in feiyang and rm68200

[Hsieh Hung-En]

This series converts the feiyang-fy07024di26a30d and raydium-rm68200
panel drivers from the deprecated MIPI DSI helpers to their _multi
variants, as suggested in Documentation/gpu/todo.rst.

Patch 1 converts feiyang. As in commit 00efe8a68565 ("drm/panel:
ronbo-rb070d30: Ignore DCS errors in disable()"), disable() now always
returns 0 so that a failed SET_DISPLAY_OFF cannot leave panel->enabled
stale.

Patch 2 converts the deprecated calls in rm68200's prepare() and
unprepare(), preserving the existing error handling.

Patch 3 converts the rm68200 initialization sequence and shares the
multi-context with prepare(). This changes the error handling: a failed
initialization command now stops subsequent DCS transfers and makes
prepare() fail, whereas previously the error was only logged and
prepare() could still report success.

Doug, do you think this fail-fast behavior is appropriate here, or
would you prefer to preserve the existing best-effort initialization?

This series modifies the prepare(), unprepare(), enable(), and disable()
callbacks and the initialization sequence. It is independent of Osama
Abdelkader's "drm/panel: Use managed helpers in DSI panels" v7, which
modifies probe() and remove() in both drivers.

Compile-tested on arm64 with both panels enabled and W=1.
Neither panel was tested on hardware.

Hsieh Hung-En (3):
  drm/panel: feiyang-fy07024di26a30d: Use mipi_dsi_*_multi() functions
  drm/panel: raydium-rm68200: Use mipi_dsi_*_multi() functions
  drm/panel: raydium-rm68200: Use multi-context helpers for init
    sequence

 .../drm/panel/panel-feiyang-fy07024di26a30d.c |  35 +--
 drivers/gpu/drm/panel/panel-raydium-rm68200.c | 211 ++++++++----------
 2 files changed, 112 insertions(+), 134 deletions(-)


base-commit: 91f52e99824b0beebb48cad51bbda81437af8664
-- 
2.43.0

[PATCH 1/3] drm/panel: feiyang-fy07024di26a30d: Use mipi_dsi_*_multi() functions

[Hsieh Hung-En]

Replace the deprecated MIPI DSI DCS helpers with their _multi variants,
as suggested in Documentation/gpu/todo.rst. Also convert
mipi_dsi_dcs_write_buffer() for consistency.

In prepare(), the first failed command prevents subsequent DSI transfers
and its error is returned, as before. The new helper also logs the error.

In unprepare(), clear accum_err between commands so that ENTER_SLEEP_MODE
is still attempted if SET_DISPLAY_OFF fails, preserving the original
error handling behavior.

In disable(), ignore SET_DISPLAY_OFF errors to allow drm_panel_disable()
to clear panel->enabled, avoiding a stale enabled state after the panel
is powered off. This follows commit 00efe8a68565 ("drm/panel:
ronbo-rb070d30: Ignore DCS errors in disable()"). Command failures
remain logged by the helper.

Signed-off-by: Hsieh Hung-En <hungen3108@gmail.com>
---
 .../drm/panel/panel-feiyang-fy07024di26a30d.c | 35 +++++++++++--------
 1 file changed, 21 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c b/drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c
index c1d8ca5ca6e1..24934b9d430b 100644
--- a/drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c
+++ b/drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c
@@ -46,7 +46,7 @@ static const struct feiyang_init_cmd feiyang_init_cmds[] = {
 static int feiyang_prepare(struct drm_panel *panel)
 {
 	struct feiyang *ctx = panel_to_feiyang(panel);
-	struct mipi_dsi_device *dsi = ctx->dsi;
+	struct mipi_dsi_multi_context dsi_ctx = { .dsi = ctx->dsi };
 	unsigned int i;
 	int ret;
 
@@ -81,44 +81,51 @@ static int feiyang_prepare(struct drm_panel *panel)
 		const struct feiyang_init_cmd *cmd =
 						&feiyang_init_cmds[i];
 
-		ret = mipi_dsi_dcs_write_buffer(dsi, cmd->data,
+		mipi_dsi_dcs_write_buffer_multi(&dsi_ctx, cmd->data,
 						FEIYANG_INIT_CMD_LEN);
-		if (ret < 0)
-			return ret;
 	}
 
-	return 0;
+	return dsi_ctx.accum_err;
 }
 
 static int feiyang_enable(struct drm_panel *panel)
 {
 	struct feiyang *ctx = panel_to_feiyang(panel);
+	struct mipi_dsi_multi_context dsi_ctx = { .dsi = ctx->dsi };
 
 	/* T12 (video & logic signal rise + backlight rise) T12 >= 200ms */
 	msleep(200);
 
-	return mipi_dsi_dcs_set_display_on(ctx->dsi);
+	mipi_dsi_dcs_set_display_on_multi(&dsi_ctx);
+
+	return dsi_ctx.accum_err;
 }
 
 static int feiyang_disable(struct drm_panel *panel)
 {
 	struct feiyang *ctx = panel_to_feiyang(panel);
+	struct mipi_dsi_multi_context dsi_ctx = { .dsi = ctx->dsi };
 
-	return mipi_dsi_dcs_set_display_off(ctx->dsi);
+	mipi_dsi_dcs_set_display_off_multi(&dsi_ctx);
+
+	/*
+	 * Returning an error would leave panel->enabled set, causing the
+	 * next enable to be skipped even after unprepare powers off the panel.
+	 * The helper above already logs any command failure.
+	 */
+	return 0;
 }
 
 static int feiyang_unprepare(struct drm_panel *panel)
 {
 	struct feiyang *ctx = panel_to_feiyang(panel);
-	int ret;
+	struct mipi_dsi_multi_context dsi_ctx = { .dsi = ctx->dsi };
 
-	ret = mipi_dsi_dcs_set_display_off(ctx->dsi);
-	if (ret < 0)
-		dev_err(panel->dev, "failed to set display off: %d\n", ret);
+	mipi_dsi_dcs_set_display_off_multi(&dsi_ctx);
 
-	ret = mipi_dsi_dcs_enter_sleep_mode(ctx->dsi);
-	if (ret < 0)
-		dev_err(panel->dev, "failed to enter sleep mode: %d\n", ret);
+	/* Attempt to enter sleep mode even if display off failed. */
+	dsi_ctx.accum_err = 0;
+	mipi_dsi_dcs_enter_sleep_mode_multi(&dsi_ctx);
 
 	/* T13 (backlight fall + video & logic signal fall) T13 >= 200ms */
 	msleep(200);
-- 
2.43.0

[PATCH 2/3] drm/panel: raydium-rm68200: Use mipi_dsi_*_multi() functions

[Hsieh Hung-En]

Replace the deprecated MIPI DSI DCS helpers with their _multi variants,
as suggested in Documentation/gpu/todo.rst.

In prepare(), use mipi_dsi_msleep() to skip delays after a failed
command, preserving the existing error handling. The helpers also
log command failures.

In unprepare(), clear accum_err between commands so that ENTER_SLEEP_MODE
is still attempted if SET_DISPLAY_OFF fails. The helpers now log failures
at error level instead of warning level.

Leave the initialization sequence unchanged, as converting its write
helpers would change error handling. This is addressed in the next patch.

Signed-off-by: Hsieh Hung-En <hungen3108@gmail.com>
---
 drivers/gpu/drm/panel/panel-raydium-rm68200.c | 27 ++++++++-----------
 1 file changed, 11 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/panel/panel-raydium-rm68200.c b/drivers/gpu/drm/panel/panel-raydium-rm68200.c
index c535dc931903..971d075bb060 100644
--- a/drivers/gpu/drm/panel/panel-raydium-rm68200.c
+++ b/drivers/gpu/drm/panel/panel-raydium-rm68200.c
@@ -232,15 +232,13 @@ static int rm68200_unprepare(struct drm_panel *panel)
 {
 	struct rm68200 *ctx = panel_to_rm68200(panel);
 	struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
-	int ret;
+	struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi };
 
-	ret = mipi_dsi_dcs_set_display_off(dsi);
-	if (ret)
-		dev_warn(panel->dev, "failed to set display off: %d\n", ret);
+	mipi_dsi_dcs_set_display_off_multi(&dsi_ctx);
 
-	ret = mipi_dsi_dcs_enter_sleep_mode(dsi);
-	if (ret)
-		dev_warn(panel->dev, "failed to enter sleep mode: %d\n", ret);
+	/* Attempt to enter sleep mode even if display off failed. */
+	dsi_ctx.accum_err = 0;
+	mipi_dsi_dcs_enter_sleep_mode_multi(&dsi_ctx);
 
 	msleep(120);
 
@@ -258,6 +256,7 @@ static int rm68200_prepare(struct drm_panel *panel)
 {
 	struct rm68200 *ctx = panel_to_rm68200(panel);
 	struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
+	struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi };
 	int ret;
 
 	ret = regulator_enable(ctx->supply);
@@ -275,19 +274,15 @@ static int rm68200_prepare(struct drm_panel *panel)
 
 	rm68200_init_sequence(ctx);
 
-	ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
-	if (ret)
-		return ret;
+	mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx);
 
-	msleep(125);
+	mipi_dsi_msleep(&dsi_ctx, 125);
 
-	ret = mipi_dsi_dcs_set_display_on(dsi);
-	if (ret)
-		return ret;
+	mipi_dsi_dcs_set_display_on_multi(&dsi_ctx);
 
-	msleep(20);
+	mipi_dsi_msleep(&dsi_ctx, 20);
 
-	return 0;
+	return dsi_ctx.accum_err;
 }
 
 static int rm68200_get_modes(struct drm_panel *panel,
-- 
2.43.0

Re: [PATCH 2/3] drm/panel: raydium-rm68200: Use mipi_dsi_*_multi() functions

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] drm/panel: resource leak in rm68200_prepare() on error path
--

commit c6e53b42c5c0d14746a1b84a032e5221f6e17711
Author: Hsieh Hung-En <hungen3108@gmail.com>

drm/panel: raydium-rm68200: Use mipi_dsi_*_multi() functions

This patch replaces the deprecated MIPI DSI DCS helpers with their multi
variants in the raydium-rm68200 panel driver. It utilizes mipi_dsi_msleep to
skip delays after failed commands and defers error return to the end of the
prepare sequence.

> diff --git a/drivers/gpu/drm/panel/panel-raydium-rm68200.c b/drivers/gpu/drm/panel/panel-raydium-rm68200.c
> index c535dc931903e..971d075bb0601 100644
> --- a/drivers/gpu/drm/panel/panel-raydium-rm68200.c
> +++ b/drivers/gpu/drm/panel/panel-raydium-rm68200.c

[ ... ]

> @@ -258,6 +256,7 @@ static int rm68200_prepare(struct drm_panel *panel)
>  {
>  	struct rm68200 *ctx = panel_to_rm68200(panel);
>  	struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
> +	struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi };
>  	int ret;
>  
>  	ret = regulator_enable(ctx->supply);

[ ... ]

>  	rm68200_init_sequence(ctx);
>  
> -	ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
> -	if (ret)
> -		return ret;
> +	mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx);
>  
> -	msleep(125);
> +	mipi_dsi_msleep(&dsi_ctx, 125);
>  
> -	ret = mipi_dsi_dcs_set_display_on(dsi);
> -	if (ret)
> -		return ret;
> +	mipi_dsi_dcs_set_display_on_multi(&dsi_ctx);
>  
> -	msleep(20);
> +	mipi_dsi_msleep(&dsi_ctx, 20);
>  
> -	return 0;
> +	return dsi_ctx.accum_err;

[Severity: Medium]
Does this error path leak the regulator reference and leave the reset GPIO
asserted?

If a DCS command fails during rm68200_prepare(), the function returns
dsi_ctx.accum_err. Because drm_panel_prepare() in the DRM core does not set
panel->prepared = true on failure, subsequent calls to drm_panel_unprepare()
return early without executing rm68200_unprepare().

If that happens, is there anything to disable ctx->supply or reset the
GPIO?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261014135028.1438841-1-hungen3108@gmail.com?part=2

[PATCH 3/3] drm/panel: raydium-rm68200: Use multi-context helpers for init sequence

[Hsieh Hung-En]

Replace the custom DCS write helpers with mipi_dsi_dcs_write_seq_multi()
and mipi_dsi_dcs_write_var_seq_multi(), preserving individual DCS
transactions for registers that do not support auto-increment.

Previously, initialization failures were only logged, allowing prepare()
to report success despite incomplete initialization. Share the
multi-context with prepare() so that after the first failed write,
subsequent DCS commands and delays are skipped, and the error is
propagated to prepare().

The new helpers log errors without rate limiting.

Signed-off-by: Hsieh Hung-En <hungen3108@gmail.com>
---
 drivers/gpu/drm/panel/panel-raydium-rm68200.c | 184 ++++++++----------
 1 file changed, 80 insertions(+), 104 deletions(-)

diff --git a/drivers/gpu/drm/panel/panel-raydium-rm68200.c b/drivers/gpu/drm/panel/panel-raydium-rm68200.c
index 971d075bb060..a01b2db55c7f 100644
--- a/drivers/gpu/drm/panel/panel-raydium-rm68200.c
+++ b/drivers/gpu/drm/panel/panel-raydium-rm68200.c
@@ -98,134 +98,110 @@ static inline struct rm68200 *panel_to_rm68200(struct drm_panel *panel)
 	return container_of(panel, struct rm68200, panel);
 }
 
-static void rm68200_dcs_write_buf(struct rm68200 *ctx, const void *data,
-				  size_t len)
-{
-	struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
-	int err;
-
-	err = mipi_dsi_dcs_write_buffer(dsi, data, len);
-	if (err < 0)
-		dev_err_ratelimited(ctx->dev, "MIPI DSI DCS write buffer failed: %d\n", err);
-}
-
-static void rm68200_dcs_write_cmd(struct rm68200 *ctx, u8 cmd, u8 value)
-{
-	struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
-	int err;
-
-	err = mipi_dsi_dcs_write(dsi, cmd, &value, 1);
-	if (err < 0)
-		dev_err_ratelimited(ctx->dev, "MIPI DSI DCS write failed: %d\n", err);
-}
-
-#define dcs_write_seq(ctx, seq...)				\
-({								\
-	static const u8 d[] = { seq };				\
-								\
-	rm68200_dcs_write_buf(ctx, d, ARRAY_SIZE(d));		\
-})
-
 /*
  * This panel is not able to auto-increment all cmd addresses so for some of
  * them, we need to send them one by one...
+ *
+ * Use arr instead of d to avoid shadowing the local d[] declared by
+ * mipi_dsi_dcs_write_var_seq_multi().
  */
-#define dcs_write_cmd_seq(ctx, cmd, seq...)			\
-({								\
-	static const u8 d[] = { seq };				\
-	unsigned int i;						\
-								\
-	for (i = 0; i < ARRAY_SIZE(d) ; i++)			\
-		rm68200_dcs_write_cmd(ctx, cmd + i, d[i]);	\
-})
-
-static void rm68200_init_sequence(struct rm68200 *ctx)
+#define dcs_write_cmd_seq(dsi_ctx, cmd, seq...)			\
+	do {								\
+		static const u8 arr[] = { seq };			\
+		unsigned int i;						\
+									\
+		for (i = 0; i < ARRAY_SIZE(arr); i++)		\
+			mipi_dsi_dcs_write_var_seq_multi(dsi_ctx,	\
+							(cmd) + i, arr[i]); \
+	} while (0)
+
+static void rm68200_init_sequence(struct mipi_dsi_multi_context *dsi_ctx)
 {
 	/* Enter CMD2 with page 0 */
-	dcs_write_seq(ctx, MCS_CMD_MODE_SW, MCS_CMD2_P0);
-	dcs_write_cmd_seq(ctx, MCS_EXT_PWR_IC, 0xC0, 0x53, 0x00);
-	dcs_write_seq(ctx, MCS_BT2CTR, 0xE5);
-	dcs_write_seq(ctx, MCS_SETAVDD, 0x0A);
-	dcs_write_seq(ctx, MCS_SETAVEE, 0x0A);
-	dcs_write_seq(ctx, MCS_SGOPCTR, 0x52);
-	dcs_write_seq(ctx, MCS_BT3CTR, 0x53);
-	dcs_write_seq(ctx, MCS_BT4CTR, 0x5A);
-	dcs_write_seq(ctx, MCS_INVCTR, 0x00);
-	dcs_write_seq(ctx, MCS_STBCTR, 0x0A);
-	dcs_write_seq(ctx, MCS_SDCTR, 0x06);
-	dcs_write_seq(ctx, MCS_VCMCTR, 0x56);
-	dcs_write_seq(ctx, MCS_SETVGN, 0xA0, 0x00);
-	dcs_write_seq(ctx, MCS_SETVGP, 0xA0, 0x00);
-	dcs_write_seq(ctx, MCS_SW_CTRL, 0x11); /* 2 data lanes, see doc */
-
-	dcs_write_seq(ctx, MCS_CMD_MODE_SW, MCS_CMD2_P2);
-	dcs_write_seq(ctx, GOA_VSTV1, 0x05);
-	dcs_write_seq(ctx, 0x02, 0x0B);
-	dcs_write_seq(ctx, 0x03, 0x0F);
-	dcs_write_seq(ctx, 0x04, 0x7D, 0x00, 0x50);
-	dcs_write_cmd_seq(ctx, GOA_VSTV2, 0x05, 0x16, 0x0D, 0x11, 0x7D, 0x00,
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, MCS_CMD_MODE_SW, MCS_CMD2_P0);
+	dcs_write_cmd_seq(dsi_ctx, MCS_EXT_PWR_IC, 0xC0, 0x53, 0x00);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, MCS_BT2CTR, 0xE5);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, MCS_SETAVDD, 0x0A);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, MCS_SETAVEE, 0x0A);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, MCS_SGOPCTR, 0x52);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, MCS_BT3CTR, 0x53);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, MCS_BT4CTR, 0x5A);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, MCS_INVCTR, 0x00);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, MCS_STBCTR, 0x0A);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, MCS_SDCTR, 0x06);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, MCS_VCMCTR, 0x56);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, MCS_SETVGN, 0xA0, 0x00);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, MCS_SETVGP, 0xA0, 0x00);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, MCS_SW_CTRL, 0x11); /* 2 data lanes, see doc */
+
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, MCS_CMD_MODE_SW, MCS_CMD2_P2);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, GOA_VSTV1, 0x05);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x02, 0x0B);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x03, 0x0F);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x04, 0x7D, 0x00, 0x50);
+	dcs_write_cmd_seq(dsi_ctx, GOA_VSTV2, 0x05, 0x16, 0x0D, 0x11, 0x7D, 0x00,
 			  0x50);
-	dcs_write_cmd_seq(ctx, GOA_VCLK1, 0x07, 0x08, 0x01, 0x02, 0x00, 0x7D,
+	dcs_write_cmd_seq(dsi_ctx, GOA_VCLK1, 0x07, 0x08, 0x01, 0x02, 0x00, 0x7D,
 			  0x00, 0x85, 0x08);
-	dcs_write_cmd_seq(ctx, GOA_VCLK2, 0x03, 0x04, 0x05, 0x06, 0x00, 0x7D,
+	dcs_write_cmd_seq(dsi_ctx, GOA_VCLK2, 0x03, 0x04, 0x05, 0x06, 0x00, 0x7D,
 			  0x00, 0x85, 0x08);
-	dcs_write_seq(ctx, GOA_VCLK_OPT1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		      0x00, 0x00, 0x00, 0x00);
-	dcs_write_cmd_seq(ctx, GOA_BICLK1, 0x07, 0x08);
-	dcs_write_seq(ctx, 0x2D, 0x01);
-	dcs_write_seq(ctx, 0x2F, 0x02, 0x00, 0x40, 0x05, 0x08, 0x54, 0x7D,
-		      0x00);
-	dcs_write_cmd_seq(ctx, GOA_BICLK2, 0x03, 0x04, 0x05, 0x06, 0x00);
-	dcs_write_seq(ctx, 0x3D, 0x40);
-	dcs_write_seq(ctx, 0x3F, 0x05, 0x08, 0x54, 0x7D, 0x00);
-	dcs_write_seq(ctx, GOA_BICLK3, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		      0x00, 0x00, 0x00, 0x00, 0x00);
-	dcs_write_seq(ctx, GOA_BICLK4, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		      0x00, 0x00);
-	dcs_write_seq(ctx, 0x58, 0x00, 0x00, 0x00);
-	dcs_write_seq(ctx, GOA_BICLK_OPT1, 0x00, 0x00, 0x00, 0x00, 0x00);
-	dcs_write_seq(ctx, GOA_BICLK_OPT2, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		      0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00);
-	dcs_write_seq(ctx, MCS_GOA_GPO1, 0x00, 0x00, 0x00, 0x00);
-	dcs_write_seq(ctx, MCS_GOA_GPO2, 0x00, 0x20, 0x00);
-	dcs_write_seq(ctx, MCS_GOA_EQ, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08,
-		      0x00, 0x00);
-	dcs_write_seq(ctx, MCS_GOA_CLK_GALLON, 0x00, 0x00);
-	dcs_write_cmd_seq(ctx, MCS_GOA_FS_SEL0, 0xBF, 0x02, 0x06, 0x14, 0x10,
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, GOA_VCLK_OPT1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+				     0x00, 0x00, 0x00, 0x00);
+	dcs_write_cmd_seq(dsi_ctx, GOA_BICLK1, 0x07, 0x08);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x2D, 0x01);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x2F, 0x02, 0x00, 0x40, 0x05, 0x08, 0x54, 0x7D,
+				     0x00);
+	dcs_write_cmd_seq(dsi_ctx, GOA_BICLK2, 0x03, 0x04, 0x05, 0x06, 0x00);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x3D, 0x40);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x3F, 0x05, 0x08, 0x54, 0x7D, 0x00);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, GOA_BICLK3, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+				     0x00, 0x00, 0x00, 0x00, 0x00);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, GOA_BICLK4, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+				     0x00, 0x00);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x58, 0x00, 0x00, 0x00);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, GOA_BICLK_OPT1, 0x00, 0x00, 0x00, 0x00, 0x00);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, GOA_BICLK_OPT2, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+				     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, MCS_GOA_GPO1, 0x00, 0x00, 0x00, 0x00);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, MCS_GOA_GPO2, 0x00, 0x20, 0x00);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, MCS_GOA_EQ, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08,
+				     0x00, 0x00);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, MCS_GOA_CLK_GALLON, 0x00, 0x00);
+	dcs_write_cmd_seq(dsi_ctx, MCS_GOA_FS_SEL0, 0xBF, 0x02, 0x06, 0x14, 0x10,
 			  0x16, 0x12, 0x08, 0x3F);
-	dcs_write_cmd_seq(ctx, MCS_GOA_FS_SEL1, 0x3F, 0x3F, 0x3F, 0x3F, 0x0C,
+	dcs_write_cmd_seq(dsi_ctx, MCS_GOA_FS_SEL1, 0x3F, 0x3F, 0x3F, 0x3F, 0x0C,
 			  0x0A, 0x0E, 0x3F, 0x3F, 0x00);
-	dcs_write_cmd_seq(ctx, MCS_GOA_FS_SEL2, 0x04, 0x3F, 0x3F, 0x3F, 0x3F,
+	dcs_write_cmd_seq(dsi_ctx, MCS_GOA_FS_SEL2, 0x04, 0x3F, 0x3F, 0x3F, 0x3F,
 			  0x05, 0x01, 0x3F, 0x3F, 0x0F);
-	dcs_write_cmd_seq(ctx, MCS_GOA_FS_SEL3, 0x0B, 0x0D, 0x3F, 0x3F, 0x3F,
+	dcs_write_cmd_seq(dsi_ctx, MCS_GOA_FS_SEL3, 0x0B, 0x0D, 0x3F, 0x3F, 0x3F,
 			  0x3F);
-	dcs_write_cmd_seq(ctx, 0xA2, 0x3F, 0x09, 0x13, 0x17, 0x11, 0x15);
-	dcs_write_cmd_seq(ctx, 0xA9, 0x07, 0x03, 0x3F);
-	dcs_write_cmd_seq(ctx, MCS_GOA_BS_SEL0, 0x3F, 0x05, 0x01, 0x17, 0x13,
+	dcs_write_cmd_seq(dsi_ctx, 0xA2, 0x3F, 0x09, 0x13, 0x17, 0x11, 0x15);
+	dcs_write_cmd_seq(dsi_ctx, 0xA9, 0x07, 0x03, 0x3F);
+	dcs_write_cmd_seq(dsi_ctx, MCS_GOA_BS_SEL0, 0x3F, 0x05, 0x01, 0x17, 0x13,
 			  0x15, 0x11, 0x0F, 0x3F);
-	dcs_write_cmd_seq(ctx, MCS_GOA_BS_SEL1, 0x3F, 0x3F, 0x3F, 0x3F, 0x0B,
+	dcs_write_cmd_seq(dsi_ctx, MCS_GOA_BS_SEL1, 0x3F, 0x3F, 0x3F, 0x3F, 0x0B,
 			  0x0D, 0x09, 0x3F, 0x3F, 0x07);
-	dcs_write_cmd_seq(ctx, MCS_GOA_BS_SEL2, 0x03, 0x3F, 0x3F, 0x3F, 0x3F,
+	dcs_write_cmd_seq(dsi_ctx, MCS_GOA_BS_SEL2, 0x03, 0x3F, 0x3F, 0x3F, 0x3F,
 			  0x02, 0x06, 0x3F, 0x3F, 0x08);
-	dcs_write_cmd_seq(ctx, MCS_GOA_BS_SEL3, 0x0C, 0x0A, 0x3F, 0x3F, 0x3F,
+	dcs_write_cmd_seq(dsi_ctx, MCS_GOA_BS_SEL3, 0x0C, 0x0A, 0x3F, 0x3F, 0x3F,
 			  0x3F, 0x3F, 0x0E, 0x10, 0x14);
-	dcs_write_cmd_seq(ctx, MCS_GOA_BS_SEL4, 0x12, 0x16, 0x00, 0x04, 0x3F);
-	dcs_write_seq(ctx, 0xDC, 0x02);
-	dcs_write_seq(ctx, 0xDE, 0x12);
+	dcs_write_cmd_seq(dsi_ctx, MCS_GOA_BS_SEL4, 0x12, 0x16, 0x00, 0x04, 0x3F);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xDC, 0x02);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xDE, 0x12);
 
-	dcs_write_seq(ctx, MCS_CMD_MODE_SW, 0x0E); /* No documentation */
-	dcs_write_seq(ctx, 0x01, 0x75);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, MCS_CMD_MODE_SW, 0x0E); /* No documentation */
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x01, 0x75);
 
-	dcs_write_seq(ctx, MCS_CMD_MODE_SW, MCS_CMD2_P3);
-	dcs_write_cmd_seq(ctx, MCS_GAMMA_VP, 0x00, 0x0C, 0x12, 0x0E, 0x06,
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, MCS_CMD_MODE_SW, MCS_CMD2_P3);
+	dcs_write_cmd_seq(dsi_ctx, MCS_GAMMA_VP, 0x00, 0x0C, 0x12, 0x0E, 0x06,
 			  0x12, 0x0E, 0x0B, 0x15, 0x0B, 0x10, 0x07, 0x0F,
 			  0x12, 0x0C, 0x00);
-	dcs_write_cmd_seq(ctx, MCS_GAMMA_VN, 0x00, 0x0C, 0x12, 0x0E, 0x06,
+	dcs_write_cmd_seq(dsi_ctx, MCS_GAMMA_VN, 0x00, 0x0C, 0x12, 0x0E, 0x06,
 			  0x12, 0x0E, 0x0B, 0x15, 0x0B, 0x10, 0x07, 0x0F,
 			  0x12, 0x0C, 0x00);
 
 	/* Exit CMD2 */
-	dcs_write_seq(ctx, MCS_CMD_MODE_SW, MCS_CMD1_UCS);
+	mipi_dsi_dcs_write_seq_multi(dsi_ctx, MCS_CMD_MODE_SW, MCS_CMD1_UCS);
 }
 
 static int rm68200_unprepare(struct drm_panel *panel)
@@ -272,7 +248,7 @@ static int rm68200_prepare(struct drm_panel *panel)
 		msleep(100);
 	}
 
-	rm68200_init_sequence(ctx);
+	rm68200_init_sequence(&dsi_ctx);
 
 	mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx);
 
-- 
2.43.0

Re: [PATCH 3/3] drm/panel: raydium-rm68200: Use multi-context helpers for init sequence

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] drm/panel: resource leak on rm68200_prepare() error path
--

commit 43be4887f342d01dc5322111059b764933197c3c
Author: Hsieh Hung-En <hungen3108@gmail.com>

drm/panel: raydium-rm68200: Use multi-context helpers for init sequence
    
The commit replaces the custom DCS write helpers with the multi-context
helpers mipi_dsi_dcs_write_seq_multi() and mipi_dsi_dcs_write_var_seq_multi().
It also shares the multi-context with prepare() so that errors are
propagated and subsequent commands are skipped after a failure.

> diff --git a/drivers/gpu/drm/panel/panel-raydium-rm68200.c b/drivers/gpu/drm/panel/panel-raydium-rm68200.c
> index c535dc931903e..a01b2db55c7f0 100644
> --- a/drivers/gpu/drm/panel/panel-raydium-rm68200.c
> +++ b/drivers/gpu/drm/panel/panel-raydium-rm68200.c
[ ... ]
> @@ -273,21 +248,17 @@ static int rm68200_prepare(struct drm_panel *panel)
>  		msleep(100);
>  	}
>  
> -	rm68200_init_sequence(ctx);
> +	rm68200_init_sequence(&dsi_ctx);
>  
> -	ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
> -	if (ret)
> -		return ret;
> +	mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx);
>  
> -	msleep(125);
> +	mipi_dsi_msleep(&dsi_ctx, 125);
>  
> -	ret = mipi_dsi_dcs_set_display_on(dsi);
> -	if (ret)
> -		return ret;
> +	mipi_dsi_dcs_set_display_on_multi(&dsi_ctx);
>  
> -	msleep(20);
> +	mipi_dsi_msleep(&dsi_ctx, 20);
>  
> -	return 0;
> +	return dsi_ctx.accum_err;

[Severity: Medium]
Does this code leak the regulator enable count?

rm68200_prepare() enables the ctx->supply regulator and configures
ctx->reset_gpio at the beginning of the function.

The patch changes the execution flow so that if any of the DCS commands fail,
their error is recorded in dsi_ctx.accum_err. The function then returns
dsi_ctx.accum_err directly, without disabling the regulator or asserting the
reset GPIO.

If funcs->prepare() returns an error, the DRM panel framework does not mark
the panel as prepared and will never call funcs->unprepare() to clean up.

Consequently, the regulator enable count would be permanently unbalanced and
the hardware would remain partially powered. While this leak existed
previously for the sleep and display commands, this patch modifies the error
return paths and makes it significantly more likely to trigger by now
aborting on any initialization sequence error as well.

Could an error unwind path be added to clean up the regulator and GPIO?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261014135028.1438841-1-hungen3108@gmail.com?part=3