From: sashiko-bot@kernel.org
To: "Raag Jadav" <raag.jadav@intel.com>, intel-xe@lists.freedesktop.org
Subject: Re: [PATCH v9 5/7] drm/xe/pci_error: Flush GT wedge worker before bus reset
Date: Fri, 16 Oct 2026 03:33:35 +0000 [thread overview]
Message-ID: <sashiko-outbox-173675@kernel.org> (raw)
In-Reply-To: <20261016031559.427941-6-raag.jadav@intel.com>
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [High] drm/xe: panic in prepare_device_for_reset() on uninitialized work_struct
- [Medium] drm/xe: assertion failures in wedge path on PCI error
--
commit 8e840959ff8a982016205caa862c674505ecb9c2
Author: Raag Jadav <raag.jadav@intel.com>
drm/xe/pci_error: Flush GT wedge worker before bus reset
With GT wedging now done async, this commit makes sure the wedge worker
is flushed to avoid side-effects during PCI bus reset.
> diff --git a/drivers/gpu/drm/xe/xe_pci_error.c b/drivers/gpu/drm/xe/xe_pci_error.c
> index e1b9dc5f0a6dc..a5c8fd67738cf 100644
> --- a/drivers/gpu/drm/xe/xe_pci_error.c
> +++ b/drivers/gpu/drm/xe/xe_pci_error.c
> @@ -30,8 +30,10 @@ static void prepare_device_for_reset(struct pci_dev *pdev)
>
> xe_device_set_in_reset(xe);
>
> - for_each_gt(gt, xe, id)
> + for_each_gt(gt, xe, id) {
> xe_gt_declare_wedged(gt);
[Severity: Medium]
Will this trigger an assertion failure if a PCI error occurs when the device
is configured with wedged_mode=0?
If the user configures wedged_mode=0 (which resolves to XE_WEDGED_MODE_NEVER),
the device correctly skips GPU-hang wedging. However, when a PCI error forces
a bus reset, prepare_device_for_reset() unconditionally calls
xe_gt_declare_wedged() without checking the mode.
Looking at xe_gt_declare_wedged() and downstream functions like
xe_uc_declare_wedged() and xe_guc_declare_wedged(), they all contain assertions
checking wedged.mode:
void xe_gt_declare_wedged(struct xe_gt *gt)
{
xe_gt_assert(gt, gt_to_xe(gt)->wedged.mode);
...
This will cause a cascade of kernel warnings if a PCI error is detected on a
device with wedged_mode=0.
> + flush_work(>->wedge.worker);
[Severity: High]
Could this cause a panic by operating on a zero-initialized work_struct during
early probe?
If a hardware error (AER) is detected during device probe,
prepare_device_for_reset() can be called after xe_info_init() allocates the GT
structures but before xe_device_probe() calls xe_gt_init_early() to initialize
the wedge.worker.
Since for_each_gt() iterates over all allocated GTs rather than just the
initialized ones, flush_work() could be called on an uninitialized work_struct,
leading to a kernel oops or a WARN splat in __flush_work().
> + }
>
> pci_disable_device(pdev);
> }
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261016031559.427941-1-raag.jadav@intel.com?part=5
next prev parent reply other threads:[~2026-10-16 3:33 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-16 3:15 [PATCH v9 0/7] Introduce xe_wedge Raag Jadav
2026-10-16 3:15 ` [PATCH v9 1/7] drm/xe/gt: Use GT ordered workqueue for wedging Raag Jadav
2026-10-16 3:32 ` sashiko-bot
2026-10-16 3:15 ` [PATCH v9 2/7] drm/xe: Drop xe_device_set_wedged_method() Raag Jadav
2026-10-16 3:15 ` [PATCH v9 3/7] drm/xe: Move xe_device_wedged_fini() registration to xe_device_probe_early() Raag Jadav
2026-10-16 3:15 ` [PATCH v9 4/7] drm/xe: Make xe_device_declare_wedged() IRQ safe Raag Jadav
2026-10-16 3:28 ` sashiko-bot
2026-10-16 3:15 ` [PATCH v9 5/7] drm/xe/pci_error: Flush GT wedge worker before bus reset Raag Jadav
2026-10-16 3:33 ` sashiko-bot [this message]
2026-10-16 3:15 ` [PATCH v9 6/7] drm/xe: Introduce xe_wedge Raag Jadav
2026-10-16 3:15 ` [PATCH v9 7/7] drm/xe/ras: Move xe_ras_process_errors() to xe_ras Raag Jadav
2026-10-16 3:36 ` sashiko-bot
2026-10-16 3:22 ` ✗ CI.checkpatch: warning for Introduce xe_wedge (rev8) Patchwork
2026-10-16 3:25 ` ✓ CI.KUnit: success " Patchwork
2026-10-16 4:03 ` ✓ Xe.CI.BAT: " Patchwork
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