[PATCH 0/2] PCI: dwc: Fix MEM outbound iATU setup

[PATCH 0/2] PCI: dwc: Fix MEM outbound iATU setup

[Xincheng Ji]

This series follows up on the recently applied MEM outbound iATU support.

The DesignWare outbound no-match path does not translate addresses. Skip
MEM outbound iATU programming whenever atu.parent_bus_addr matches
atu.pci_addr, rather than relying on a driver-specific flag. CFG and I/O
accesses, as well as non-identity-mapped MEM ranges, continue to use
outbound iATU windows.

Patch 1 removes bypass_ob_mem_iatu from the generic DesignWare PCIe host
code and directly compares the parent-bus and PCI addresses before
programming a MEM outbound iATU window.

Patch 2 removes the now-redundant bypass_ob_mem_iatu assignment from the
UltraRISC DP1000 driver.

Signed-off-by: Xincheng Ji <jixincheng@ultrarisc.com>
---
Xincheng Ji (2):
      PCI: dwc: Skip MEM outbound iATU setup for identity mappings
      PCI: ultrarisc: Remove bypass_ob_mem_iatu variable on DP1000

 drivers/pci/controller/dwc/pcie-designware-host.c | 17 +++++------------
 drivers/pci/controller/dwc/pcie-designware.h      |  1 -
 drivers/pci/controller/dwc/pcie-ultrarisc.c       |  6 ------
 3 files changed, 5 insertions(+), 19 deletions(-)
---
base-commit: 0a2602de077462d3111eb9fd3da5b12a57fc6c93
change-id: 20261015-dw-pci-fix-c8e51f83be02

Best regards,
--  
Xincheng Ji <jixincheng@ultrarisc.com>

[PATCH 1/2] PCI: dwc: Skip MEM outbound iATU setup for identity mappings

[Xincheng Ji]

No outbound iATU translation is required when the parent-bus address
matches the PCI address. This is a DesignWare controller property, not
an UltraRISC-specific behavior.

Compare the addresses directly and skip MEM outbound iATU setup when
they match. Remove bypass_ob_mem_iatu and the UltraRISC-specific setting.
CFG and I/O accesses, as well as non-identity-mapped MEM ranges, still
use outbound iATU windows.

Fixes: 17b478b29cf1 ("PCI: dwc: Allow drivers to skip MEM outbound iATU setup")
Signed-off-by: Xincheng Ji <jixincheng@ultrarisc.com>
---
 drivers/pci/controller/dwc/pcie-designware-host.c | 17 +++++------------
 drivers/pci/controller/dwc/pcie-designware.h      |  1 -
 2 files changed, 5 insertions(+), 13 deletions(-)

diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
index cf5ca281e91b..c593a1f1c2e0 100644
--- a/drivers/pci/controller/dwc/pcie-designware-host.c
+++ b/drivers/pci/controller/dwc/pcie-designware-host.c
@@ -918,19 +918,12 @@ static int dw_pcie_iatu_setup(struct dw_pcie_rp *pp)
 		atu.parent_bus_addr = entry->res->start - pci->parent_bus_offset;
 		atu.pci_addr = entry->res->start - entry->offset;
 
-		if (pp->bypass_ob_mem_iatu) {
-			/*
-			 * The no-match pass-through path preserves the correct
-			 * PCI address only for identity-mapped MEM ranges.
-			 */
-			if (atu.parent_bus_addr != atu.pci_addr) {
-				dev_err(pci->dev,
-					"Cannot bypass outbound iATU for non-identity MEM range %pr\n",
-					entry->res);
-				return -EINVAL;
-			}
+		/*
+		 * No ATU translation is required when the parent-bus address matches
+		 * the PCI address. This is a property of the DesignWare controller.
+		 */
+		if (atu.parent_bus_addr == atu.pci_addr)
 			continue;
-		}
 
 		/* Adjust iATU size if MSG TLP region was allocated before */
 		if (pp->msg_res && pp->msg_res->parent == entry->res)
diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
index 799c05213ae3..128729fee607 100644
--- a/drivers/pci/controller/dwc/pcie-designware.h
+++ b/drivers/pci/controller/dwc/pcie-designware.h
@@ -471,7 +471,6 @@ struct dw_pcie_rp {
 	struct pci_config_window *cfg;
 	bool			ecam_enabled;
 	bool			native_ecam;
-	bool			bypass_ob_mem_iatu;
 	bool                    skip_l23_ready;
 	bool			skip_pwrctrl_off;
 	/* Set if the RC loses power during suspend */

-- 
2.34.1

[PATCH 2/2] PCI: ultrarisc: Remove bypass_ob_mem_iatu variable on DP1000

[Xincheng Ji]

The DP1000 PCIe address space is the same as the CPU address space.
In this configuration, the DWC controller supports bypassing the
outbound iATU window, so a separate variable is unnecessary.

Fixes: 8da2b970ed4c ("PCI: ultrarisc: Skip MEM outbound iATU setup on DP1000")
Signed-off-by: Xincheng Ji <jixincheng@ultrarisc.com>
---
 drivers/pci/controller/dwc/pcie-ultrarisc.c | 6 ------
 1 file changed, 6 deletions(-)

diff --git a/drivers/pci/controller/dwc/pcie-ultrarisc.c b/drivers/pci/controller/dwc/pcie-ultrarisc.c
index 523f454c6c52..a0d328c0c09b 100644
--- a/drivers/pci/controller/dwc/pcie-ultrarisc.c
+++ b/drivers/pci/controller/dwc/pcie-ultrarisc.c
@@ -154,12 +154,6 @@ static int ultrarisc_pcie_probe(struct platform_device *pdev)
 
 	pp = &pci->pp;
 
-	/*
-	 * DP1000 routes MEM transactions without outbound iATU windows, which
-	 * avoids the 16-window/4GB-per-window aperture limit.
-	 */
-	pp->bypass_ob_mem_iatu = true;
-
 	platform_set_drvdata(pdev, ultra);
 
 	ret = ultrarisc_pcie_init_clks(ultra);

-- 
2.34.1

Re: [PATCH 2/2] PCI: ultrarisc: Remove bypass_ob_mem_iatu variable on DP1000

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] PCI: ultrarisc: removing bypass_ob_mem_iatu after struct field breaks bisect
--

commit 64e39828c5cda3565ca7342abcafed6f323d27d1
Author: Xincheng Ji <jixincheng@ultrarisc.com>

PCI: ultrarisc: Remove bypass_ob_mem_iatu variable on DP1000

This commit removes the assignment to pp->bypass_ob_mem_iatu in
ultrarisc_pcie_probe() now that the DWC core handles identity-mapped MEM
outbound iATU bypass directly.

> diff --git a/drivers/pci/controller/dwc/pcie-ultrarisc.c b/drivers/pci/controller/dwc/pcie-ultrarisc.c
> index 523f454c6c524..a0d328c0c09b7 100644
> --- a/drivers/pci/controller/dwc/pcie-ultrarisc.c
> +++ b/drivers/pci/controller/dwc/pcie-ultrarisc.c
> @@ -154,12 +154,6 @@ static int ultrarisc_pcie_probe(struct platform_device *pdev)
>  
>  	pp = &pci->pp;
>  
> -	/*
> -	 * DP1000 routes MEM transactions without outbound iATU windows, which
> -	 * avoids the 16-window/4GB-per-window aperture limit.
> -	 */
> -	pp->bypass_ob_mem_iatu = true;
> -

[Severity: Low]
Does splitting this removal from the preceding commit ("PCI: dwc: Skip MEM
outbound iATU setup for identity mappings") break bisectability when
CONFIG_PCIE_ULTRARISC is enabled?

The preceding commit already removed the bypass_ob_mem_iatu field from
struct dw_pcie_rp in drivers/pci/controller/dwc/pcie-designware.h:

struct dw_pcie_rp {
	...
	bool			ecam_enabled;
	bool			native_ecam;
-	bool			bypass_ob_mem_iatu;
	bool                    skip_l23_ready;

while ultrarisc_pcie_probe() in drivers/pci/controller/dwc/pcie-ultrarisc.c
still sets pp->bypass_ob_mem_iatu = true until this patch, causing a build
failure at the intermediate commit.

Should this change be squashed into the preceding commit (whose commit
message already states "Remove bypass_ob_mem_iatu and the UltraRISC-specific
setting"), or ordered before the struct member is removed from
struct dw_pcie_rp?

>  	platform_set_drvdata(pdev, ultra);
>  
>  	ret = ultrarisc_pcie_init_clks(ultra);

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261019-dw-pci-fix-v1-0-9b7860f919b9@ultrarisc.com?part=2

Re: [PATCH 1/2] PCI: dwc: Skip MEM outbound iATU setup for identity mappings

[sashiko-bot]

> No outbound iATU translation is required when the parent-bus address
> matches the PCI address. This is a DesignWare controller property, not
> an UltraRISC-specific behavior.
> 
> Compare the addresses directly and skip MEM outbound iATU setup when
> they match. Remove bypass_ob_mem_iatu and the UltraRISC-specific setting.
> CFG and I/O accesses, as well as non-identity-mapped MEM ranges, still
> use outbound iATU windows.
> 
> Fixes: 17b478b29cf1 ("PCI: dwc: Allow drivers to skip MEM outbound iATU setup")
> Signed-off-by: Xincheng Ji <jixincheng@ultrarisc.com>

Sashiko has reviewed this patch and found no issues.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261019-dw-pci-fix-v1-0-9b7860f919b9@ultrarisc.com?part=1

Re: [PATCH 2/2] PCI: ultrarisc: Remove bypass_ob_mem_iatu variable on DP1000

[Xincheng Ji]

Hi,

On 2026-10-19 06:53 +0000, sashiko-bot@kernel.org wrote:
> > diff --git a/drivers/pci/controller/dwc/pcie-ultrarisc.c b/drivers/pci/controller/dwc/pcie-ultrarisc.c
> > index 523f454c6c524..a0d328c0c09b7 100644
> > --- a/drivers/pci/controller/dwc/pcie-ultrarisc.c
> > +++ b/drivers/pci/controller/dwc/pcie-ultrarisc.c
> > @@ -154,12 +154,6 @@ static int ultrarisc_pcie_probe(struct platform_device *pdev)
> >  
> >  	pp = &pci->pp;
> >  
> > -	/*
> > -	 * DP1000 routes MEM transactions without outbound iATU windows, which
> > -	 * avoids the 16-window/4GB-per-window aperture limit.
> > -	 */
> > -	pp->bypass_ob_mem_iatu = true;
> > -
> 
> [Severity: Low]
> Does splitting this removal from the preceding commit ("PCI: dwc: Skip MEM
> outbound iATU setup for identity mappings") break bisectability when
> CONFIG_PCIE_ULTRARISC is enabled?
> 
> The preceding commit already removed the bypass_ob_mem_iatu field from
> struct dw_pcie_rp in drivers/pci/controller/dwc/pcie-designware.h:
> 
> struct dw_pcie_rp {
> 	...
> 	bool			ecam_enabled;
> 	bool			native_ecam;
> -	bool			bypass_ob_mem_iatu;
> 	bool                    skip_l23_ready;
> 
> while ultrarisc_pcie_probe() in drivers/pci/controller/dwc/pcie-ultrarisc.c
> still sets pp->bypass_ob_mem_iatu = true until this patch, causing a build
> failure at the intermediate commit.
> 
> Should this change be squashed into the preceding commit (whose commit
> message already states "Remove bypass_ob_mem_iatu and the UltraRISC-specific
> setting"), or ordered before the struct member is removed from
> struct dw_pcie_rp?
> 
> >  	platform_set_drvdata(pdev, ultra);
> >  
> >  	ret = ultrarisc_pcie_init_clks(ultra);
> 
Thanks for pointing this out.

Am I correct in understanding that the issue is with the dependency 
between the patches,as the intermediate commit would fail to build 
when `CONFIG_PCIE_ULTRARISC` is enabled?

Would you prefer that I reorder the patches so that the UltraRISC-specific 
assignment is removed first, or squash the change into the preceding commit
that removes `bypass_ob_mem_iatu`?

I'm happy to revise the series accordingly to ensure that each commit 
builds independently.

Thanks for your guidance!

Best regards,
Xincheng

-- 
Xincheng Ji <jixincheng@ultrarisc.com>

Re: [PATCH 2/2] PCI: ultrarisc: Remove bypass_ob_mem_iatu variable on DP1000

[Niklas Cassel]

On Mon, Oct 19, 2026 at 04:32:33PM +0800, Xincheng Ji wrote:
> Hi,
> 
> On 2026-10-19 06:53 +0000, sashiko-bot@kernel.org wrote:
> > > diff --git a/drivers/pci/controller/dwc/pcie-ultrarisc.c b/drivers/pci/controller/dwc/pcie-ultrarisc.c
> > > index 523f454c6c524..a0d328c0c09b7 100644
> > > --- a/drivers/pci/controller/dwc/pcie-ultrarisc.c
> > > +++ b/drivers/pci/controller/dwc/pcie-ultrarisc.c
> > > @@ -154,12 +154,6 @@ static int ultrarisc_pcie_probe(struct platform_device *pdev)
> > >  
> > >  	pp = &pci->pp;
> > >  
> > > -	/*
> > > -	 * DP1000 routes MEM transactions without outbound iATU windows, which
> > > -	 * avoids the 16-window/4GB-per-window aperture limit.
> > > -	 */
> > > -	pp->bypass_ob_mem_iatu = true;
> > > -
> > 
> > [Severity: Low]
> > Does splitting this removal from the preceding commit ("PCI: dwc: Skip MEM
> > outbound iATU setup for identity mappings") break bisectability when
> > CONFIG_PCIE_ULTRARISC is enabled?
> > 
> > The preceding commit already removed the bypass_ob_mem_iatu field from
> > struct dw_pcie_rp in drivers/pci/controller/dwc/pcie-designware.h:
> > 
> > struct dw_pcie_rp {
> > 	...
> > 	bool			ecam_enabled;
> > 	bool			native_ecam;
> > -	bool			bypass_ob_mem_iatu;
> > 	bool                    skip_l23_ready;
> > 
> > while ultrarisc_pcie_probe() in drivers/pci/controller/dwc/pcie-ultrarisc.c
> > still sets pp->bypass_ob_mem_iatu = true until this patch, causing a build
> > failure at the intermediate commit.
> > 
> > Should this change be squashed into the preceding commit (whose commit
> > message already states "Remove bypass_ob_mem_iatu and the UltraRISC-specific
> > setting"), or ordered before the struct member is removed from
> > struct dw_pcie_rp?
> > 
> > >  	platform_set_drvdata(pdev, ultra);
> > >  
> > >  	ret = ultrarisc_pcie_init_clks(ultra);
> > 
> Thanks for pointing this out.
> 
> Am I correct in understanding that the issue is with the dependency 
> between the patches,as the intermediate commit would fail to build 
> when `CONFIG_PCIE_ULTRARISC` is enabled?
> 
> Would you prefer that I reorder the patches so that the UltraRISC-specific 
> assignment is removed first, or squash the change into the preceding commit
> that removes `bypass_ob_mem_iatu`?
> 
> I'm happy to revise the series accordingly to ensure that each commit 
> builds independently.

I think squashing the two patches would be okay.


Kind regards,
Niklas