Re: [PATCH v2 2/4] serial: 8250_dw: Only accept a contiguous DLF readback

[sashiko-bot@kernel.org]

> dw8250_setup_port() writes all ones to offset 0xc0 and treats any
> nonzero readback as the DLF register. DLF is a bit field starting at
> bit 0, so a real one reads back as a contiguous 2^n - 1 mask. On some
> Allwinner SoCs offset 0xc0 is the RS485 control register instead
> (UART_485_CTL in the A733 User Manual), whose implemented bits are not
> contiguous. The probe still takes its readback for a DLF of fls(readback)
> bits, and every later divisor change writes the fractional divisor into
> the RS485 control register.
> 
> Only accept a readback of the form 2^n - 1.
> 
> The probe itself is unchanged: it still writes all ones to offset 0xc0
> and then restores the old value, so this only changes how the readback
> is interpreted.
> 
> The A733 reads back 0x19f, and Andre Przywara observed 0x9f on the
> A523. Without this check the A733 RS485 control register reads 0xb after
> boot; with it, the register stays 0 across 300 termios toggle and
> restore cycles.
> 
> Suggested-by: Andre Przywara <andre.przywara@arm.com>
> Signed-off-by: Vinicius Pedrosa <vinicius.eduardo.pedrosa@gmail.com>

Sashiko has reviewed this patch and found no issues.

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Sashiko AI review · https://sashiko.dev/#/patchset/cover.1792439398.git.vinicius.eduardo.pedrosa@gmail.com?part=2