[PATCH] hwmon: (mr75203) Fix maximum clock divider

[PATCH] hwmon: (mr75203) Fix maximum clock divider

[wuliwen]

The MR75203 hardware documentation specifies that the clk_sys to
clk_ip frequency ratio must be between 2:1 and 512:1. This limit
is also explicitly documented in the existing pvt_init() comment,
but CLK_SYS_CYCLES_MAX is incorrectly defined as 514.

As a result, both the divider selection check and the final clamp
allow values beyond the supported range. At a divider of 514,
subtracting 2 yields a key of 512, causing the 8-bit CLK_SYNTH
LO, HI, and HOLD fields to overflow into adjacent bits.

Correct CLK_SYS_CYCLES_MAX to 512 to enforce the documented limit
and prevent invalid clock synthesizer configurations.

Fixes: 9d823351a337 ("hwmon: Add hardware monitoring driver for Moortec MR75203 PVT controller")
Signed-off-by: wuliwen <liwen.wu@spacemit.com>
---
 drivers/hwmon/mr75203.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/hwmon/mr75203.c b/drivers/hwmon/mr75203.c
index 7848198f8996..8afc4f6ef0aa 100644
--- a/drivers/hwmon/mr75203.c
+++ b/drivers/hwmon/mr75203.c
@@ -41,7 +41,7 @@
 #define CLK_SYNTH_HI_SFT	8
 #define CLK_SYNTH_HOLD_SFT	16
 #define CLK_SYNTH_EN		BIT(24)
-#define CLK_SYS_CYCLES_MAX	514
+#define CLK_SYS_CYCLES_MAX	512
 #define CLK_SYS_CYCLES_MIN	2
 
 #define SDIF_DISABLE	0x04
-- 
2.34.1

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Re: [PATCH] hwmon: (mr75203) Fix maximum clock divider

[sashiko-bot]

> The MR75203 hardware documentation specifies that the clk_sys to
> clk_ip frequency ratio must be between 2:1 and 512:1. This limit
> is also explicitly documented in the existing pvt_init() comment,
> but CLK_SYS_CYCLES_MAX is incorrectly defined as 514.
> 
> As a result, both the divider selection check and the final clamp
> allow values beyond the supported range. At a divider of 514,
> subtracting 2 yields a key of 512, causing the 8-bit CLK_SYNTH
> LO, HI, and HOLD fields to overflow into adjacent bits.
> 
> Correct CLK_SYS_CYCLES_MAX to 512 to enforce the documented limit
> and prevent invalid clock synthesizer configurations.
> 
> Fixes: 9d823351a337 ("hwmon: Add hardware monitoring driver for Moortec MR75203 PVT controller")
> Signed-off-by: wuliwen <liwen.wu@spacemit.com>

Sashiko has reviewed this patch and found no issues.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261021102327.2619070-1-liwen.wu@spacemit.com?part=1