From: sashiko-bot@kernel.org
To: "Taniya Das" <taniya.das@oss.qualcomm.com>
Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
linux-gpio@vger.kernel.org, robh@kernel.org, conor+dt@kernel.org
Subject: Re: [PATCH v2 09/12] arm64: dts: qcom: qcs8300: Add GP M/N clock controller
Date: Tue, 27 Oct 2026 11:31:21 +0000 [thread overview]
Message-ID: <sashiko-outbox-186454@kernel.org> (raw)
In-Reply-To: <20261026-b4-pdm_clk_gp_mnd_v2-v2-9-ff8e4bc8d567@oss.qualcomm.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] arm64: dts: qcom: monaco: undocumented gp_mn function fails dtbs_check
--
commit ec768e562985a95ab74c10638b6159100f9048cc
Author: Taniya Das <taniya.das@oss.qualcomm.com>
arm64: dts: qcom: qcs8300: Add GP M/N clock controller
This commit adds the GP M/N clock controller node and its pin configuration on
gpio32 to arch/arm64/boot/dts/qcom/monaco.dtsi for QCS8300.
> diff --git a/arch/arm64/boot/dts/qcom/monaco.dtsi b/arch/arm64/boot/dts/qcom/monaco.dtsi
> index 35fbee63d4c65..e122f70eaf20c 100644
> --- a/arch/arm64/boot/dts/qcom/monaco.dtsi
> +++ b/arch/arm64/boot/dts/qcom/monaco.dtsi
[ ... ]
> @@ -6457,6 +6471,13 @@ dp_hot_plug_det: dp-hot-plug-det-state {
> bias-disable;
> };
>
> + gp_mn_active: gp-mn-active-state {
> + pins = "gpio32";
> + function = "gp_mn";
> + drive-strength = <2>;
> + bias-disable;
> + };
[Severity: Low]
Will adding gp_mn_active with function = "gp_mn" under tlmm
(compatible = "qcom,qcs8300-tlmm") cause dtbs_check regressions for device
trees including arch/arm64/boot/dts/qcom/monaco.dtsi?
While commit 70134b186a81 ("pinctrl: qcom: qcs8300: Add gp_mn mux function")
added the gp_mn function to drivers/pinctrl/qcom/pinctrl-qcs8300.c, the schema
in Documentation/devicetree/bindings/pinctrl/qcom,qcs8300-tlmm.yaml does not
list gp_mn in the function enum under $defs/qcom-qcs8300-tlmm-state:
enum: [ aoss_cti, atest_char, atest_usb2, audio_ref, cam_mclk,
cci_async, cci_i2c_scl, cci_i2c_sda, cci_timer, cri_trng,
dbg_out, ddr_bist, ddr_pxi0, ddr_pxi1, ddr_pxi2, ddr_pxi3,
edp0_hot, edp0_lcd, edp1_lcd, egpio, emac0_mcg0, emac0_mcg1,
emac0_mcg2, emac0_mcg3, emac0_mdc, emac0_mdio, emac0_ptp_aux,
emac0_ptp_pps, gcc_gp1, gcc_gp2, gcc_gp3, gcc_gp4, gcc_gp5,
gpio, hs0_mi2s, hs1_mi2s, hs2_mi2s, ibi_i3c, jitter_bist,
Should gp_mn also be added to the function enum in
Documentation/devicetree/bindings/pinctrl/qcom,qcs8300-tlmm.yaml?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261026-b4-pdm_clk_gp_mnd_v2-v2-0-ff8e4bc8d567@oss.qualcomm.com?part=9
next prev parent reply other threads:[~2026-10-27 11:31 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-26 11:29 [PATCH v2 00/12] clk: qcom: Add PDM GP_MN fractional clock divider driver and DT support Taniya Das
2026-10-26 11:29 ` [PATCH v2 01/12] dt-bindings: clock: qcom: Add bindings for PDM GP_MN clock divider Taniya Das
2026-10-27 11:31 ` sashiko-bot
2026-10-27 18:47 ` Krzysztof Kozlowski
2026-10-26 11:29 ` [PATCH v2 02/12] dt-bindings: clock: qcom: Add PDM XO4 divider clock IDs Taniya Das
2026-10-28 11:28 ` Krzysztof Kozlowski
2026-10-26 11:29 ` [PATCH v2 03/12] clk: qcom: Add a driver for PDM GP_MN fractional clock divider Taniya Das
2026-10-27 11:31 ` sashiko-bot
2026-10-26 11:29 ` [PATCH v2 04/12] clk: qcom: gcc: Add configurable PDM XO4 div clocks across targets Taniya Das
2026-10-26 15:04 ` Abel Vesa
2026-10-26 11:29 ` [PATCH v2 05/12] pinctrl: qcom: qcs8300: Add gp_mn mux function Taniya Das
2026-10-26 11:29 ` [PATCH v2 06/12] pinctrl: qcom: sa8775p: " Taniya Das
2026-10-26 11:29 ` [PATCH v2 07/12] pinctrl: qcom: sc7280: " Taniya Das
2026-10-26 11:29 ` [PATCH v2 08/12] pinctrl: qcom: qcs615: " Taniya Das
2026-10-28 15:32 ` Abel Vesa
2026-10-29 8:15 ` Konrad Dybcio
2026-10-26 11:29 ` [PATCH v2 09/12] arm64: dts: qcom: qcs8300: Add GP M/N clock controller Taniya Das
2026-10-27 11:31 ` sashiko-bot [this message]
2026-10-26 11:29 ` [PATCH v2 10/12] arm64: dts: qcom: sa8775p: " Taniya Das
2026-10-27 11:31 ` sashiko-bot
2026-10-26 11:29 ` [PATCH v2 11/12] arm64: dts: qcom: sc7280: " Taniya Das
2026-10-26 16:27 ` Abel Vesa
2026-10-27 11:31 ` sashiko-bot
2026-10-26 11:29 ` [PATCH v2 12/12] arm64: dts: qcom: qcs615: " Taniya Das
2026-10-26 16:27 ` Abel Vesa
2026-10-27 11:31 ` sashiko-bot
2026-10-28 9:44 ` [PATCH v2 00/12] clk: qcom: Add PDM GP_MN fractional clock divider driver and DT support Bartosz Golaszewski
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=sashiko-outbox-186454@kernel.org \
--to=sashiko-bot@kernel.org \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=linux-clk@vger.kernel.org \
--cc=linux-gpio@vger.kernel.org \
--cc=robh@kernel.org \
--cc=sashiko-reviews@lists.linux.dev \
--cc=taniya.das@oss.qualcomm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.