All of lore.kernel.org
 help / color / mirror / Atom feed
* [PATCH v2 0/6] drm/xe/cper: Software (driver-detected) CPER error reporting
@ 2026-10-29 13:26 Mallesh Koujalagi
  2026-10-29 13:26 ` [PATCH v2 1/6] Add CPER logging support for CRI-Do not review Mallesh Koujalagi
                   ` (8 more replies)
  0 siblings, 9 replies; 11+ messages in thread
From: Mallesh Koujalagi @ 2026-10-29 13:26 UTC (permalink / raw)
  To: intel-xe, rodrigo.vivi, matthew.brost
  Cc: anshuman.gupta, badal.nilawar, vinay.belgaumkar, riana.tauro,
	karthik.poosa, sk.anirban, raag.jadav, michal.wajdeczko,
	aravind.iddamsetty, jani.nikula, Mallesh Koujalagi

This series wires up CPER record generation for driver-detected
(software) errors, i.e. the INTEL_SIGID_GPU_XE_SOFTWARE_START..
INTEL_SIGID_BATCH SIGID range, alongside the existing RAS-counter-
sourced (hardware) CPER path.

Patch 1 is a prerequisite carried over from patchwork series 169692
(https://patchwork.freedesktop.org/series/169692/), included here only
so the tree compiles; it is explicitly marked DO NOT REVIEW and is not
part of this submission.

v2:
- Move union inside xe_cper_intel_hdr structure. (Badal)

Badal Nilawar (1):
  Add CPER logging support for CRI-Do not review

Mallesh Koujalagi (5):
  drm/xe/cper: Add software error classification definitions
  drm/xe/cper: Decouple RAS error class initialization
  drm/xe/cper: Support software CPER records
  drm/xe/log: Add software CPER information to KUnit output
  drm/xe/log: Test software CPER emission parameters

 .../ABI/testing/sysfs-driver-intel-xe-cper    |  18 +
 drivers/gpu/drm/xe/Makefile                   |   3 +
 drivers/gpu/drm/xe/tests/xe_log_kunit.c       |  94 ++++-
 drivers/gpu/drm/xe/xe_cper.c                  | 360 ++++++++++++++++++
 drivers/gpu/drm/xe/xe_cper.h                  |  37 ++
 drivers/gpu/drm/xe/xe_cper_types.h            | 141 +++++++
 drivers/gpu/drm/xe/xe_device_types.h          |   4 +
 drivers/gpu/drm/xe/xe_log.c                   |   5 +-
 drivers/gpu/drm/xe/xe_ras.c                   | 148 +++++--
 drivers/gpu/drm/xe/xe_ras.h                   |   2 +
 drivers/gpu/drm/xe/xe_trace_cper.c            |   9 +
 drivers/gpu/drm/xe/xe_trace_cper.h            |  65 ++++
 12 files changed, 857 insertions(+), 29 deletions(-)
 create mode 100644 Documentation/ABI/testing/sysfs-driver-intel-xe-cper
 create mode 100644 drivers/gpu/drm/xe/xe_cper.c
 create mode 100644 drivers/gpu/drm/xe/xe_cper.h
 create mode 100644 drivers/gpu/drm/xe/xe_cper_types.h
 create mode 100644 drivers/gpu/drm/xe/xe_trace_cper.c
 create mode 100644 drivers/gpu/drm/xe/xe_trace_cper.h

-- 
2.48.1


^ permalink raw reply	[flat|nested] 11+ messages in thread

* [PATCH v2 1/6] Add CPER logging support for CRI-Do not review
  2026-10-29 13:26 [PATCH v2 0/6] drm/xe/cper: Software (driver-detected) CPER error reporting Mallesh Koujalagi
@ 2026-10-29 13:26 ` Mallesh Koujalagi
  2026-10-29 13:26 ` [PATCH v2 2/6] drm/xe/cper: Add software error classification definitions Mallesh Koujalagi
                   ` (7 subsequent siblings)
  8 siblings, 0 replies; 11+ messages in thread
From: Mallesh Koujalagi @ 2026-10-29 13:26 UTC (permalink / raw)
  To: intel-xe, rodrigo.vivi, matthew.brost
  Cc: anshuman.gupta, badal.nilawar, vinay.belgaumkar, riana.tauro,
	karthik.poosa, sk.anirban, raag.jadav, michal.wajdeczko,
	aravind.iddamsetty, jani.nikula, Mallesh Koujalagi

From: Badal Nilawar <badal.nilawar@intel.com>

DO NOT REVIEW. COMPILATION ONLY
This patch is from https://patchwork.freedesktop.org/series/169692/
Added only for Compilation.

Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
Signed-off-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
---
 .../ABI/testing/sysfs-driver-intel-xe-cper    |  18 +
 drivers/gpu/drm/xe/Makefile                   |   3 +
 drivers/gpu/drm/xe/xe_cper.c                  | 322 ++++++++++++++++++
 drivers/gpu/drm/xe/xe_cper.h                  |  37 ++
 drivers/gpu/drm/xe/xe_cper_types.h            | 110 ++++++
 drivers/gpu/drm/xe/xe_device_types.h          |   4 +
 drivers/gpu/drm/xe/xe_log.c                   |   5 +-
 drivers/gpu/drm/xe/xe_ras.c                   | 148 ++++++--
 drivers/gpu/drm/xe/xe_ras.h                   |   2 +
 drivers/gpu/drm/xe/xe_trace_cper.c            |   9 +
 drivers/gpu/drm/xe/xe_trace_cper.h            |  65 ++++
 11 files changed, 695 insertions(+), 28 deletions(-)
 create mode 100644 Documentation/ABI/testing/sysfs-driver-intel-xe-cper
 create mode 100644 drivers/gpu/drm/xe/xe_cper.c
 create mode 100644 drivers/gpu/drm/xe/xe_cper.h
 create mode 100644 drivers/gpu/drm/xe/xe_cper_types.h
 create mode 100644 drivers/gpu/drm/xe/xe_trace_cper.c
 create mode 100644 drivers/gpu/drm/xe/xe_trace_cper.h

diff --git a/Documentation/ABI/testing/sysfs-driver-intel-xe-cper b/Documentation/ABI/testing/sysfs-driver-intel-xe-cper
new file mode 100644
index 000000000000..2faccc318b34
--- /dev/null
+++ b/Documentation/ABI/testing/sysfs-driver-intel-xe-cper
@@ -0,0 +1,18 @@
+What:		/sys/bus/pci/drivers/xe/.../cper_on_query
+Date:		October 2026
+KernelVersion:	7.5
+Contact:	intel-xe@lists.freedesktop.org
+Description:
+		This file controls whether a CPER (Common Platform Error Record)
+		is emitted each time a RAS error counter is queried.
+
+		This sysfs file is present only on Intel Xe platforms that support
+		the RAS error counter interface and when the kernel is built with
+		CPER support. Reading the current setting is available to all
+		users, while updating it is restricted to administrative users
+		only.
+
+		The value is a boolean. When set to 1, every counter query emits
+		a CPER record built from the counter and its associated info
+		queue data. When set to 0 (default), no record is emitted on
+		query.
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index a8476e2e8d54..0392ba58dd65 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -169,6 +169,9 @@ xe-$(CONFIG_HWMON) += xe_hwmon.o
 xe-$(CONFIG_PERF_EVENTS) += xe_pmu.o
 xe-$(CONFIG_CONFIGFS_FS) += xe_configfs.o
 
+xe-$(CONFIG_UEFI_CPER) += xe_cper.o \
+			  xe_trace_cper.o
+
 # graphics virtualization (SR-IOV) support
 xe-y += \
 	xe_gt_sriov_vf.o \
diff --git a/drivers/gpu/drm/xe/xe_cper.c b/drivers/gpu/drm/xe/xe_cper.c
new file mode 100644
index 000000000000..bb90030bcd2d
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_cper.c
@@ -0,0 +1,322 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#include <linux/bcd.h>
+#include <linux/device.h>
+#include <linux/err.h>
+#include <linux/kernel.h>
+#include <linux/minmax.h>
+#include <linux/pci.h>
+#include <linux/slab.h>
+#include <linux/sysfs.h>
+#include <linux/time.h>
+#include <linux/timekeeping.h>
+
+#include "xe_cper.h"
+#include "xe_cper_types.h"
+#include "xe_device.h"
+#include "xe_printk.h"
+#include "xe_ras.h"
+#include "xe_ras_types.h"
+#include "xe_trace_cper.h"
+
+static bool is_sigid(u32 sigid)
+{
+	return sigid != INTEL_SIGID_INVALID && sigid != U32_MAX;
+}
+
+static bool is_hw_sigid(enum xe_sigid sigid)
+{
+	return in_range(sigid, INTEL_SIGID_GPU_XE_HARDWARE_START, INTEL_SIGID_BATCH);
+}
+
+/* CPER platform_id GUIDs (RFC 9562 UUIDv5) for each PCI device ID. */
+static const struct xe_device_guid_entry xe_device_guids[] = {
+	{ 0x674C, GUID_INIT(0x9046afe5, 0x9041, 0x5124,
+			    0x86, 0x14, 0x92, 0x55, 0x0d, 0x9e, 0x9d, 0xa6) },
+	{ 0x674D, GUID_INIT(0xf95911b8, 0x6564, 0x5905,
+			    0xa6, 0xa7, 0xb9, 0xbf, 0x54, 0xab, 0x6c, 0x27) },
+	{ 0x674E, GUID_INIT(0xb8d24106, 0x0108, 0x59f1,
+			    0x8f, 0xfc, 0x9f, 0xc4, 0xa9, 0xc9, 0xb7, 0xb0) },
+	{ 0x674F, GUID_INIT(0xdd8dd88e, 0xef2f, 0x59b1,
+			    0x99, 0x15, 0xdb, 0x6f, 0x1d, 0xc9, 0xb4, 0x5d) },
+	{ 0x6750, GUID_INIT(0x1dd66c44, 0x87d5, 0x524a,
+			    0xad, 0x6e, 0xfc, 0x18, 0x9d, 0x42, 0x6f, 0x1a) },
+	{ 0x6751, GUID_INIT(0x17d0dd04, 0x2fad, 0x5400,
+			    0x99, 0xc8, 0x9b, 0x45, 0x51, 0x3b, 0x67, 0xe3) },
+	{ 0x6752, GUID_INIT(0xb778ead8, 0x0009, 0x59a7,
+			    0xa1, 0x3a, 0x78, 0xce, 0x4d, 0xdd, 0xae, 0xf5) },
+};
+
+static const guid_t *lookup_device_guid(struct xe_device *xe)
+{
+	struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
+	unsigned int i;
+
+	for (i = 0; i < ARRAY_SIZE(xe_device_guids); i++)
+		if (xe_device_guids[i].device_id == pdev->device)
+			return &xe_device_guids[i].guid;
+
+	xe_printk(xe, warn_once, "CPER: no platform GUID for device %04x\n", pdev->device);
+
+	return NULL;
+}
+
+static u64 cper_timestamp_now(void)
+{
+	struct tm tm;
+	u64 ts = 0;
+	u8 *p = (u8 *)&ts;
+	int year;
+
+	time64_to_tm(ktime_get_real_seconds(), 0, &tm);
+
+	year = tm.tm_year + 1900;
+
+	p[0] = bin2bcd(tm.tm_sec);
+	p[1] = bin2bcd(tm.tm_min);
+	p[2] = bin2bcd(tm.tm_hour);
+	p[3] = 0x0;
+	p[4] = bin2bcd(tm.tm_mday);
+	p[5] = bin2bcd(tm.tm_mon + 1);
+	p[6] = bin2bcd(year % 100);
+	p[7] = bin2bcd(year / 100);
+
+	return ts;
+}
+
+static void cper_init_intel_hdr(struct xe_device *xe, const struct xe_ras_error_class *counter,
+				u64 first_timestamp, u32 sig_id, u32 error_count,
+				struct xe_cper_intel_hdr *ihdr)
+{
+	ihdr->counter = *counter;
+	ihdr->validation_bits |= XE_CPER_VALID_LOCATION;
+	ihdr->sig_id = U32_MAX;
+
+	if (first_timestamp) {
+		ihdr->first_timestamp = first_timestamp;
+		ihdr->validation_bits |= XE_CPER_VALID_FIRST_TIMESTAMP;
+	}
+
+	if (is_sigid(sig_id)) {
+		ihdr->sig_id = sig_id;
+		ihdr->validation_bits |= XE_CPER_VALID_SIG_ID;
+	}
+
+	ihdr->error_count = error_count;
+
+	strscpy(ihdr->pci_bdf, pci_name(to_pci_dev(xe->drm.dev)), sizeof(ihdr->pci_bdf));
+	ihdr->validation_bits |= XE_CPER_VALID_PCI_BDF;
+
+#ifdef MODULE
+	if (THIS_MODULE->srcversion) {
+		strscpy(ihdr->drv_version, THIS_MODULE->srcversion, sizeof(ihdr->drv_version));
+		ihdr->validation_bits |= XE_CPER_VALID_DRV_VERSION;
+	}
+#endif
+}
+
+static void cper_init_record_hdr(struct xe_device *xe, u8 severity,
+				 const guid_t *notification_type,
+				 struct cper_record_header *rhdr,
+				 u32 total_len)
+{
+	const guid_t *device_guid;
+
+	/* Assemble the CPER record header (UEFI Appendix N.2.1) */
+	memcpy(rhdr->signature, CPER_SIG_RECORD, CPER_SIG_SIZE);
+	rhdr->revision          = CPER_RECORD_REV;
+	rhdr->signature_end     = CPER_SIG_END;
+	rhdr->section_count     = 1;
+	rhdr->error_severity    = severity;
+	rhdr->validation_bits   = CPER_VALID_TIMESTAMP;
+	rhdr->record_length     = total_len;
+	rhdr->timestamp         = cper_timestamp_now();
+	rhdr->creator_id        = INTEL_CPER_CREATOR_XEKMD;
+	rhdr->notification_type = *notification_type;
+	rhdr->record_id         = cper_next_record_id();
+
+	device_guid = lookup_device_guid(xe);
+	if (device_guid) {
+		rhdr->platform_id      = *device_guid;
+		rhdr->validation_bits |= CPER_VALID_PLATFORM_ID;
+	}
+}
+
+static void cper_init_section_desc(struct xe_device *xe, u8 severity,
+				   struct cper_section_descriptor *sdesc,
+				   u32 einfo_len)
+{
+	sdesc->section_offset   = sizeof(struct cper_record_header) +
+				  sizeof(struct cper_section_descriptor);
+	sdesc->section_length   = sizeof(struct xe_cper_intel_hdr) + einfo_len;
+	sdesc->revision         = CPER_SEC_REV;
+	sdesc->validation_bits  = 0;
+	sdesc->section_type     = INTEL_CPER_SECTION_ACCEL_GENERIC;
+	sdesc->section_severity = severity;
+
+	if (xe->info.has_device_uid) {
+		memcpy(&sdesc->fru_id, &xe->device_uid, sizeof(xe->device_uid));
+		sdesc->validation_bits |= CPER_SEC_VALID_FRU_ID;
+	}
+}
+
+static void cper_record_emit(struct xe_device *xe, u8 severity,
+			     const guid_t *notification_type,
+			     const struct xe_cper_intel_hdr *ihdr,
+			     const void *einfo, u32 einfo_len)
+{
+	struct cper_section_descriptor *sdesc;
+	struct xe_cper_nonstd_record *rec;
+	struct cper_record_header *rhdr;
+	u32 total_len;
+
+	total_len = sizeof(struct xe_cper_nonstd_record) + einfo_len;
+	rec = kzalloc(total_len, GFP_KERNEL);
+	if (!rec)
+		return;
+
+	rhdr = &rec->record_hdr;
+	sdesc = &rec->section_desc;
+
+	/* Assemble the CPER record header (UEFI Appendix N.2.1) */
+	cper_init_record_hdr(xe, severity, notification_type, rhdr, total_len);
+
+	/* Assemble the section descriptor (UEFI Appendix N.2.2) */
+	cper_init_section_desc(xe, severity, sdesc, einfo_len);
+
+	/* Copy the Intel-specific section header */
+	rec->intel_hdr = *ihdr;
+
+	/* Append optional variable-length error info */
+	if (einfo && einfo_len)
+		memcpy((u8 *)rec + sizeof(*rec), einfo, einfo_len);
+
+	trace_xe_error_cper(xe, &rhdr->platform_id, &sdesc->fru_id, severity,
+			    &rec->intel_hdr, total_len, (u8 *)rec);
+
+	kfree(rec);
+}
+
+/**
+ * xe_cper_emit_counter() - Emit CPER records for an already fetched error counter
+ * @xe: The &xe_device
+ * @cper_sev: CPER severity
+ * @sigid: Error signature identifier
+ * @counter: RAS error class
+ * @response: Counter response returned by firmware for @counter
+ *
+ * Build and emit a CPER record from @response.
+ */
+void xe_cper_emit_counter(struct xe_device *xe, int cper_sev, enum xe_sigid sigid,
+			  const struct xe_ras_error_class *counter,
+			  const struct xe_ras_get_counter_response *response)
+{
+	struct xe_cper_intel_hdr ihdr = {};
+
+	xe_assert(xe, is_hw_sigid(sigid));
+
+	cper_init_intel_hdr(xe, counter, response->timestamp,
+			    sigid, response->value, &ihdr);
+	cper_record_emit(xe, cper_sev, &INTEL_CPER_NOTIFY_GPU_ERROR, &ihdr, NULL, 0);
+}
+
+static void cper_emit_hw_err(struct xe_device *xe, int cper_sev, enum xe_sigid sigid,
+			     const struct xe_ras_error_class *counter)
+{
+	struct xe_ras_get_counter_response response = {};
+
+	/* Fetching the counter sends a sysctrl command */
+	might_sleep();
+	xe_device_assert_mem_access(xe);
+
+	if (xe_ras_get_counter_response(xe, counter, &response)) {
+		xe_err(xe, "CPER: failed to get counter, skipping record\n");
+		return;
+	}
+
+	xe_cper_emit_counter(xe, cper_sev, sigid, counter, &response);
+}
+
+/**
+ * xe_cper_emit() - Emit a CPER record for a SIGID log entry
+ * @xe: The &xe_device
+ * @cper_sev: CPER severity
+ * @sigid: Error signature identifier
+ * @component: Component identifier
+ * @location: Location details of the @component
+ * @data: Pointer to the additional details, or ERR_PTR, or NULL if not applicable
+ * @len: Length of the @data in bytes, or 0 if not applicable
+ * @vaf: Formatted log message
+ *
+ * Emit a CPER record for a SIGID log entry
+ *
+ * Example trace output::
+ *
+ *   xe_error_cper: dev=0000:03:00.0 severity=2
+ *     platform_id=9046afe5-9041-5124-8614-92550d9e9da6
+ *     fru_id=91befe38-2f61-3d7b-0000-000000000000
+ *     intel_hdr_raw=
+ *       01 02 00 18 00 00 00 01 00 00 00 00 64 77 51 14 ...
+ *     cper_len=1772
+ *     cper_raw=
+ *       43 50 45 52 00 01 ff ff ff ff 01 00 02 00 00 00 ...
+ */
+void xe_cper_emit(struct xe_device *xe, int cper_sev, enum xe_sigid sigid,
+		  u32 component, u32 location, const void *data, size_t len,
+		  struct va_format *vaf)
+{
+	if (is_hw_sigid(sigid) && !IS_ERR_OR_NULL(data)) {
+		cper_emit_hw_err(xe, cper_sev, sigid, data);
+		return;
+	}
+
+	/* TODO software CPER */
+}
+
+static ssize_t cper_on_query_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+	struct xe_device *xe = kdev_to_xe_device(dev);
+
+	return sysfs_emit(buf, "%u\n", READ_ONCE(xe->cper.on_query));
+}
+
+static ssize_t cper_on_query_store(struct device *dev, struct device_attribute *attr,
+				   const char *buf, size_t count)
+{
+	struct xe_device *xe = kdev_to_xe_device(dev);
+	bool enable;
+	int ret;
+
+	ret = kstrtobool(buf, &enable);
+	if (ret)
+		return ret;
+
+	WRITE_ONCE(xe->cper.on_query, enable);
+
+	return count;
+}
+static DEVICE_ATTR_RW(cper_on_query);
+
+static struct attribute *cper_attrs[] = {
+	&dev_attr_cper_on_query.attr,
+	NULL
+};
+
+/* See Documentation/ABI/testing/sysfs-driver-intel-xe-cper */
+static const struct attribute_group cper_group = {
+	.attrs = cper_attrs,
+};
+
+/**
+ * xe_cper_sysfs_init() - Create the CPER sysfs attributes
+ * @xe: The &xe_device
+ *
+ * Return: 0 on success, negative error code on failure.
+ */
+int xe_cper_sysfs_init(struct xe_device *xe)
+{
+	return devm_device_add_group(xe->drm.dev, &cper_group);
+}
diff --git a/drivers/gpu/drm/xe/xe_cper.h b/drivers/gpu/drm/xe/xe_cper.h
new file mode 100644
index 000000000000..89fb8432f027
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_cper.h
@@ -0,0 +1,37 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#ifndef _XE_CPER_H_
+#define _XE_CPER_H_
+
+#include <linux/types.h>
+
+#include "abi/xe_sigid_abi.h"
+
+struct va_format;
+struct xe_device;
+struct xe_ras_error_class;
+struct xe_ras_get_counter_response;
+
+#if IS_ENABLED(CONFIG_UEFI_CPER)
+void xe_cper_emit(struct xe_device *xe, int cper_sev, enum xe_sigid sigid,
+		  u32 component, u32 location, const void *data, size_t len,
+		  struct va_format *vaf);
+void xe_cper_emit_counter(struct xe_device *xe, int cper_sev, enum xe_sigid sigid,
+			  const struct xe_ras_error_class *counter,
+			  const struct xe_ras_get_counter_response *response);
+int xe_cper_sysfs_init(struct xe_device *xe);
+#else
+static inline void xe_cper_emit(struct xe_device *xe, int cper_sev, enum xe_sigid sigid,
+				u32 component, u32 location, const void *data, size_t len,
+				struct va_format *vaf) {}
+static inline void xe_cper_emit_counter(struct xe_device *xe, int cper_sev,
+					enum xe_sigid sigid,
+					const struct xe_ras_error_class *counter,
+					const struct xe_ras_get_counter_response *response) {}
+static inline int xe_cper_sysfs_init(struct xe_device *xe) { return 0; }
+#endif
+
+#endif /* _XE_CPER_H_ */
diff --git a/drivers/gpu/drm/xe/xe_cper_types.h b/drivers/gpu/drm/xe/xe_cper_types.h
new file mode 100644
index 000000000000..68e30df0440e
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_cper_types.h
@@ -0,0 +1,110 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#ifndef _XE_CPER_TYPES_H_
+#define _XE_CPER_TYPES_H_
+
+#include <linux/cper.h>
+#include <linux/types.h>
+#include <linux/uuid.h>
+
+#include "xe_ras_types.h"
+
+/*
+ * Validation bits definition for validation_bits in struct
+ * xe_cper_intel_hdr. When set, corresponding fields in header
+ * contains valid data
+ */
+#define XE_CPER_VALID_LOCATION		0x0001
+#define XE_CPER_VALID_FIRST_TIMESTAMP	0x0002
+#define XE_CPER_VALID_SIG_ID		0x0004
+#define XE_CPER_VALID_PCI_BDF		0x0008
+#define XE_CPER_VALID_DRV_VERSION	0x0010
+
+/*
+ * Intel CPER GUID Namespace — RFC 9562 UUIDv5 (SHA-1 name-based)
+ *
+ * All values below are generated deterministically by uuid generator.
+ * Do not hand-edit the byte values.
+ */
+
+/* Creator IDs */
+#define INTEL_CPER_CREATOR_XEKMD \
+	GUID_INIT(0x9a42070f, 0xdf9d, 0x555e, \
+		  0xba, 0x02, 0x7c, 0xbc, 0x86, 0x3d, 0x37, 0x1c)
+
+/* Notification Types */
+#define INTEL_CPER_NOTIFY_GPU_ERROR \
+	GUID_INIT(0x4ae12aef, 0x8745, 0x5fc7, \
+		  0xb9, 0x96, 0x71, 0xee, 0xbb, 0x51, 0xf2, 0x23)
+
+/* Section Types */
+#define INTEL_CPER_SECTION_ACCEL_GENERIC \
+	GUID_INIT(0xea9d8f84, 0x4258, 0x5227, \
+		  0x80, 0x28, 0xb9, 0xb1, 0x3e, 0x6d, 0x58, 0xb0)
+
+/**
+ * struct xe_cper_intel_hdr - Intel-specific CPER header
+ *
+ * Fixed-size header for the Intel GPU error section of a CPER record.
+ * All multi-byte fields are little-endian.
+ */
+struct xe_cper_intel_hdr {
+	/** @counter: Error class (severity, component, location, cause) */
+	struct xe_ras_error_class counter;
+	/** @first_timestamp: First occurrence of this error class, in ticks */
+	u64 first_timestamp;
+	/** @sig_id: Aggregated error class SIG ID; set to U32_MAX if unknown */
+	u32 sig_id;
+	/** @error_count: Number of times this error has been observed */
+	u32 error_count;
+	/** @validation_bits: Raw u16 view of all valid bits */
+	u16 validation_bits;
+	/** @pci_bdf: PCI location string, format "DDDD:bb:dd.f" */
+	char pci_bdf[16];
+	/** @drv_version: Driver source version string (THIS_MODULE->srcversion) */
+	char drv_version[25];
+	/** @reserved: Reserved for future use, must be zero */
+	u8 reserved[261];
+} __packed;
+
+/**
+ * struct xe_cper_nonstd_record - Intel GPU CPER record
+ *
+ * Contains the standard CPER record header, section descriptor, and the
+ * Intel error section header.
+ */
+struct xe_cper_nonstd_record {
+	/** @record_hdr: Standard CPER record header (UEFI Appendix N.2.1) */
+	struct cper_record_header record_hdr;
+	/** @section_desc: CPER section descriptor */
+	struct cper_section_descriptor section_desc;
+	/** @intel_hdr: Intel-specific CPER header */
+	struct xe_cper_intel_hdr intel_hdr;
+} __packed;
+
+/**
+ * struct xe_device_guid_entry - Mapping from PCI device ID to CPER device GUID
+ *
+ * Used to resolve the platform_id field in a CPER record header.
+ * GUIDs are UUIDv5 (RFC 9562, SHA-1) derived from the Intel CPER namespace
+ * with name string "platform/8086:<dev_id_hex_lower>".
+ */
+struct xe_device_guid_entry {
+	/** @device_id: PCI device ID */
+	u16       device_id;
+	/** @guid: Corresponding UUIDv5 device GUID */
+	guid_t    guid;
+};
+
+/**
+ * struct xe_cper - Xe CPER state
+ */
+struct xe_cper {
+	/** @on_query: Emit a CPER record on each RAS counter query */
+	bool on_query;
+};
+
+#endif
diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index 6a6f9a24365c..b98418795d5e 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -12,6 +12,7 @@
 #include <drm/drm_file.h>
 #include <drm/ttm/ttm_device.h>
 
+#include "xe_cper_types.h"
 #include "xe_devcoredump_types.h"
 #include "xe_drm_ras_types.h"
 #include "xe_heci_gsc.h"
@@ -566,6 +567,9 @@ struct xe_device {
 		struct xe_ras_state state;
 	} ras;
 
+	/** @cper: CPER state */
+	struct xe_cper cper;
+
 	/** @i2c: I2C host controller */
 	struct xe_i2c *i2c;
 
diff --git a/drivers/gpu/drm/xe/xe_log.c b/drivers/gpu/drm/xe/xe_log.c
index 29eb16db3320..80e2b1724ceb 100644
--- a/drivers/gpu/drm/xe/xe_log.c
+++ b/drivers/gpu/drm/xe/xe_log.c
@@ -8,6 +8,7 @@
 
 #include "abi/xe_log_abi.h"
 
+#include "xe_cper.h"
 #include "xe_device.h"
 #include "xe_log.h"
 #include "xe_pci_types.h"
@@ -19,7 +20,9 @@ static void log_emit_cper(struct pci_dev *pdev, int cper_sev, enum xe_sigid sigi
 {
 	KUNIT_STATIC_STUB_REDIRECT(log_emit_cper, pdev, cper_sev, sigid,
 				   component, location, data, len, vaf);
-	/* TODO */
+
+	xe_cper_emit(xe_any_to_xe(pdev), cper_sev, sigid,
+		     component, location, data, len, vaf);
 }
 
 static const char *log_unknown_component_prefix(u32 component)
diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
index db3cbc186a51..2c01c183d02b 100644
--- a/drivers/gpu/drm/xe/xe_ras.c
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -3,9 +3,12 @@
  * Copyright © 2026 Intel Corporation
  */
 
+#include <linux/bitfield.h>
+
 #include "xe_assert.h"
 #include "xe_bo.h"
 #include "xe_configfs.h"
+#include "xe_cper.h"
 #include "xe_debugfs.h"
 #include "xe_device.h"
 #include "xe_drm_ras.h"
@@ -110,7 +113,8 @@ static const char * const gpu_health_states[] = {
 };
 static_assert(ARRAY_SIZE(gpu_health_states) == XE_RAS_HEALTH_MAX);
 
-static int get_counter(struct xe_device *xe, struct xe_ras_error_class *counter, u32 *value);
+static int get_counter(struct xe_device *xe, struct xe_ras_error_class *counter,
+		       u32 *value, bool emit_cper);
 
 static u8 drm_to_xe_ras_severity(u8 severity)
 {
@@ -136,6 +140,20 @@ static u8 xe_to_drm_ras_severity(u8 severity)
 	}
 }
 
+static u8 ras_sev_to_cper_sev(u8 severity)
+{
+	switch (severity) {
+	case XE_RAS_SEV_CORRECTABLE:
+		return CPER_SEV_CORRECTED;
+	case XE_RAS_SEV_UNCORRECTABLE:
+		return CPER_SEV_RECOVERABLE;
+	case XE_RAS_SEV_INFORMATIONAL:
+		return CPER_SEV_INFORMATIONAL;
+	default:
+		return CPER_SEV_RECOVERABLE;
+	}
+}
+
 static u8 drm_to_xe_ras_component(u8 component)
 {
 	switch (component) {
@@ -172,6 +190,24 @@ static u8 xe_to_drm_ras_component(u8 component)
 	}
 }
 
+static enum xe_sigid ras_comp_to_hw_sigid(u8 component)
+{
+	switch (component) {
+	case XE_RAS_COMP_DEVICE_MEMORY:
+		return XE_SIGID_DEVICE_MEMORY;
+	case XE_RAS_COMP_CORE_COMPUTE:
+		return XE_SIGID_CORE_COMPUTE;
+	case XE_RAS_COMP_PCIE:
+		return XE_SIGID_PCIE;
+	case XE_RAS_COMP_FABRIC:
+		return XE_SIGID_FABRIC;
+	case XE_RAS_COMP_SOC_INTERNAL:
+		return XE_SIGID_SOC_INTERNAL;
+	default:
+		return XE_SIGID_HW;
+	}
+}
+
 static int ras_status_to_errno(u32 status)
 {
 	switch (status) {
@@ -192,6 +228,12 @@ static int ras_status_to_errno(u32 status)
 	}
 }
 
+static u16 ras_comp_to_log_comp(u8 component)
+{
+	return FIELD_PREP(XE_LOG_COMPONENT_CLASS_MASK, XE_LOG_COMPONENT_CLASS_HARDWARE) |
+	       FIELD_PREP(XE_LOG_COMPONENT_TYPE_MASK, component);
+}
+
 static inline const char *sev_to_str(u8 severity)
 {
 	if (severity >= XE_RAS_SEV_MAX)
@@ -534,7 +576,7 @@ static void ras_send_error_event(struct xe_device *xe, u8 severity, u8 component
 	counter.common.severity = severity;
 	counter.common.component = component;
 
-	ret = get_counter(xe, &counter, &value);
+	ret = get_counter(xe, &counter, &value, false);
 	if (ret)
 		return;
 
@@ -544,13 +586,17 @@ static void ras_send_error_event(struct xe_device *xe, u8 severity, u8 component
 	xe_drm_ras_event(xe, drm_component, drm_severity, value);
 }
 
-static u8 handle_core_compute_errors(struct xe_ras_error_array *arr)
+static u8 handle_core_compute_errors(struct xe_device *xe, struct xe_ras_error_array *arr)
 {
 	struct xe_ras_compute_error *error_info = (void *)arr->details;
+	u8 cper_sev = ras_sev_to_cper_sev(arr->counter.common.severity);
 	u8 uncorr_type;
 
 	uncorr_type = FIELD_GET(CORE_COMPUTE_UNCORR_TYPE, error_info->log_header);
 
+	xe_log_comp(xe, cper_sev, CORE_COMPUTE, &arr->counter, sizeof(arr->counter),
+		    "Uncorrectable error detected, type %u\n", uncorr_type);
+
 	/* Request a reset if error is global */
 	if (uncorr_type == GLOBAL_UNCORR_ERROR)
 		return XE_RAS_RECOVERY_ACTION_RESET;
@@ -571,7 +617,9 @@ static u8 handle_soc_internal_errors(struct xe_device *xe, struct xe_ras_error_a
 {
 	struct xe_ras_soc_error *info = (void *)arr->details;
 	struct xe_ras_soc_error_source *source = &info->source;
-	struct xe_ras_error_class *counter = &arr->counter;
+	u32 raw_source;
+
+	BUILD_BUG_ON(sizeof(raw_source) != sizeof(*source));
 
 	if (source->csc) {
 		struct xe_ras_csc_error *csc_error = (void *)info->details;
@@ -585,9 +633,8 @@ static u8 handle_soc_internal_errors(struct xe_device *xe, struct xe_ras_error_a
 		 * is required.
 		 */
 		if (csc_error->hec_fw_error) {
-			xe_err(xe, "[RAS]: CSC %s detected: 0x%x\n",
-			       sev_to_str(counter->common.severity),
-			       csc_error->hec_fw_error);
+			xe_log_comp_fatal(xe, SOC_INTERNAL, &arr->counter, sizeof(arr->counter),
+					  "CSC error detected: 0x%08x\n", csc_error->hec_fw_error);
 			xe_survivability_mode_runtime_enable(xe);
 			return XE_RAS_RECOVERY_ACTION_DISCONNECT;
 		}
@@ -595,21 +642,26 @@ static u8 handle_soc_internal_errors(struct xe_device *xe, struct xe_ras_error_a
 		struct xe_ras_ieh_error *ieh_error = (void *)info->details;
 
 		if (ieh_error->global_error_status & XE_RAS_SOC_IEH_PUNIT) {
-			xe_err(xe, "[RAS]: PUNIT %s detected: 0x%x\n",
-			       sev_to_str(counter->common.severity),
-			       ieh_error->global_error_status);
+			xe_log_comp_fatal(xe, SOC_INTERNAL, &arr->counter, sizeof(arr->counter),
+					  "PUNIT error detected: 0x%08x\n",
+					  ieh_error->global_error_status);
 			punit_error_handler(xe);
 			return XE_RAS_RECOVERY_ACTION_DISCONNECT;
 		}
 	}
 
 	/* For other SoC internal errors, request a reset as recovery mechanism */
+	memcpy(&raw_source, source, sizeof(raw_source));
+	xe_log_comp(xe, ras_sev_to_cper_sev(arr->counter.common.severity), SOC_INTERNAL,
+		    &arr->counter, sizeof(arr->counter),
+		    "Unknown error detected: 0x%08x\n", raw_source);
 	return XE_RAS_RECOVERY_ACTION_RESET;
 }
 
 static u8 handle_device_memory_errors(struct xe_device *xe, struct xe_ras_error_array *arr)
 {
 	struct xe_ras_memory_error *info = (void *)arr->details;
+	u8 cper_sev = ras_sev_to_cper_sev(arr->counter.common.severity);
 	int ret;
 
 	/*
@@ -621,17 +673,25 @@ static u8 handle_device_memory_errors(struct xe_device *xe, struct xe_ras_error_
 	 */
 	switch (info->category) {
 	case XE_RAS_MEMORY_POISON:
-		xe_info(xe, "[RAS]: Poison error detected\n");
+		xe_log_comp_info(xe, DEVICE_MEMORY, &arr->counter, sizeof(arr->counter),
+				 "Poison error detected\n");
 		break;
 	case XE_RAS_MEMORY_DATA_PARITY:
-		xe_info(xe, "[RAS]: Data parity error detected\n");
+		xe_log_comp_info(xe, DEVICE_MEMORY, &arr->counter, sizeof(arr->counter),
+				 "Data parity error detected\n");
 		break;
 	case XE_RAS_MEMORY_DB_ECC:
 		ret = handle_page_offline(xe, info->sw_address, true);
+		xe_log_comp(xe, ret ? cper_sev : CPER_SEV_INFORMATIONAL,
+			    DEVICE_MEMORY, &arr->counter, sizeof(arr->counter),
+			    "Double-bit ECC error detected at sw address 0x%llx\n",
+			    info->sw_address);
 		if (ret)
 			return XE_RAS_RECOVERY_ACTION_RESET;
 		break;
 	default:
+		xe_log_comp(xe, cper_sev, DEVICE_MEMORY, &arr->counter, sizeof(arr->counter),
+			    "Unknown error detected\n");
 		return XE_RAS_RECOVERY_ACTION_RESET;
 	}
 
@@ -664,8 +724,11 @@ void xe_ras_counter_threshold_crossed(struct xe_device *xe,
 		if (!ras_counter_is_valid(xe, &errors[id]))
 			continue;
 
-		xe_warn(xe, "[RAS]: %s %s detected\n",
-			comp_to_str(component), sev_to_str(severity));
+		xe_log_from(xe, ras_sev_to_cper_sev(severity),
+			    ras_comp_to_hw_sigid(component),
+			    ras_comp_to_log_comp(component),
+			    &errors[id], sizeof(errors[id]),
+			    "error detected\n");
 
 		/* Send event once per component */
 		if (sent & BIT(component))
@@ -676,9 +739,37 @@ void xe_ras_counter_threshold_crossed(struct xe_device *xe,
 	}
 }
 
-static int get_counter(struct xe_device *xe, struct xe_ras_error_class *counter, u32 *value)
+static int get_counter(struct xe_device *xe, struct xe_ras_error_class *counter,
+		       u32 *value, bool emit_cper)
 {
 	struct xe_ras_get_counter_response response = {0};
+	int ret;
+
+	ret = xe_ras_get_counter_response(xe, counter, &response);
+	if (ret)
+		return ret;
+
+	*value = response.value;
+	if (emit_cper)
+		xe_cper_emit_counter(xe, ras_sev_to_cper_sev(counter->common.severity),
+				     ras_comp_to_hw_sigid(counter->common.component),
+				     counter, &response);
+	return 0;
+}
+
+/**
+ * xe_ras_get_counter_response() - Get error counter record
+ * @xe: Xe device instance
+ * @counter: RAS error class
+ * @response: Counter record retrieved
+ *
+ * Retrieve the counter record of a specific error class from firmware.
+ *
+ * Return: 0 on success, negative error code on failure.
+ */
+int xe_ras_get_counter_response(struct xe_device *xe, const struct xe_ras_error_class *counter,
+				struct xe_ras_get_counter_response *response)
+{
 	struct xe_ras_get_counter_request request = {0};
 	struct xe_sysctrl_mailbox_command command = {0};
 	struct xe_ras_error_common *common;
@@ -688,7 +779,7 @@ static int get_counter(struct xe_device *xe, struct xe_ras_error_class *counter,
 	request.counter = *counter;
 
 	xe_sysctrl_create_command(&command, XE_SYSCTRL_GROUP_GFSP, XE_SYSCTRL_CMD_GET_COUNTER,
-				  &request, sizeof(request), &response, sizeof(response));
+				  &request, sizeof(request), response, sizeof(*response));
 
 	ret = xe_sysctrl_send_command(&xe->sc, &command, &rlen);
 	if (ret) {
@@ -696,20 +787,19 @@ static int get_counter(struct xe_device *xe, struct xe_ras_error_class *counter,
 		return ret;
 	}
 
-	if (rlen != sizeof(response)) {
+	if (rlen != sizeof(*response)) {
 		xe_err(xe, "sysctrl: unexpected get counter response length %zu (expected %zu)\n",
-		       rlen, sizeof(response));
+		       rlen, sizeof(*response));
 		return -EIO;
 	}
 
-	if (!ras_counter_is_valid(xe, &response.counter))
+	if (!ras_counter_is_valid(xe, &response->counter))
 		return -EBADMSG;
 
-	common = &response.counter.common;
-	*value = response.value;
+	common = &response->counter.common;
 
-	xe_dbg(xe, "[RAS]: get counter %u for %s %s\n", *value, comp_to_str(common->component),
-	       sev_to_str(common->severity));
+	xe_dbg(xe, "[RAS]: get counter %u for %s %s\n", response->value,
+	       comp_to_str(common->component), sev_to_str(common->severity));
 
 	return 0;
 }
@@ -791,7 +881,7 @@ enum xe_ras_recovery_action xe_ras_process_errors(struct xe_device *xe)
 
 			switch (component) {
 			case XE_RAS_COMP_CORE_COMPUTE:
-				action = handle_core_compute_errors(arr);
+				action = handle_core_compute_errors(xe, arr);
 				break;
 			case XE_RAS_COMP_SOC_INTERNAL:
 				action = handle_soc_internal_errors(xe, arr);
@@ -844,7 +934,7 @@ int xe_ras_get_counter(struct xe_device *xe, u8 severity, u8 component, u32 *val
 	counter.common.component = drm_to_xe_ras_component(component);
 
 	guard(xe_pm_runtime)(xe);
-	return get_counter(xe, &counter, value);
+	return get_counter(xe, &counter, value, READ_ONCE(xe->cper.on_query));
 }
 
 /**
@@ -1208,6 +1298,10 @@ int xe_ras_init(struct xe_device *xe)
 
 	xa_init(&state->offlined_pages);
 
+	ret = devm_add_action_or_reset(xe->drm.dev, ras_fini, xe);
+	if (ret)
+		return ret;
+
 	/* Fetch the offline list before queue to avoid duplication */
 	get_offline_list(xe);
 	get_offline_queue(xe);
@@ -1221,7 +1315,7 @@ int xe_ras_init(struct xe_device *xe)
 
 	ret = devm_device_add_group(xe->drm.dev, &gpu_health_group);
 	if (ret)
-		xe_err(xe, "Failed to create GPU health sysfs, err=%d\n", ret);
+		return ret;
 
-	return devm_add_action_or_reset(xe->drm.dev, ras_fini, xe);
+	return xe_cper_sysfs_init(xe);
 }
diff --git a/drivers/gpu/drm/xe/xe_ras.h b/drivers/gpu/drm/xe/xe_ras.h
index 1b358c7d040f..c44fa172011f 100644
--- a/drivers/gpu/drm/xe/xe_ras.h
+++ b/drivers/gpu/drm/xe/xe_ras.h
@@ -23,5 +23,7 @@ int xe_ras_init(struct xe_device *xe);
 enum xe_ras_recovery_action xe_ras_process_errors(struct xe_device *xe);
 bool xe_ras_get_disable_vram_page_offline(struct xe_device *xe);
 u32 xe_ras_get_max_pages(struct xe_device *xe);
+int xe_ras_get_counter_response(struct xe_device *xe, const struct xe_ras_error_class *counter,
+				struct xe_ras_get_counter_response *response);
 
 #endif
diff --git a/drivers/gpu/drm/xe/xe_trace_cper.c b/drivers/gpu/drm/xe/xe_trace_cper.c
new file mode 100644
index 000000000000..caea8783ab7c
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_trace_cper.c
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#ifndef __CHECKER__
+#define CREATE_TRACE_POINTS
+#include "xe_trace_cper.h"
+#endif
diff --git a/drivers/gpu/drm/xe/xe_trace_cper.h b/drivers/gpu/drm/xe/xe_trace_cper.h
new file mode 100644
index 000000000000..af952a6e168c
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_trace_cper.h
@@ -0,0 +1,65 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#undef TRACE_SYSTEM
+#define TRACE_SYSTEM xe
+
+#if !defined(_XE_TRACE_CPER_H_) || defined(TRACE_HEADER_MULTI_READ)
+#define _XE_TRACE_CPER_H_
+
+#include <linux/tracepoint.h>
+#include <linux/types.h>
+
+#include "xe_cper_types.h"
+#include "xe_device_types.h"
+
+#define __dev_name_xe(xe)	dev_name((xe)->drm.dev)
+
+TRACE_EVENT(xe_error_cper,
+	    TP_PROTO(struct xe_device *xe,
+		     const guid_t *platform_id, const guid_t *fru_id,
+		     const u8 severity,
+		     const struct xe_cper_intel_hdr *ihdr,
+		     u32 cper_len, const u8 *cper),
+	    TP_ARGS(xe, platform_id, fru_id, severity, ihdr, cper_len, cper),
+
+	    TP_STRUCT__entry(
+		__string(dev, __dev_name_xe(xe))
+		__array(char, platform_id, UUID_SIZE)
+		__array(char, fru_id, UUID_SIZE)
+		__field(u8, sev)
+		__array(u8, ihdr_raw, sizeof(struct xe_cper_intel_hdr))
+		__field(u32, cper_len)
+		__dynamic_array(u8, cper, cper_len)
+	    ),
+
+	    TP_fast_assign(
+		__assign_str(dev);
+		__entry->sev = severity;
+		memcpy(__entry->platform_id, platform_id, UUID_SIZE);
+		memcpy(__entry->fru_id, fru_id, UUID_SIZE);
+		memcpy(__entry->ihdr_raw, ihdr, sizeof(struct xe_cper_intel_hdr));
+		__entry->cper_len = cper_len;
+		memcpy(__get_dynamic_array(cper), cper, cper_len);
+	    ),
+
+	    TP_printk("dev=%s severity=%d platform_id=%pUl fru_id=%pUl intel_hdr_raw=%s cper_len=%u cper_raw=%s",
+		      __get_str(dev), __entry->sev,
+		      __entry->platform_id, __entry->fru_id,
+		      __print_hex(__entry->ihdr_raw,
+				  sizeof(struct xe_cper_intel_hdr)),
+		      __entry->cper_len,
+		      __print_hex(__get_dynamic_array(cper),
+				  __entry->cper_len))
+);
+
+#endif
+
+/* This part must be outside protection */
+#undef TRACE_INCLUDE_PATH
+#undef TRACE_INCLUDE_FILE
+#define TRACE_INCLUDE_PATH ../../drivers/gpu/drm/xe
+#define TRACE_INCLUDE_FILE xe_trace_cper
+#include <trace/define_trace.h>
-- 
2.48.1


^ permalink raw reply related	[flat|nested] 11+ messages in thread

* [PATCH v2 2/6] drm/xe/cper: Add software error classification definitions
  2026-10-29 13:26 [PATCH v2 0/6] drm/xe/cper: Software (driver-detected) CPER error reporting Mallesh Koujalagi
  2026-10-29 13:26 ` [PATCH v2 1/6] Add CPER logging support for CRI-Do not review Mallesh Koujalagi
@ 2026-10-29 13:26 ` Mallesh Koujalagi
  2026-10-29 13:26 ` [PATCH v2 3/6] drm/xe/cper: Decouple RAS error class initialization Mallesh Koujalagi
                   ` (6 subsequent siblings)
  8 siblings, 0 replies; 11+ messages in thread
From: Mallesh Koujalagi @ 2026-10-29 13:26 UTC (permalink / raw)
  To: intel-xe, rodrigo.vivi, matthew.brost
  Cc: anshuman.gupta, badal.nilawar, vinay.belgaumkar, riana.tauro,
	karthik.poosa, sk.anirban, raag.jadav, michal.wajdeczko,
	aravind.iddamsetty, jani.nikula, Mallesh Koujalagi

Introduce driver-detected error classification fields and a
notification GUID for software CPER records. Store the hardware
and software error classifications in a shared union within
struct xe_cper_intel_hdr.

Signed-off-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
---
v2:
- Move union inside xe_cper_intel_hdr structure. (Badal)
---
 drivers/gpu/drm/xe/xe_cper_types.h | 35 ++++++++++++++++++++++++++++--
 1 file changed, 33 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_cper_types.h b/drivers/gpu/drm/xe/xe_cper_types.h
index 68e30df0440e..d1c38a96e05d 100644
--- a/drivers/gpu/drm/xe/xe_cper_types.h
+++ b/drivers/gpu/drm/xe/xe_cper_types.h
@@ -40,11 +40,38 @@
 	GUID_INIT(0x4ae12aef, 0x8745, 0x5fc7, \
 		  0xb9, 0x96, 0x71, 0xee, 0xbb, 0x51, 0xf2, 0x23)
 
+#define INTEL_CPER_NOTIFY_DRV_ERROR \
+	GUID_INIT(0xcef7e934, 0x51e7, 0x535f, \
+		  0xa6, 0x78, 0x5a, 0x4c, 0xcc, 0xb6, 0x96, 0x09)
+
 /* Section Types */
 #define INTEL_CPER_SECTION_ACCEL_GENERIC \
 	GUID_INIT(0xea9d8f84, 0x4258, 0x5227, \
 		  0x80, 0x28, 0xb9, 0xb1, 0x3e, 0x6d, 0x58, 0xb0)
 
+/**
+ * struct xe_cper_driver_error_class - Intel GPU CPER driver-detected error classification
+ */
+struct xe_cper_driver_error_class {
+	/** @error_type: CPER severity: CPER_SEV_* */
+	u8  error_type;
+	/** @reserved0: Reserved, must be zero */
+	u8  reserved0;
+	/** @error_component: Driver component id: CLASS[7:0].TYPE[15:8] */
+	u16 error_component;
+	/** @tile: Driver location id: TYPE[7:0].ID[15:8] ('tile' and 'GT' field region) */
+	u16 tile;
+	/** @reserved1: Reserved, must be zero */
+	u16 reserved1;
+	/** @cause: errno of the failing operation, or 0 if none */
+	u32 cause;
+};
+
+/* Same size as the counter-sourced error_class */
+#define XE_CPER_ERROR_CLASS_SIZE	12
+
+static_assert(sizeof(struct xe_cper_driver_error_class) == XE_CPER_ERROR_CLASS_SIZE);
+
 /**
  * struct xe_cper_intel_hdr - Intel-specific CPER header
  *
@@ -52,8 +79,12 @@
  * All multi-byte fields are little-endian.
  */
 struct xe_cper_intel_hdr {
-	/** @counter: Error class (severity, component, location, cause) */
-	struct xe_ras_error_class counter;
+	union {
+		/** @counter: Error class (severity, component, location, cause) */
+		struct xe_ras_error_class counter;
+		/** @driver: Driver-detected (software) error classification */
+		struct xe_cper_driver_error_class driver;
+	};
 	/** @first_timestamp: First occurrence of this error class, in ticks */
 	u64 first_timestamp;
 	/** @sig_id: Aggregated error class SIG ID; set to U32_MAX if unknown */
-- 
2.48.1


^ permalink raw reply related	[flat|nested] 11+ messages in thread

* [PATCH v2 3/6] drm/xe/cper: Decouple RAS error class initialization
  2026-10-29 13:26 [PATCH v2 0/6] drm/xe/cper: Software (driver-detected) CPER error reporting Mallesh Koujalagi
  2026-10-29 13:26 ` [PATCH v2 1/6] Add CPER logging support for CRI-Do not review Mallesh Koujalagi
  2026-10-29 13:26 ` [PATCH v2 2/6] drm/xe/cper: Add software error classification definitions Mallesh Koujalagi
@ 2026-10-29 13:26 ` Mallesh Koujalagi
  2026-10-29 13:26 ` [PATCH v2 4/6] drm/xe/cper: Support software CPER records Mallesh Koujalagi
                   ` (5 subsequent siblings)
  8 siblings, 0 replies; 11+ messages in thread
From: Mallesh Koujalagi @ 2026-10-29 13:26 UTC (permalink / raw)
  To: intel-xe, rodrigo.vivi, matthew.brost
  Cc: anshuman.gupta, badal.nilawar, vinay.belgaumkar, riana.tauro,
	karthik.poosa, sk.anirban, raag.jadav, michal.wajdeczko,
	aravind.iddamsetty, jani.nikula, Mallesh Koujalagi

Move RAS error class initialization from cper_init_intel_hdr()
to xe_cper_emit_counter() so the common header initialization
can be used for both hardware and software CPER records.

Signed-off-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
---
 drivers/gpu/drm/xe/xe_cper.c | 9 ++++-----
 1 file changed, 4 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_cper.c b/drivers/gpu/drm/xe/xe_cper.c
index bb90030bcd2d..e802f534eb45 100644
--- a/drivers/gpu/drm/xe/xe_cper.c
+++ b/drivers/gpu/drm/xe/xe_cper.c
@@ -87,11 +87,10 @@ static u64 cper_timestamp_now(void)
 	return ts;
 }
 
-static void cper_init_intel_hdr(struct xe_device *xe, const struct xe_ras_error_class *counter,
-				u64 first_timestamp, u32 sig_id, u32 error_count,
+static void cper_init_intel_hdr(struct xe_device *xe, u64 first_timestamp,
+				u32 sig_id, u32 error_count,
 				struct xe_cper_intel_hdr *ihdr)
 {
-	ihdr->counter = *counter;
 	ihdr->validation_bits |= XE_CPER_VALID_LOCATION;
 	ihdr->sig_id = U32_MAX;
 
@@ -218,8 +217,8 @@ void xe_cper_emit_counter(struct xe_device *xe, int cper_sev, enum xe_sigid sigi
 
 	xe_assert(xe, is_hw_sigid(sigid));
 
-	cper_init_intel_hdr(xe, counter, response->timestamp,
-			    sigid, response->value, &ihdr);
+	ihdr.counter = *counter;
+	cper_init_intel_hdr(xe, response->timestamp, sigid, response->value, &ihdr);
 	cper_record_emit(xe, cper_sev, &INTEL_CPER_NOTIFY_GPU_ERROR, &ihdr, NULL, 0);
 }
 
-- 
2.48.1


^ permalink raw reply related	[flat|nested] 11+ messages in thread

* [PATCH v2 4/6] drm/xe/cper: Support software CPER records
  2026-10-29 13:26 [PATCH v2 0/6] drm/xe/cper: Software (driver-detected) CPER error reporting Mallesh Koujalagi
                   ` (2 preceding siblings ...)
  2026-10-29 13:26 ` [PATCH v2 3/6] drm/xe/cper: Decouple RAS error class initialization Mallesh Koujalagi
@ 2026-10-29 13:26 ` Mallesh Koujalagi
  2026-10-29 13:37   ` sashiko-bot
  2026-10-29 13:26 ` [PATCH v2 5/6] drm/xe/log: Add software CPER information to KUnit output Mallesh Koujalagi
                   ` (4 subsequent siblings)
  8 siblings, 1 reply; 11+ messages in thread
From: Mallesh Koujalagi @ 2026-10-29 13:26 UTC (permalink / raw)
  To: intel-xe, rodrigo.vivi, matthew.brost
  Cc: anshuman.gupta, badal.nilawar, vinay.belgaumkar, riana.tauro,
	karthik.poosa, sk.anirban, raag.jadav, michal.wajdeczko,
	aravind.iddamsetty, jani.nikula, Mallesh Koujalagi

Handle software SIGIDs in xe_cper_emit() by emitting
driver-notification CPER records. Include driver classification
details and the associated formatted log message in the record.

Signed-off-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
---
 drivers/gpu/drm/xe/xe_cper.c | 41 +++++++++++++++++++++++++++++++++++-
 1 file changed, 40 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/xe_cper.c b/drivers/gpu/drm/xe/xe_cper.c
index e802f534eb45..ec61605d0a31 100644
--- a/drivers/gpu/drm/xe/xe_cper.c
+++ b/drivers/gpu/drm/xe/xe_cper.c
@@ -14,6 +14,8 @@
 #include <linux/time.h>
 #include <linux/timekeeping.h>
 
+#include "abi/xe_log_abi.h"
+
 #include "xe_cper.h"
 #include "xe_cper_types.h"
 #include "xe_device.h"
@@ -32,6 +34,11 @@ static bool is_hw_sigid(enum xe_sigid sigid)
 	return in_range(sigid, INTEL_SIGID_GPU_XE_HARDWARE_START, INTEL_SIGID_BATCH);
 }
 
+static bool is_sw_sigid(enum xe_sigid sigid)
+{
+	return in_range(sigid, INTEL_SIGID_GPU_XE_SOFTWARE_START, INTEL_SIGID_BATCH);
+}
+
 /* CPER platform_id GUIDs (RFC 9562 UUIDv5) for each PCI device ID. */
 static const struct xe_device_guid_entry xe_device_guids[] = {
 	{ 0x674C, GUID_INIT(0x9046afe5, 0x9041, 0x5124,
@@ -239,6 +246,37 @@ static void cper_emit_hw_err(struct xe_device *xe, int cper_sev, enum xe_sigid s
 	xe_cper_emit_counter(xe, cper_sev, sigid, counter, &response);
 }
 
+#define XE_CPER_SW_MSG_MAX	256
+
+static size_t cper_format_sw_msg(struct va_format *vaf, char *buf, size_t size)
+{
+	return scnprintf(buf, size, "%pV", vaf) + 1;
+}
+
+static void cper_emit_sw_err(struct xe_device *xe, int cper_sev, enum xe_sigid sigid,
+			     u32 component, u32 location, const void *data,
+			     struct va_format *vaf)
+{
+	struct xe_cper_intel_hdr ihdr = {};
+	struct xe_cper_driver_error_class *driver = &ihdr.driver;
+	u64 timestamp = ktime_get_boottime_ns();
+	char msg[XE_CPER_SW_MSG_MAX];
+	size_t msg_len;
+
+	might_sleep();
+
+	driver->error_type = cper_sev;
+	driver->error_component = component;
+	driver->tile = location;
+	if (IS_ERR(data))
+		driver->cause = -PTR_ERR(data);
+
+	msg_len = cper_format_sw_msg(vaf, msg, sizeof(msg));
+
+	cper_init_intel_hdr(xe, timestamp, sigid, 1, &ihdr);
+	cper_record_emit(xe, cper_sev, &INTEL_CPER_NOTIFY_DRV_ERROR, &ihdr, msg, msg_len);
+}
+
 /**
  * xe_cper_emit() - Emit a CPER record for a SIGID log entry
  * @xe: The &xe_device
@@ -272,7 +310,8 @@ void xe_cper_emit(struct xe_device *xe, int cper_sev, enum xe_sigid sigid,
 		return;
 	}
 
-	/* TODO software CPER */
+	if (is_sw_sigid(sigid))
+		cper_emit_sw_err(xe, cper_sev, sigid, component, location, data, vaf);
 }
 
 static ssize_t cper_on_query_show(struct device *dev, struct device_attribute *attr, char *buf)
-- 
2.48.1


^ permalink raw reply related	[flat|nested] 11+ messages in thread

* [PATCH v2 5/6] drm/xe/log: Add software CPER information to KUnit output
  2026-10-29 13:26 [PATCH v2 0/6] drm/xe/cper: Software (driver-detected) CPER error reporting Mallesh Koujalagi
                   ` (3 preceding siblings ...)
  2026-10-29 13:26 ` [PATCH v2 4/6] drm/xe/cper: Support software CPER records Mallesh Koujalagi
@ 2026-10-29 13:26 ` Mallesh Koujalagi
  2026-10-29 13:26 ` [PATCH v2 6/6] drm/xe/log: Test software CPER emission parameters Mallesh Koujalagi
                   ` (3 subsequent siblings)
  8 siblings, 0 replies; 11+ messages in thread
From: Mallesh Koujalagi @ 2026-10-29 13:26 UTC (permalink / raw)
  To: intel-xe, rodrigo.vivi, matthew.brost
  Cc: anshuman.gupta, badal.nilawar, vinay.belgaumkar, riana.tauro,
	karthik.poosa, sk.anirban, raag.jadav, michal.wajdeczko,
	aravind.iddamsetty, jani.nikula, Mallesh Koujalagi

Display driver classification details for software CPER records
in the fake CPER emitter used by KUnit tests.

Assisted-by: LLM
Signed-off-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
---
 drivers/gpu/drm/xe/tests/xe_log_kunit.c | 21 ++++++++++++++++++++-
 1 file changed, 20 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/tests/xe_log_kunit.c b/drivers/gpu/drm/xe/tests/xe_log_kunit.c
index 56c36c8a08e1..08828ecc9098 100644
--- a/drivers/gpu/drm/xe/tests/xe_log_kunit.c
+++ b/drivers/gpu/drm/xe/tests/xe_log_kunit.c
@@ -6,11 +6,14 @@
 #include <kunit/static_stub.h>
 #include <kunit/test.h>
 #include <kunit/test-bug.h>
+#include <linux/minmax.h>
 
 #include "tests/xe_kunit_helpers.h"
 #include "tests/xe_pci_test.h"
+#include "xe_cper.h"
 #include "xe_device.h"
 #include "xe_log.h"
+#include "xe_ras_types.h"
 
 static void nop_dmesg_vprintk(struct pci_dev *pdev, int cper_sev, struct va_format *vaf)
 {
@@ -43,6 +46,19 @@ static const char *location_type(u32 location)
 	       location ? "?" : "";
 }
 
+static bool is_sw_cper(enum xe_sigid sigid)
+{
+	return in_range(sigid, INTEL_SIGID_GPU_XE_SOFTWARE_START, INTEL_SIGID_BATCH);
+}
+
+static void fake_emit_sw_cper(int cper_sev, u32 component, u32 location, const void *data)
+{
+	/* mirrors xe_cper_driver_error_class: full 16-bit component/tile, unconditional */
+	pr_info("SW CPER CLASS=severity:%u component:%u tile:%u cause:%u\n",
+		cper_sev, (u16)component, (u16)location,
+		IS_ERR(data) ? (u32)-PTR_ERR(data) : 0);
+}
+
 static void fake_emit_cper(struct pci_dev *pdev, int cper_sev,
 			   enum xe_sigid sigid, u32 component, u32 location,
 			   const void *data, size_t len, struct va_format *vaf)
@@ -51,7 +67,8 @@ static void fake_emit_cper(struct pci_dev *pdev, int cper_sev,
 	int n;
 
 	pr_info("\n");
-	pr_info("CPER SEV=%u SIGID=%u\n", cper_sev, sigid);
+	pr_info("CPER SEV=%u SIGID=%u \t# %s\n", cper_sev, sigid,
+		is_sw_cper(sigid) ? "software" : "");
 	pr_info("CPER DEVICE=%s\n", dev_name(&pdev->dev));
 	if (location)
 		pr_info("CPER LOCATION=%#x \t# %s.%u\n",
@@ -68,6 +85,8 @@ static void fake_emit_cper(struct pci_dev *pdev, int cper_sev,
 
 	n = vscnprintf(msg, sizeof(msg), vaf->fmt, *vaf->va);
 	print_hex_dump(KERN_INFO, "CPER MSG=", DUMP_PREFIX_OFFSET, 16, 1, msg, n, true);
+	if (is_sw_cper(sigid))
+		fake_emit_sw_cper(cper_sev, component, location, data);
 	pr_info("CPER END\n");
 }
 
-- 
2.48.1


^ permalink raw reply related	[flat|nested] 11+ messages in thread

* [PATCH v2 6/6] drm/xe/log: Test software CPER emission parameters
  2026-10-29 13:26 [PATCH v2 0/6] drm/xe/cper: Software (driver-detected) CPER error reporting Mallesh Koujalagi
                   ` (4 preceding siblings ...)
  2026-10-29 13:26 ` [PATCH v2 5/6] drm/xe/log: Add software CPER information to KUnit output Mallesh Koujalagi
@ 2026-10-29 13:26 ` Mallesh Koujalagi
  2026-10-29 13:35 ` ✗ CI.checkpatch: warning for drm/xe/cper: Software (driver-detected) CPER error reporting (rev2) Patchwork
                   ` (2 subsequent siblings)
  8 siblings, 0 replies; 11+ messages in thread
From: Mallesh Koujalagi @ 2026-10-29 13:26 UTC (permalink / raw)
  To: intel-xe, rodrigo.vivi, matthew.brost
  Cc: anshuman.gupta, badal.nilawar, vinay.belgaumkar, riana.tauro,
	karthik.poosa, sk.anirban, raag.jadav, michal.wajdeczko,
	aravind.iddamsetty, jani.nikula, Mallesh Koujalagi

Add KUnit tests for software SIGIDs to verify the correct
arguments are forwarded to the CPER emission path.

Assisted-by: LLM
Signed-off-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
---
 drivers/gpu/drm/xe/tests/xe_log_kunit.c | 73 +++++++++++++++++++++++++
 1 file changed, 73 insertions(+)

diff --git a/drivers/gpu/drm/xe/tests/xe_log_kunit.c b/drivers/gpu/drm/xe/tests/xe_log_kunit.c
index 08828ecc9098..e53100df5b32 100644
--- a/drivers/gpu/drm/xe/tests/xe_log_kunit.c
+++ b/drivers/gpu/drm/xe/tests/xe_log_kunit.c
@@ -149,6 +149,78 @@ static void demo_cper(struct kunit *test)
 	demo(test->priv);
 }
 
+/*
+ * Software CPER
+ */
+static struct {
+	unsigned int count;
+	int cper_sev;
+	enum xe_sigid sigid;
+	u32 component;
+	u32 location;
+	const void *data;
+	size_t len;
+} sw_cper_capture;
+
+static void capture_emit_cper(struct pci_dev *pdev, int cper_sev,
+			      enum xe_sigid sigid, u32 component, u32 location,
+			      const void *data, size_t len, struct va_format *vaf)
+{
+	sw_cper_capture.count++;
+	sw_cper_capture.cper_sev = cper_sev;
+	sw_cper_capture.sigid = sigid;
+	sw_cper_capture.component = component;
+	sw_cper_capture.location = location;
+	sw_cper_capture.data = data;
+	sw_cper_capture.len = len;
+}
+
+static const struct sw_cper_param {
+	int cper_sev;
+	enum xe_sigid sigid;
+	u32 component;
+	int err;		/* reported as ERR_PTR when non-zero */
+	size_t len;		/* bytes of @blob passed as data */
+	const char *name;
+} sw_cper_params[] = {
+	{ CPER_SEV_FATAL, XE_SIGID_PROBE, XE_LOG_COMPONENT_PROBE,
+	  -ENODEV, 0, "sw-fatal-errno" },
+	{ CPER_SEV_RECOVERABLE, XE_SIGID_GT_TDR, XE_LOG_COMPONENT_GUCSUBMIT,
+	  -ETIMEDOUT, 0, "sw-recoverable-errno" },
+	{ CPER_SEV_CORRECTED, XE_SIGID_MEM_FAULT, XE_LOG_COMPONENT_PAGEFAULT,
+	  0, 0, "sw-corrected" },
+	{ CPER_SEV_INFORMATIONAL, XE_SIGID_SURVIVABILITY, XE_LOG_COMPONENT_SURVIVABILITY,
+	  0, 0, "sw-informational" },
+	{ CPER_SEV_FATAL, XE_SIGID_SW, XE_LOG_COMPONENT_NONE,
+	  0, sizeof(struct xe_ras_error_class), "sw-with-error-class" },
+};
+
+KUNIT_ARRAY_PARAM_DESC(sw_cper, sw_cper_params, name);
+
+static void test_sw_cper(struct kunit *test)
+{
+	const struct sw_cper_param *param = test->param_value;
+	struct xe_device *xe = test->priv;
+	struct pci_dev *pdev = xe_any_to_pdev(xe);
+	const void *data = param->err ? ERR_PTR(param->err) : param->len ? blob : NULL;
+
+	memset(&sw_cper_capture, 0, sizeof(sw_cper_capture));
+	kunit_activate_static_stub(test, log_emit_cper, capture_emit_cper);
+	kunit_activate_static_stub(test, log_dmesg_vprintk, nop_dmesg_vprintk);
+
+	xe_log_emit(pdev, param->cper_sev, param->sigid, param->component,
+		    XE_LOG_LOCATION_NONE, data, param->len, "testing %s\n", param->name);
+
+	KUNIT_ASSERT_EQ(test, sw_cper_capture.count, 1);
+	KUNIT_EXPECT_EQ(test, sw_cper_capture.cper_sev, param->cper_sev);
+	KUNIT_EXPECT_EQ(test, (u32)sw_cper_capture.sigid, (u32)param->sigid);
+	KUNIT_EXPECT_EQ(test, sw_cper_capture.component, param->component);
+	KUNIT_EXPECT_PTR_EQ(test, sw_cper_capture.data, data);
+	KUNIT_EXPECT_EQ(test, sw_cper_capture.len, param->len);
+
+	KUNIT_EXPECT_TRUE(test, is_sw_cper(sw_cper_capture.sigid));
+}
+
 static const char *test_fatal(struct xe_device *xe)
 {
 	struct pci_dev *pdev = to_pdev_safe(xe);
@@ -559,6 +631,7 @@ static struct kunit_case xe_log_test_cases[] = {
 	KUNIT_CASE(demo_cper),
 	KUNIT_CASE(demo_dmesg),
 	KUNIT_CASE_PARAM(test_dmesg, log_gen_params),
+	KUNIT_CASE_PARAM(test_sw_cper, sw_cper_gen_params),
 	KUNIT_CASE_PARAM(test_invalid, invalid_param_gen_params),
 	{}
 };
-- 
2.48.1


^ permalink raw reply related	[flat|nested] 11+ messages in thread

* ✗ CI.checkpatch: warning for drm/xe/cper: Software (driver-detected) CPER error reporting (rev2)
  2026-10-29 13:26 [PATCH v2 0/6] drm/xe/cper: Software (driver-detected) CPER error reporting Mallesh Koujalagi
                   ` (5 preceding siblings ...)
  2026-10-29 13:26 ` [PATCH v2 6/6] drm/xe/log: Test software CPER emission parameters Mallesh Koujalagi
@ 2026-10-29 13:35 ` Patchwork
  2026-10-29 13:37 ` ✓ CI.KUnit: success " Patchwork
  2026-10-29 14:12 ` ✗ Xe.CI.BAT: failure " Patchwork
  8 siblings, 0 replies; 11+ messages in thread
From: Patchwork @ 2026-10-29 13:35 UTC (permalink / raw)
  To: Mallesh Koujalagi; +Cc: intel-xe

== Series Details ==

Series: drm/xe/cper: Software (driver-detected) CPER error reporting (rev2)
URL   : https://patchwork.freedesktop.org/series/176576/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
3009867cd31863246e4afc138520a7a8bd37bb11
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 216e75d8b6ccc0c0bb2b1d6a7ef952d857952c8f
Author: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
Date:   Thu Oct 29 18:56:16 2026 +0530

    drm/xe/log: Test software CPER emission parameters
    
    Add KUnit tests for software SIGIDs to verify the correct
    arguments are forwarded to the CPER emission path.
    
    Assisted-by: LLM
    Signed-off-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
+ /mt/dim checkpatch e650cd4c5bd5d3b068ed7a1eb3c55cde4386b355 drm-intel
04d5ce2750cf Add CPER logging support for CRI-Do not review
-:14: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#14: 
new file mode 100644

-:966: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#966: FILE: drivers/gpu/drm/xe/xe_trace_cper.h:28:
+	    TP_STRUCT__entry(

-:976: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#976: FILE: drivers/gpu/drm/xe/xe_trace_cper.h:38:
+	    TP_fast_assign(

-:1001: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV)
#1001: FILE: drivers/gpu/drm/xe/xe_trace_cper.h:63:
+#define TRACE_INCLUDE_PATH ../../drivers/gpu/drm/xe
                              ^

-:1001: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV)
#1001: FILE: drivers/gpu/drm/xe/xe_trace_cper.h:63:
+#define TRACE_INCLUDE_PATH ../../drivers/gpu/drm/xe
                                 ^

-:1001: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV)
#1001: FILE: drivers/gpu/drm/xe/xe_trace_cper.h:63:
+#define TRACE_INCLUDE_PATH ../../drivers/gpu/drm/xe
                                         ^

-:1001: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV)
#1001: FILE: drivers/gpu/drm/xe/xe_trace_cper.h:63:
+#define TRACE_INCLUDE_PATH ../../drivers/gpu/drm/xe
                                             ^

-:1001: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV)
#1001: FILE: drivers/gpu/drm/xe/xe_trace_cper.h:63:
+#define TRACE_INCLUDE_PATH ../../drivers/gpu/drm/xe
                                                 ^

total: 0 errors, 1 warnings, 7 checks, 910 lines checked
a82df255acca drm/xe/cper: Add software error classification definitions
7dd2837326a7 drm/xe/cper: Decouple RAS error class initialization
cad24191ab8c drm/xe/cper: Support software CPER records
b923589d9d7a drm/xe/log: Add software CPER information to KUnit output
216e75d8b6cc drm/xe/log: Test software CPER emission parameters



^ permalink raw reply	[flat|nested] 11+ messages in thread

* ✓ CI.KUnit: success for drm/xe/cper: Software (driver-detected) CPER error reporting (rev2)
  2026-10-29 13:26 [PATCH v2 0/6] drm/xe/cper: Software (driver-detected) CPER error reporting Mallesh Koujalagi
                   ` (6 preceding siblings ...)
  2026-10-29 13:35 ` ✗ CI.checkpatch: warning for drm/xe/cper: Software (driver-detected) CPER error reporting (rev2) Patchwork
@ 2026-10-29 13:37 ` Patchwork
  2026-10-29 14:12 ` ✗ Xe.CI.BAT: failure " Patchwork
  8 siblings, 0 replies; 11+ messages in thread
From: Patchwork @ 2026-10-29 13:37 UTC (permalink / raw)
  To: Mallesh Koujalagi; +Cc: intel-xe

== Series Details ==

Series: drm/xe/cper: Software (driver-detected) CPER error reporting (rev2)
URL   : https://patchwork.freedesktop.org/series/176576/
State : success

== Summary ==

+ trap cleanup EXIT
+ kunitconfigs=('/kernel/drivers/gpu/tests/.kunitconfig' '/kernel/drivers/gpu/drm/xe/.kunitconfig' '/kernel/drivers/gpu/drm/tests/.kunitconfig' '/kernel/drivers/gpu/drm/ttm/tests/.kunitconfig' '/kernel/drivers/dma-buf/.kunitconfig')
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/tests/.kunitconfig
[13:35:12] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[13:35:17] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[13:35:37] Starting KUnit Kernel (1/1)...
[13:35:37] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[13:35:37] ================= gpu_buddy (14 subtests) ==================
[13:35:37] [PASSED] gpu_test_buddy_alloc_limit
[13:35:37] [PASSED] gpu_test_buddy_alloc_optimistic
[13:35:37] [PASSED] gpu_test_buddy_alloc_pessimistic
[13:35:37] [PASSED] gpu_test_buddy_alloc_pathological
[13:35:37] [PASSED] gpu_test_buddy_alloc_contiguous
[13:35:37] [PASSED] gpu_test_buddy_alloc_clear
[13:35:37] [PASSED] gpu_test_buddy_alloc_range
[13:35:37] [PASSED] gpu_test_buddy_alloc_range_bias
[13:35:38] [PASSED] gpu_test_buddy_fragmentation_performance
[13:35:39] [PASSED] gpu_test_buddy_dirty_tracker_performance
[13:35:39] [PASSED] gpu_test_buddy_alloc_exceeds_max_order
[13:35:39] [PASSED] gpu_test_buddy_offset_aligned_allocation
[13:35:39] [PASSED] gpu_test_buddy_subtree_offset_alignment_stress
[13:35:39] [PASSED] gpu_test_buddy_addr_to_block
[13:35:39] ==================== [PASSED] gpu_buddy ====================
[13:35:39] ============================================================
[13:35:39] Testing complete. Ran 14 tests: passed: 14
[13:35:39] Elapsed time: 26.502s total, 4.469s configuring, 20.115s building, 1.869s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/xe/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[13:35:39] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[13:35:41] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[13:36:20] Starting KUnit Kernel (1/1)...
[13:36:20] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[13:36:20] ================== guc_buf (11 subtests) ===================
[13:36:20] [PASSED] test_smallest
[13:36:20] [PASSED] test_largest
[13:36:20] [PASSED] test_granular
[13:36:20] [PASSED] test_unique
[13:36:20] [PASSED] test_overlap
[13:36:20] [PASSED] test_reusable
[13:36:20] [PASSED] test_too_big
[13:36:20] [PASSED] test_flush
[13:36:20] [PASSED] test_lookup
[13:36:20] [PASSED] test_data
[13:36:20] [PASSED] test_class
[13:36:20] ===================== [PASSED] guc_buf =====================
[13:36:20] =================== guc_dbm (7 subtests) ===================
[13:36:20] [PASSED] test_empty
[13:36:20] [PASSED] test_default
[13:36:20] ======================== test_size  ========================
[13:36:20] [PASSED] 4
[13:36:20] [PASSED] 8
[13:36:20] [PASSED] 32
[13:36:20] [PASSED] 256
[13:36:20] ==================== [PASSED] test_size ====================
[13:36:20] ======================= test_reuse  ========================
[13:36:20] [PASSED] 4
[13:36:20] [PASSED] 8
[13:36:20] [PASSED] 32
[13:36:20] [PASSED] 256
[13:36:20] =================== [PASSED] test_reuse ====================
[13:36:20] =================== test_range_overlap  ====================
[13:36:20] [PASSED] 4
[13:36:20] [PASSED] 8
[13:36:20] [PASSED] 32
[13:36:20] [PASSED] 256
[13:36:20] =============== [PASSED] test_range_overlap ================
[13:36:20] =================== test_range_compact  ====================
[13:36:20] [PASSED] 4
[13:36:20] [PASSED] 8
[13:36:20] [PASSED] 32
[13:36:20] [PASSED] 256
[13:36:20] =============== [PASSED] test_range_compact ================
[13:36:20] ==================== test_range_spare  =====================
[13:36:20] [PASSED] 4
[13:36:20] [PASSED] 8
[13:36:20] [PASSED] 32
[13:36:20] [PASSED] 256
[13:36:20] ================ [PASSED] test_range_spare =================
[13:36:20] ===================== [PASSED] guc_dbm =====================
[13:36:20] ================== guc_idm (22 subtests) ===================
[13:36:20] [PASSED] bad_init
[13:36:20] [PASSED] no_init
[13:36:20] [PASSED] init_fini
[13:36:20] [PASSED] check_init_small
[13:36:20] [PASSED] check_init_shared
[13:36:20] [PASSED] check_used
[13:36:20] [PASSED] check_quota
[13:36:20] [PASSED] check_all
[13:36:20] [PASSED] check_limits
[13:36:20] [PASSED] check_overlap
[13:36:20] [PASSED] check_overlap_alloc
[13:36:20] [PASSED] check_overlap_release
[13:36:20] [PASSED] check_overlap_partial_init
[13:36:20] [PASSED] check_overlap_partial_shared_range_blocking
[13:36:20] [PASSED] check_used_usable
[13:36:20] [PASSED] check_used_shareable
[13:36:20] [PASSED] check_used_mixed
[13:36:20] [PASSED] check_release_usable_range
[13:36:20] [PASSED] check_release_shareable_range
[13:36:20] [PASSED] check_split_boundaries
[13:36:20] [PASSED] check_shareable_spare
[13:36:20] [PASSED] check_shareable_spare_fragmented_tail
[13:36:20] ===================== [PASSED] guc_idm =====================
[13:36:20] ============== guc_klv_helpers (13 subtests) ===============
[13:36:20] [PASSED] test_count
[13:36:20] [PASSED] test_encode_u32
[13:36:20] [PASSED] test_encode_u64
[13:36:20] [PASSED] test_encode_string
[13:36:20] [PASSED] test_encode_object_raw
[13:36:20] [PASSED] test_encode_object_klv
[13:36:20] [PASSED] test_encode_object_nested
[13:36:20] [PASSED] test_encode_object_basic
[13:36:20] ===================== test_decode_u16  =====================
[13:36:20] [PASSED] empty
[13:36:20] [PASSED] valid
[13:36:20] [PASSED] max
[13:36:20] [PASSED] big
[13:36:20] [PASSED] long
[13:36:20] ================= [PASSED] test_decode_u16 =================
[13:36:20] ===================== test_decode_u32  =====================
[13:36:20] [PASSED] empty
[13:36:20] [PASSED] valid
[13:36:20] [PASSED] max
[13:36:20] [PASSED] long
[13:36:20] ================= [PASSED] test_decode_u32 =================
[13:36:20] ===================== test_decode_u64  =====================
[13:36:20] [PASSED] empty
[13:36:20] [PASSED] short
[13:36:20] [PASSED] valid
[13:36:20] [PASSED] max
[13:36:20] [PASSED] long
[13:36:20] ================= [PASSED] test_decode_u64 =================
[13:36:20] ===================== test_decode_str  =====================
[13:36:20] [PASSED] empty
[13:36:20] [PASSED] one
[13:36:20] [PASSED] one_trash
[13:36:20] [PASSED] two
[13:36:20] [PASSED] two_trash
[13:36:20] [PASSED] three
[13:36:20] [PASSED] dword
[13:36:20] [PASSED] four
[13:36:20] [PASSED] five
[13:36:20] [PASSED] six
[13:36:20] [PASSED] seven
[13:36:20] [PASSED] qword
[13:36:20] ================= [PASSED] test_decode_str =================
[13:36:20] [PASSED] test_print
[13:36:20] ================= [PASSED] guc_klv_helpers =================
[13:36:20] =================== xe_log (5 subtests) ====================
[13:36:20] [PASSED] demo_cper
[13:36:20] [PASSED] demo_dmesg
[13:36:20] ======================= test_dmesg  ========================
[13:36:20] [PASSED] test_fatal
[13:36:20] [PASSED] test_fatal_tile
[13:36:20] [PASSED] test_fatal_gt
[13:36:20] [PASSED] test_fatal_comp
[13:36:20] [PASSED] test_fatal_comp_tile
[13:36:20] [PASSED] test_fatal_comp_gt
[13:36:20] [PASSED] test_fatal_all
[13:36:20] [PASSED] test_recoverable
[13:36:20] [PASSED] test_recoverable_tile
[13:36:20] [PASSED] test_recoverable_gt
[13:36:20] [PASSED] test_recoverable_comp
[13:36:20] [PASSED] test_recoverable_comp_tile
[13:36:20] [PASSED] test_recoverable_comp_gt
[13:36:20] [PASSED] test_recoverable_all
[13:36:20] [PASSED] test_info
[13:36:20] [PASSED] test_info_tile
[13:36:20] [PASSED] test_info_gt
[13:36:20] [PASSED] test_info_err
[13:36:20] [PASSED] test_info_comp
[13:36:20] [PASSED] test_info_comp_tile
[13:36:20] [PASSED] test_info_comp_gt
[13:36:20] [PASSED] test_info_all
[13:36:20] [PASSED] test_hw_fatal
[13:36:20] [PASSED] test_hw_recoverable
[13:36:20] [PASSED] test_hw_corrected
[13:36:20] [PASSED] test_hw_informational
[13:36:20] =================== [PASSED] test_dmesg ====================
[13:36:20] ====================== test_sw_cper  =======================
[13:36:20] [PASSED] sw-fatal-errno
[13:36:20] [PASSED] sw-recoverable-errno
[13:36:20] [PASSED] sw-corrected
[13:36:20] [PASSED] sw-informational
[13:36:20] [PASSED] sw-with-error-class
[13:36:20] ================== [PASSED] test_sw_cper ===================
[13:36:20] ====================== test_invalid  =======================
[13:36:20] [SKIPPED] no-component no-location no-warn (requires CONFIG_DRM_XE_DEBUG)
[13:36:20] [SKIPPED] reserved location (requires CONFIG_DRM_XE_DEBUG)
[13:36:20] [SKIPPED] unknown location (requires CONFIG_DRM_XE_DEBUG)
[13:36:20] [SKIPPED] nonzero-device-id location (requires CONFIG_DRM_XE_DEBUG)
[13:36:20] [SKIPPED] invalid-tile-id location (requires CONFIG_DRM_XE_DEBUG)
[13:36:20] [SKIPPED] invalid-gt-id location (requires CONFIG_DRM_XE_DEBUG)
[13:36:20] [SKIPPED] unknown component class (requires CONFIG_DRM_XE_DEBUG)
[13:36:20] [SKIPPED] unknown system component (requires CONFIG_DRM_XE_DEBUG)
[13:36:20] [SKIPPED] unknown hardware component (requires CONFIG_DRM_XE_DEBUG)
[13:36:20] [SKIPPED] unknown component and location (requires CONFIG_DRM_XE_DEBUG)
[13:36:20] ================== [SKIPPED] test_invalid ==================
[13:36:20] ===================== [PASSED] xe_log ======================
[13:36:20] ================== no_relay (3 subtests) ===================
[13:36:20] [PASSED] xe_drops_guc2pf_if_not_ready
[13:36:20] [PASSED] xe_drops_guc2vf_if_not_ready
[13:36:20] [PASSED] xe_rejects_send_if_not_ready
[13:36:20] ==================== [PASSED] no_relay =====================
[13:36:20] ================== pf_relay (14 subtests) ==================
[13:36:20] [PASSED] pf_rejects_guc2pf_too_short
[13:36:20] [PASSED] pf_rejects_guc2pf_too_long
[13:36:20] [PASSED] pf_rejects_guc2pf_no_payload
[13:36:20] [PASSED] pf_fails_no_payload
[13:36:20] [PASSED] pf_fails_bad_origin
[13:36:20] [PASSED] pf_fails_bad_type
[13:36:20] [PASSED] pf_txn_reports_error
[13:36:20] [PASSED] pf_txn_sends_pf2guc
[13:36:20] [PASSED] pf_sends_pf2guc
[13:36:20] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[13:36:20] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[13:36:20] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[13:36:20] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[13:36:20] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[13:36:20] ==================== [PASSED] pf_relay =====================
[13:36:20] ================== vf_relay (3 subtests) ===================
[13:36:20] [PASSED] vf_rejects_guc2vf_too_short
[13:36:20] [PASSED] vf_rejects_guc2vf_too_long
[13:36:20] [PASSED] vf_rejects_guc2vf_no_payload
[13:36:20] ==================== [PASSED] vf_relay =====================
[13:36:20] ================ pf_gt_config (9 subtests) =================
[13:36:20] [PASSED] fair_contexts_1vf
[13:36:20] [PASSED] fair_doorbells_1vf
[13:36:20] [PASSED] fair_ggtt_1vf
[13:36:20] ====================== fair_vram_1vf  ======================
[13:36:20] [PASSED] 3.50 GiB
[13:36:20] [PASSED] 11.5 GiB
[13:36:20] [PASSED] 15.5 GiB
[13:36:20] [PASSED] 31.5 GiB
[13:36:20] [PASSED] 63.5 GiB
[13:36:20] [PASSED] 1.91 GiB
[13:36:20] ================== [PASSED] fair_vram_1vf ==================
[13:36:20] ================ fair_vram_1vf_admin_only  =================
[13:36:20] [PASSED] 3.50 GiB
[13:36:20] [PASSED] 11.5 GiB
[13:36:20] [PASSED] 15.5 GiB
[13:36:20] [PASSED] 31.5 GiB
[13:36:20] [PASSED] 63.5 GiB
[13:36:20] [PASSED] 1.91 GiB
[13:36:20] ============ [PASSED] fair_vram_1vf_admin_only =============
[13:36:20] ====================== fair_contexts  ======================
[13:36:20] [PASSED] 1 VF
[13:36:20] [PASSED] 2 VFs
[13:36:20] [PASSED] 3 VFs
[13:36:20] [PASSED] 4 VFs
[13:36:20] [PASSED] 5 VFs
[13:36:20] [PASSED] 6 VFs
[13:36:20] [PASSED] 7 VFs
[13:36:20] [PASSED] 8 VFs
[13:36:20] [PASSED] 9 VFs
[13:36:20] [PASSED] 10 VFs
[13:36:20] [PASSED] 11 VFs
[13:36:20] [PASSED] 12 VFs
[13:36:20] [PASSED] 13 VFs
[13:36:20] [PASSED] 14 VFs
[13:36:20] [PASSED] 15 VFs
[13:36:20] [PASSED] 16 VFs
[13:36:20] [PASSED] 17 VFs
[13:36:20] [PASSED] 18 VFs
[13:36:20] [PASSED] 19 VFs
[13:36:20] [PASSED] 20 VFs
[13:36:20] [PASSED] 21 VFs
[13:36:20] [PASSED] 22 VFs
[13:36:20] [PASSED] 23 VFs
[13:36:20] [PASSED] 24 VFs
[13:36:20] [PASSED] 25 VFs
[13:36:20] [PASSED] 26 VFs
[13:36:20] [PASSED] 27 VFs
[13:36:20] [PASSED] 28 VFs
[13:36:20] [PASSED] 29 VFs
[13:36:20] [PASSED] 30 VFs
[13:36:20] [PASSED] 31 VFs
[13:36:20] [PASSED] 32 VFs
[13:36:20] [PASSED] 33 VFs
[13:36:20] [PASSED] 34 VFs
[13:36:20] [PASSED] 35 VFs
[13:36:20] [PASSED] 36 VFs
[13:36:20] [PASSED] 37 VFs
[13:36:20] [PASSED] 38 VFs
[13:36:20] [PASSED] 39 VFs
[13:36:20] [PASSED] 40 VFs
[13:36:20] [PASSED] 41 VFs
[13:36:20] [PASSED] 42 VFs
[13:36:20] [PASSED] 43 VFs
[13:36:20] [PASSED] 44 VFs
[13:36:20] [PASSED] 45 VFs
[13:36:20] [PASSED] 46 VFs
[13:36:20] [PASSED] 47 VFs
[13:36:20] [PASSED] 48 VFs
[13:36:20] [PASSED] 49 VFs
[13:36:20] [PASSED] 50 VFs
[13:36:20] [PASSED] 51 VFs
[13:36:20] [PASSED] 52 VFs
[13:36:20] [PASSED] 53 VFs
[13:36:20] [PASSED] 54 VFs
[13:36:20] [PASSED] 55 VFs
[13:36:20] [PASSED] 56 VFs
[13:36:20] [PASSED] 57 VFs
[13:36:20] [PASSED] 58 VFs
[13:36:20] [PASSED] 59 VFs
[13:36:20] [PASSED] 60 VFs
[13:36:20] [PASSED] 61 VFs
[13:36:20] [PASSED] 62 VFs
[13:36:20] [PASSED] 63 VFs
[13:36:20] ================== [PASSED] fair_contexts ==================
[13:36:20] ===================== fair_doorbells  ======================
[13:36:20] [PASSED] 1 VF
[13:36:20] [PASSED] 2 VFs
[13:36:20] [PASSED] 3 VFs
[13:36:20] [PASSED] 4 VFs
[13:36:20] [PASSED] 5 VFs
[13:36:20] [PASSED] 6 VFs
[13:36:20] [PASSED] 7 VFs
[13:36:20] [PASSED] 8 VFs
[13:36:20] [PASSED] 9 VFs
[13:36:20] [PASSED] 10 VFs
[13:36:20] [PASSED] 11 VFs
[13:36:20] [PASSED] 12 VFs
[13:36:20] [PASSED] 13 VFs
[13:36:20] [PASSED] 14 VFs
[13:36:20] [PASSED] 15 VFs
[13:36:20] [PASSED] 16 VFs
[13:36:20] [PASSED] 17 VFs
[13:36:20] [PASSED] 18 VFs
[13:36:20] [PASSED] 19 VFs
[13:36:20] [PASSED] 20 VFs
[13:36:20] [PASSED] 21 VFs
[13:36:20] [PASSED] 22 VFs
[13:36:20] [PASSED] 23 VFs
[13:36:20] [PASSED] 24 VFs
[13:36:20] [PASSED] 25 VFs
[13:36:20] [PASSED] 26 VFs
[13:36:20] [PASSED] 27 VFs
[13:36:20] [PASSED] 28 VFs
[13:36:20] [PASSED] 29 VFs
[13:36:20] [PASSED] 30 VFs
[13:36:20] [PASSED] 31 VFs
[13:36:20] [PASSED] 32 VFs
[13:36:20] [PASSED] 33 VFs
[13:36:20] [PASSED] 34 VFs
[13:36:20] [PASSED] 35 VFs
[13:36:20] [PASSED] 36 VFs
[13:36:20] [PASSED] 37 VFs
[13:36:20] [PASSED] 38 VFs
[13:36:20] [PASSED] 39 VFs
[13:36:20] [PASSED] 40 VFs
[13:36:20] [PASSED] 41 VFs
[13:36:20] [PASSED] 42 VFs
[13:36:20] [PASSED] 43 VFs
[13:36:20] [PASSED] 44 VFs
[13:36:20] [PASSED] 45 VFs
[13:36:20] [PASSED] 46 VFs
[13:36:20] [PASSED] 47 VFs
[13:36:20] [PASSED] 48 VFs
[13:36:20] [PASSED] 49 VFs
[13:36:20] [PASSED] 50 VFs
[13:36:20] [PASSED] 51 VFs
[13:36:20] [PASSED] 52 VFs
[13:36:20] [PASSED] 53 VFs
[13:36:20] [PASSED] 54 VFs
[13:36:20] [PASSED] 55 VFs
[13:36:20] [PASSED] 56 VFs
[13:36:20] [PASSED] 57 VFs
[13:36:20] [PASSED] 58 VFs
[13:36:20] [PASSED] 59 VFs
[13:36:20] [PASSED] 60 VFs
[13:36:20] [PASSED] 61 VFs
[13:36:20] [PASSED] 62 VFs
[13:36:20] [PASSED] 63 VFs
[13:36:20] ================= [PASSED] fair_doorbells ==================
[13:36:20] ======================== fair_ggtt  ========================
[13:36:20] [PASSED] 1 VF
[13:36:20] [PASSED] 2 VFs
[13:36:20] [PASSED] 3 VFs
[13:36:20] [PASSED] 4 VFs
[13:36:20] [PASSED] 5 VFs
[13:36:20] [PASSED] 6 VFs
[13:36:20] [PASSED] 7 VFs
[13:36:20] [PASSED] 8 VFs
[13:36:20] [PASSED] 9 VFs
[13:36:20] [PASSED] 10 VFs
[13:36:20] [PASSED] 11 VFs
[13:36:20] [PASSED] 12 VFs
[13:36:20] [PASSED] 13 VFs
[13:36:20] [PASSED] 14 VFs
[13:36:20] [PASSED] 15 VFs
[13:36:20] [PASSED] 16 VFs
[13:36:20] [PASSED] 17 VFs
[13:36:20] [PASSED] 18 VFs
[13:36:20] [PASSED] 19 VFs
[13:36:20] [PASSED] 20 VFs
[13:36:20] [PASSED] 21 VFs
[13:36:20] [PASSED] 22 VFs
[13:36:20] [PASSED] 23 VFs
[13:36:20] [PASSED] 24 VFs
[13:36:20] [PASSED] 25 VFs
[13:36:20] [PASSED] 26 VFs
[13:36:20] [PASSED] 27 VFs
[13:36:20] [PASSED] 28 VFs
[13:36:20] [PASSED] 29 VFs
[13:36:20] [PASSED] 30 VFs
[13:36:20] [PASSED] 31 VFs
[13:36:20] [PASSED] 32 VFs
[13:36:20] [PASSED] 33 VFs
[13:36:20] [PASSED] 34 VFs
[13:36:20] [PASSED] 35 VFs
[13:36:20] [PASSED] 36 VFs
[13:36:20] [PASSED] 37 VFs
[13:36:20] [PASSED] 38 VFs
[13:36:20] [PASSED] 39 VFs
[13:36:20] [PASSED] 40 VFs
[13:36:20] [PASSED] 41 VFs
[13:36:20] [PASSED] 42 VFs
[13:36:20] [PASSED] 43 VFs
[13:36:20] [PASSED] 44 VFs
[13:36:20] [PASSED] 45 VFs
[13:36:20] [PASSED] 46 VFs
[13:36:20] [PASSED] 47 VFs
[13:36:20] [PASSED] 48 VFs
[13:36:20] [PASSED] 49 VFs
[13:36:20] [PASSED] 50 VFs
[13:36:20] [PASSED] 51 VFs
[13:36:20] [PASSED] 52 VFs
[13:36:20] [PASSED] 53 VFs
[13:36:20] [PASSED] 54 VFs
[13:36:20] [PASSED] 55 VFs
[13:36:20] [PASSED] 56 VFs
[13:36:20] [PASSED] 57 VFs
[13:36:20] [PASSED] 58 VFs
[13:36:20] [PASSED] 59 VFs
[13:36:20] [PASSED] 60 VFs
[13:36:20] [PASSED] 61 VFs
[13:36:20] [PASSED] 62 VFs
[13:36:20] [PASSED] 63 VFs
[13:36:20] ==================== [PASSED] fair_ggtt ====================
[13:36:20] ======================== fair_vram  ========================
[13:36:20] [PASSED] 1 VF
[13:36:20] [PASSED] 2 VFs
[13:36:20] [PASSED] 3 VFs
[13:36:20] [PASSED] 4 VFs
[13:36:20] [PASSED] 5 VFs
[13:36:20] [PASSED] 6 VFs
[13:36:20] [PASSED] 7 VFs
[13:36:20] [PASSED] 8 VFs
[13:36:20] [PASSED] 9 VFs
[13:36:20] [PASSED] 10 VFs
[13:36:20] [PASSED] 11 VFs
[13:36:20] [PASSED] 12 VFs
[13:36:20] [PASSED] 13 VFs
[13:36:20] [PASSED] 14 VFs
[13:36:20] [PASSED] 15 VFs
[13:36:20] [PASSED] 16 VFs
[13:36:20] [PASSED] 17 VFs
[13:36:20] [PASSED] 18 VFs
[13:36:20] [PASSED] 19 VFs
[13:36:20] [PASSED] 20 VFs
[13:36:20] [PASSED] 21 VFs
[13:36:20] [PASSED] 22 VFs
[13:36:20] [PASSED] 23 VFs
[13:36:20] [PASSED] 24 VFs
[13:36:20] [PASSED] 25 VFs
[13:36:20] [PASSED] 26 VFs
[13:36:20] [PASSED] 27 VFs
[13:36:20] [PASSED] 28 VFs
[13:36:20] [PASSED] 29 VFs
[13:36:20] [PASSED] 30 VFs
[13:36:20] [PASSED] 31 VFs
[13:36:20] [PASSED] 32 VFs
[13:36:20] [PASSED] 33 VFs
[13:36:20] [PASSED] 34 VFs
[13:36:20] [PASSED] 35 VFs
[13:36:20] [PASSED] 36 VFs
[13:36:20] [PASSED] 37 VFs
[13:36:20] [PASSED] 38 VFs
[13:36:20] [PASSED] 39 VFs
[13:36:20] [PASSED] 40 VFs
[13:36:20] [PASSED] 41 VFs
[13:36:20] [PASSED] 42 VFs
[13:36:20] [PASSED] 43 VFs
[13:36:20] [PASSED] 44 VFs
[13:36:20] [PASSED] 45 VFs
[13:36:20] [PASSED] 46 VFs
[13:36:20] [PASSED] 47 VFs
[13:36:20] [PASSED] 48 VFs
[13:36:20] [PASSED] 49 VFs
[13:36:20] [PASSED] 50 VFs
[13:36:20] [PASSED] 51 VFs
[13:36:20] [PASSED] 52 VFs
[13:36:20] [PASSED] 53 VFs
[13:36:20] [PASSED] 54 VFs
[13:36:20] [PASSED] 55 VFs
[13:36:20] [PASSED] 56 VFs
[13:36:20] [PASSED] 57 VFs
[13:36:20] [PASSED] 58 VFs
[13:36:20] [PASSED] 59 VFs
[13:36:20] [PASSED] 60 VFs
[13:36:20] [PASSED] 61 VFs
[13:36:20] [PASSED] 62 VFs
[13:36:20] [PASSED] 63 VFs
[13:36:20] ==================== [PASSED] fair_vram ====================
[13:36:20] ================== [PASSED] pf_gt_config ===================
[13:36:20] ===================== lmtt (1 subtest) =====================
[13:36:20] ======================== test_ops  =========================
[13:36:20] [PASSED] 2-level
[13:36:20] [PASSED] multi-level
[13:36:20] ==================== [PASSED] test_ops =====================
[13:36:20] ====================== [PASSED] lmtt =======================
[13:36:20] ================= sriov_packet (1 subtest) =================
[13:36:20] [PASSED] test_descriptor_init
[13:36:20] ================== [PASSED] sriov_packet ===================
[13:36:20] ================= pf_service (11 subtests) =================
[13:36:20] [PASSED] pf_negotiate_any
[13:36:20] [PASSED] pf_negotiate_base_match
[13:36:20] [PASSED] pf_negotiate_base_newer
[13:36:20] [PASSED] pf_negotiate_base_next
[13:36:20] [SKIPPED] pf_negotiate_base_older (no older minor)
[13:36:20] [PASSED] pf_negotiate_base_prev
[13:36:20] [PASSED] pf_negotiate_latest_match
[13:36:20] [PASSED] pf_negotiate_latest_newer
[13:36:20] [PASSED] pf_negotiate_latest_next
[13:36:20] [SKIPPED] pf_negotiate_latest_older (no older minor)
[13:36:20] [SKIPPED] pf_negotiate_latest_prev (no prev major)
[13:36:20] =================== [PASSED] pf_service ====================
[13:36:20] ================= xe_guc_g2g (2 subtests) ==================
[13:36:20] ============== xe_live_guc_g2g_kunit_default  ==============
[13:36:20] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[13:36:20] ============== xe_live_guc_g2g_kunit_allmem  ===============
[13:36:20] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[13:36:20] =================== [SKIPPED] xe_guc_g2g ===================
[13:36:20] =================== xe_mocs (2 subtests) ===================
[13:36:20] ================ xe_live_mocs_kernel_kunit  ================
[13:36:20] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[13:36:20] ================ xe_live_mocs_reset_kunit  =================
[13:36:20] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[13:36:20] ==================== [SKIPPED] xe_mocs =====================
[13:36:20] ================= xe_migrate (3 subtests) ==================
[13:36:20] ================= xe_migrate_sanity_kunit  =================
[13:36:20] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[13:36:20] ================== xe_validate_ccs_kunit  ==================
[13:36:20] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[13:36:20] ============= xe_migrate_access_memory_kunit  ==============
[13:36:20] ========= [SKIPPED] xe_migrate_access_memory_kunit =========
[13:36:20] =================== [SKIPPED] xe_migrate ===================
[13:36:20] ================== xe_dma_buf (1 subtest) ==================
[13:36:20] ==================== xe_dma_buf_kunit  =====================
[13:36:20] ================ [SKIPPED] xe_dma_buf_kunit ================
[13:36:20] =================== [SKIPPED] xe_dma_buf ===================
[13:36:20] ================= xe_bo_shrink (1 subtest) =================
[13:36:20] =================== xe_bo_shrink_kunit  ====================
[13:36:20] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[13:36:20] ================== [SKIPPED] xe_bo_shrink ==================
[13:36:20] ==================== xe_bo (2 subtests) ====================
[13:36:20] ================== xe_ccs_migrate_kunit  ===================
[13:36:20] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[13:36:20] ==================== xe_bo_evict_kunit  ====================
[13:36:20] =============== [SKIPPED] xe_bo_evict_kunit ================
[13:36:20] ===================== [SKIPPED] xe_bo ======================
[13:36:20] =================== xe_any (9 subtests) ====================
[13:36:20] [PASSED] test_to_xe
[13:36:20] [PASSED] test_to_dev
[13:36:20] [PASSED] test_to_pdev
[13:36:20] [PASSED] test_to_drm
[13:36:20] [PASSED] test_if_pdev
[13:36:20] [PASSED] test_if_xe
[13:36:20] [PASSED] test_if_tile
[13:36:20] [PASSED] test_if_gt
[13:36:20] [PASSED] test_to_id
[13:36:20] ===================== [PASSED] xe_any ======================
[13:36:20] ==================== args (13 subtests) ====================
[13:36:20] [PASSED] count_args_test
[13:36:20] [PASSED] call_args_example
[13:36:20] [PASSED] call_args_test
[13:36:20] [PASSED] drop_first_arg_example
[13:36:20] [PASSED] drop_first_arg_test
[13:36:20] [PASSED] first_arg_example
[13:36:20] [PASSED] first_arg_test
[13:36:20] [PASSED] last_arg_example
[13:36:20] [PASSED] last_arg_test
[13:36:20] [PASSED] pick_arg_example
[13:36:20] [PASSED] if_args_example
[13:36:20] [PASSED] if_args_test
[13:36:20] [PASSED] sep_comma_example
[13:36:20] ====================== [PASSED] args =======================
[13:36:20] =================== xe_pci (3 subtests) ====================
[13:36:20] ==================== check_graphics_ip  ====================
[13:36:20] [PASSED] 12.00 Xe_LP
[13:36:20] [PASSED] 12.10 Xe_LP+
[13:36:20] [PASSED] 12.55 Xe_HPG
[13:36:20] [PASSED] 12.60 Xe_HPC
[13:36:20] [PASSED] 12.70 Xe_LPG
[13:36:20] [PASSED] 12.71 Xe_LPG
[13:36:20] [PASSED] 12.74 Xe_LPG+
[13:36:20] [PASSED] 20.01 Xe2_HPG
[13:36:20] [PASSED] 20.02 Xe2_HPG
[13:36:20] [PASSED] 20.04 Xe2_LPG
[13:36:20] [PASSED] 30.00 Xe3_LPG
[13:36:20] [PASSED] 30.01 Xe3_LPG
[13:36:20] [PASSED] 30.03 Xe3_LPG
[13:36:20] [PASSED] 30.04 Xe3_LPG
[13:36:20] [PASSED] 30.05 Xe3_LPG
[13:36:20] [PASSED] 35.10 Xe3p_LPG
[13:36:20] [PASSED] 35.11 Xe3p_XPC
[13:36:20] ================ [PASSED] check_graphics_ip ================
[13:36:20] ===================== check_media_ip  ======================
[13:36:20] [PASSED] 12.00 Xe_M
[13:36:20] [PASSED] 12.55 Xe_HPM
[13:36:20] [PASSED] 13.00 Xe_LPM+
[13:36:20] [PASSED] 13.01 Xe2_HPM
[13:36:20] [PASSED] 20.00 Xe2_LPM
[13:36:20] [PASSED] 30.00 Xe3_LPM
[13:36:20] [PASSED] 30.02 Xe3_LPM
[13:36:20] [PASSED] 35.00 Xe3p_LPM
[13:36:20] [PASSED] 35.03 Xe3p_HPM
[13:36:20] ================= [PASSED] check_media_ip ==================
[13:36:20] =================== check_platform_desc  ===================
[13:36:20] [PASSED] 0x9A60 (TIGERLAKE)
[13:36:20] [PASSED] 0x9A68 (TIGERLAKE)
[13:36:20] [PASSED] 0x9A70 (TIGERLAKE)
[13:36:20] [PASSED] 0x9A40 (TIGERLAKE)
[13:36:20] [PASSED] 0x9A49 (TIGERLAKE)
[13:36:20] [PASSED] 0x9A59 (TIGERLAKE)
[13:36:20] [PASSED] 0x9A78 (TIGERLAKE)
[13:36:20] [PASSED] 0x9AC0 (TIGERLAKE)
[13:36:20] [PASSED] 0x9AC9 (TIGERLAKE)
[13:36:20] [PASSED] 0x9AD9 (TIGERLAKE)
[13:36:20] [PASSED] 0x9AF8 (TIGERLAKE)
[13:36:20] [PASSED] 0x4C80 (ROCKETLAKE)
[13:36:20] [PASSED] 0x4C8A (ROCKETLAKE)
[13:36:20] [PASSED] 0x4C8B (ROCKETLAKE)
[13:36:20] [PASSED] 0x4C8C (ROCKETLAKE)
[13:36:20] [PASSED] 0x4C90 (ROCKETLAKE)
[13:36:20] [PASSED] 0x4C9A (ROCKETLAKE)
[13:36:20] [PASSED] 0x4680 (ALDERLAKE_S)
[13:36:20] [PASSED] 0x4682 (ALDERLAKE_S)
[13:36:20] [PASSED] 0x4688 (ALDERLAKE_S)
[13:36:20] [PASSED] 0x468A (ALDERLAKE_S)
[13:36:20] [PASSED] 0x468B (ALDERLAKE_S)
[13:36:20] [PASSED] 0x4690 (ALDERLAKE_S)
[13:36:20] [PASSED] 0x4692 (ALDERLAKE_S)
[13:36:20] [PASSED] 0x4693 (ALDERLAKE_S)
[13:36:20] [PASSED] 0x46A0 (ALDERLAKE_P)
[13:36:20] [PASSED] 0x46A1 (ALDERLAKE_P)
[13:36:20] [PASSED] 0x46A2 (ALDERLAKE_P)
[13:36:20] [PASSED] 0x46A3 (ALDERLAKE_P)
[13:36:20] [PASSED] 0x46A6 (ALDERLAKE_P)
[13:36:20] [PASSED] 0x46A8 (ALDERLAKE_P)
[13:36:20] [PASSED] 0x46AA (ALDERLAKE_P)
[13:36:20] [PASSED] 0x462A (ALDERLAKE_P)
[13:36:20] [PASSED] 0x4626 (ALDERLAKE_P)
[13:36:20] [PASSED] 0x4628 (ALDERLAKE_P)
[13:36:20] [PASSED] 0x46B0 (ALDERLAKE_P)
[13:36:20] [PASSED] 0x46B1 (ALDERLAKE_P)
[13:36:20] [PASSED] 0x46B2 (ALDERLAKE_P)
[13:36:20] [PASSED] 0x46B3 (ALDERLAKE_P)
[13:36:20] [PASSED] 0x46C0 (ALDERLAKE_P)
[13:36:20] [PASSED] 0x46C1 (ALDERLAKE_P)
[13:36:20] [PASSED] 0x46C2 (ALDERLAKE_P)
[13:36:20] [PASSED] 0x46C3 (ALDERLAKE_P)
[13:36:20] [PASSED] 0x46D0 (ALDERLAKE_N)
[13:36:20] [PASSED] 0x46D1 (ALDERLAKE_N)
[13:36:20] [PASSED] 0x46D2 (ALDERLAKE_N)
[13:36:20] [PASSED] 0x46D3 (ALDERLAKE_N)
[13:36:20] [PASSED] 0x46D4 (ALDERLAKE_N)
[13:36:20] [PASSED] 0xA721 (ALDERLAKE_P)
[13:36:20] [PASSED] 0xA7A1 (ALDERLAKE_P)
[13:36:20] [PASSED] 0xA7A9 (ALDERLAKE_P)
[13:36:20] [PASSED] 0xA7AC (ALDERLAKE_P)
[13:36:20] [PASSED] 0xA7AD (ALDERLAKE_P)
[13:36:20] [PASSED] 0xA720 (ALDERLAKE_P)
[13:36:20] [PASSED] 0xA7A0 (ALDERLAKE_P)
[13:36:20] [PASSED] 0xA7A8 (ALDERLAKE_P)
[13:36:20] [PASSED] 0xA7AA (ALDERLAKE_P)
[13:36:20] [PASSED] 0xA7AB (ALDERLAKE_P)
[13:36:20] [PASSED] 0xA780 (ALDERLAKE_S)
[13:36:20] [PASSED] 0xA781 (ALDERLAKE_S)
[13:36:20] [PASSED] 0xA782 (ALDERLAKE_S)
[13:36:20] [PASSED] 0xA783 (ALDERLAKE_S)
[13:36:20] [PASSED] 0xA788 (ALDERLAKE_S)
[13:36:20] [PASSED] 0xA789 (ALDERLAKE_S)
[13:36:20] [PASSED] 0xA78A (ALDERLAKE_S)
[13:36:20] [PASSED] 0xA78B (ALDERLAKE_S)
[13:36:20] [PASSED] 0x4905 (DG1)
[13:36:20] [PASSED] 0x4906 (DG1)
[13:36:20] [PASSED] 0x4907 (DG1)
[13:36:20] [PASSED] 0x4908 (DG1)
[13:36:20] [PASSED] 0x4909 (DG1)
[13:36:20] [PASSED] 0x56C0 (DG2)
[13:36:20] [PASSED] 0x56C2 (DG2)
[13:36:20] [PASSED] 0x56C1 (DG2)
[13:36:20] [PASSED] 0x7D51 (METEORLAKE)
[13:36:20] [PASSED] 0x7DD1 (METEORLAKE)
[13:36:20] [PASSED] 0x7D41 (METEORLAKE)
[13:36:20] [PASSED] 0x7D67 (METEORLAKE)
[13:36:20] [PASSED] 0xB640 (METEORLAKE)
[13:36:20] [PASSED] 0x56A0 (DG2)
[13:36:20] [PASSED] 0x56A1 (DG2)
[13:36:20] [PASSED] 0x56A2 (DG2)
[13:36:20] [PASSED] 0x56BE (DG2)
[13:36:20] [PASSED] 0x56BF (DG2)
[13:36:20] [PASSED] 0x5690 (DG2)
[13:36:20] [PASSED] 0x5691 (DG2)
[13:36:20] [PASSED] 0x5692 (DG2)
[13:36:20] [PASSED] 0x56A5 (DG2)
[13:36:20] [PASSED] 0x56A6 (DG2)
[13:36:20] [PASSED] 0x56B0 (DG2)
[13:36:20] [PASSED] 0x56B1 (DG2)
[13:36:20] [PASSED] 0x56BA (DG2)
[13:36:20] [PASSED] 0x56BB (DG2)
[13:36:20] [PASSED] 0x56BC (DG2)
[13:36:20] [PASSED] 0x56BD (DG2)
[13:36:20] [PASSED] 0x5693 (DG2)
[13:36:20] [PASSED] 0x5694 (DG2)
[13:36:20] [PASSED] 0x5695 (DG2)
[13:36:20] [PASSED] 0x56A3 (DG2)
[13:36:20] [PASSED] 0x56A4 (DG2)
[13:36:20] [PASSED] 0x56B2 (DG2)
[13:36:20] [PASSED] 0x56B3 (DG2)
[13:36:20] [PASSED] 0x5696 (DG2)
[13:36:20] [PASSED] 0x5697 (DG2)
[13:36:20] [PASSED] 0xB69 (PVC)
[13:36:20] [PASSED] 0xB6E (PVC)
[13:36:20] [PASSED] 0xBD4 (PVC)
[13:36:20] [PASSED] 0xBD5 (PVC)
[13:36:20] [PASSED] 0xBD6 (PVC)
[13:36:20] [PASSED] 0xBD7 (PVC)
[13:36:20] [PASSED] 0xBD8 (PVC)
[13:36:20] [PASSED] 0xBD9 (PVC)
[13:36:20] [PASSED] 0xBDA (PVC)
[13:36:20] [PASSED] 0xBDB (PVC)
[13:36:20] [PASSED] 0xBE0 (PVC)
[13:36:20] [PASSED] 0xBE1 (PVC)
[13:36:20] [PASSED] 0xBE5 (PVC)
[13:36:20] [PASSED] 0x7D40 (METEORLAKE)
[13:36:20] [PASSED] 0x7D45 (METEORLAKE)
[13:36:20] [PASSED] 0x7D55 (METEORLAKE)
[13:36:20] [PASSED] 0x7D60 (METEORLAKE)
[13:36:20] [PASSED] 0x7DD5 (METEORLAKE)
[13:36:20] [PASSED] 0x6420 (LUNARLAKE)
[13:36:20] [PASSED] 0x64A0 (LUNARLAKE)
[13:36:20] [PASSED] 0x64B0 (LUNARLAKE)
[13:36:20] [PASSED] 0xE202 (BATTLEMAGE)
[13:36:20] [PASSED] 0xE209 (BATTLEMAGE)
[13:36:20] [PASSED] 0xE20B (BATTLEMAGE)
[13:36:20] [PASSED] 0xE20C (BATTLEMAGE)
[13:36:20] [PASSED] 0xE20D (BATTLEMAGE)
[13:36:20] [PASSED] 0xE210 (BATTLEMAGE)
[13:36:20] [PASSED] 0xE211 (BATTLEMAGE)
[13:36:20] [PASSED] 0xE212 (BATTLEMAGE)
[13:36:20] [PASSED] 0xE216 (BATTLEMAGE)
[13:36:20] [PASSED] 0xE220 (BATTLEMAGE)
[13:36:20] [PASSED] 0xE221 (BATTLEMAGE)
[13:36:20] [PASSED] 0xE222 (BATTLEMAGE)
[13:36:20] [PASSED] 0xE223 (BATTLEMAGE)
[13:36:20] [PASSED] 0xB080 (PANTHERLAKE)
[13:36:20] [PASSED] 0xB081 (PANTHERLAKE)
[13:36:20] [PASSED] 0xB082 (PANTHERLAKE)
[13:36:20] [PASSED] 0xB083 (PANTHERLAKE)
[13:36:20] [PASSED] 0xB084 (PANTHERLAKE)
[13:36:20] [PASSED] 0xB085 (PANTHERLAKE)
[13:36:20] [PASSED] 0xB086 (PANTHERLAKE)
[13:36:20] [PASSED] 0xB087 (PANTHERLAKE)
[13:36:20] [PASSED] 0xB08F (PANTHERLAKE)
[13:36:20] [PASSED] 0xB090 (PANTHERLAKE)
[13:36:20] [PASSED] 0xB0A0 (PANTHERLAKE)
[13:36:20] [PASSED] 0xB0A1 (PANTHERLAKE)
[13:36:20] [PASSED] 0xB0B0 (PANTHERLAKE)
[13:36:20] [PASSED] 0xFD80 (PANTHERLAKE)
[13:36:20] [PASSED] 0xFD81 (PANTHERLAKE)
[13:36:20] [PASSED] 0xD740 (NOVALAKE_S)
[13:36:20] [PASSED] 0xD741 (NOVALAKE_S)
[13:36:20] [PASSED] 0xD742 (NOVALAKE_S)
[13:36:20] [PASSED] 0xD743 (NOVALAKE_S)
[13:36:20] [PASSED] 0xD745 (NOVALAKE_S)
[13:36:20] [PASSED] 0xD74A (NOVALAKE_S)
[13:36:20] [PASSED] 0xD74B (NOVALAKE_S)
[13:36:20] [PASSED] 0x674C (CRESCENTISLAND)
[13:36:20] [PASSED] 0x674D (CRESCENTISLAND)
[13:36:20] [PASSED] 0x674E (CRESCENTISLAND)
[13:36:20] [PASSED] 0x674F (CRESCENTISLAND)
[13:36:20] [PASSED] 0x6750 (CRESCENTISLAND)
[13:36:20] [PASSED] 0x6751 (CRESCENTISLAND)
[13:36:20] [PASSED] 0x6752 (CRESCENTISLAND)
[13:36:20] [PASSED] 0xD750 (NOVALAKE_P)
[13:36:20] [PASSED] 0xD751 (NOVALAKE_P)
[13:36:20] [PASSED] 0xD752 (NOVALAKE_P)
[13:36:20] [PASSED] 0xD753 (NOVALAKE_P)
[13:36:20] [PASSED] 0xD754 (NOVALAKE_P)
[13:36:20] [PASSED] 0xD755 (NOVALAKE_P)
[13:36:20] [PASSED] 0xD756 (NOVALAKE_P)
[13:36:20] [PASSED] 0xD757 (NOVALAKE_P)
[13:36:20] [PASSED] 0xD75F (NOVALAKE_P)
[13:36:20] =============== [PASSED] check_platform_desc ===============
[13:36:20] ===================== [PASSED] xe_pci ======================
[13:36:20] ============= xe_rtp_tables_test (5 subtests) ==============
[13:36:20] ================== xe_rtp_table_gt_test  ===================
[13:36:20] [PASSED] gt_was/14011060649
[13:36:20] [PASSED] gt_was/14011059788
[13:36:20] [PASSED] gt_was/14015795083
[13:36:20] [PASSED] gt_was/16021867713
[13:36:20] [PASSED] gt_was/14019449301
[13:36:20] [PASSED] gt_was/16028005424
[13:36:20] [PASSED] gt_was/14026578760
[13:36:20] [PASSED] gt_was/1409420604
[13:36:20] [PASSED] gt_was/1408615072
[13:36:20] [PASSED] gt_was/22010523718
[13:36:20] [PASSED] gt_was/14011006942
[13:36:20] [PASSED] gt_was/14014830051
[13:36:20] [PASSED] gt_was/18018781329
[13:36:20] [PASSED] gt_was/1509235366
[13:36:20] [PASSED] gt_was/18018781329
[13:36:20] [PASSED] gt_was/16016694945
[13:36:20] [PASSED] gt_was/14018575942
[13:36:20] [PASSED] gt_was/22016670082
[13:36:20] [PASSED] gt_was/22016670082
[13:36:20] [PASSED] gt_was/14017421178
[13:36:20] [PASSED] gt_was/16025250150
[13:36:20] [PASSED] gt_was/14021871409
[13:36:20] [PASSED] gt_was/16021865536
[13:36:20] [PASSED] gt_was/14021486841
[13:36:20] [PASSED] gt_was/14025160223
[13:36:20] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[13:36:20] [PASSED] gt_was/14025635424
[13:36:20] [PASSED] gt_was/16028005424
[13:36:20] ============== [PASSED] xe_rtp_table_gt_test ===============
[13:36:20] ================== xe_rtp_table_gt_test  ===================
[13:36:20] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[13:36:20] [PASSED] gt_tunings/Tuning: 32B Access Enable
[13:36:20] [PASSED] gt_tunings/Tuning: L3 cache
[13:36:20] [PASSED] gt_tunings/Tuning: L3 cache - media
[13:36:20] [PASSED] gt_tunings/Tuning: Compression Overfetch
[13:36:20] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[13:36:20] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[13:36:20] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[13:36:20] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[13:36:20] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[13:36:20] [PASSED] gt_tunings/Tuning: Stateless compression control
[13:36:20] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[13:36:20] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[13:36:20] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[13:36:20] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[13:36:20] [PASSED] gt_tunings/Tuning: Force All Non-Compressible Memory Reads to be 256B Overfetches
[13:36:20] ============== [PASSED] xe_rtp_table_gt_test ===============
[13:36:20] ================== xe_rtp_table_oob_test  ==================
[13:36:20] [PASSED] oob_was/1607983814
[13:36:20] [PASSED] oob_was/16010904313
[13:36:20] [PASSED] oob_was/18022495364
[13:36:20] [PASSED] oob_was/22012773006
[13:36:20] [PASSED] oob_was/14014475959
[13:36:20] [PASSED] oob_was/22011391025
[13:36:20] [PASSED] oob_was/22012727170
[13:36:20] [PASSED] oob_was/22012727685
[13:36:20] [PASSED] oob_was/22016596838
[13:36:20] [PASSED] oob_was/18020744125
[13:36:20] [PASSED] oob_was/1409600907
[13:36:20] [PASSED] oob_was/22014953428
[13:36:20] [PASSED] oob_was/16017236439
[13:36:20] [PASSED] oob_was/14019821291
[13:36:20] [PASSED] oob_was/14015076503
[13:36:20] [PASSED] oob_was/22016122933
[13:36:20] [PASSED] oob_was/14018913170
[13:36:20] [PASSED] oob_was/14018094691
[13:36:20] [PASSED] oob_was/18024947630
[13:36:20] [PASSED] oob_was/16022287689
[13:36:20] [PASSED] oob_was/13011645652
[13:36:20] [PASSED] oob_was/14022293748
[13:36:20] [PASSED] oob_was/22019794406
[13:36:20] [PASSED] oob_was/22019338487
[13:36:20] [PASSED] oob_was/16023588340
[13:36:20] [PASSED] oob_was/14019789679
[13:36:20] [PASSED] oob_was/14022866841
[13:36:20] [PASSED] oob_was/16021333562
[13:36:20] [PASSED] oob_was/14016712196
[13:36:20] [PASSED] oob_was/14015568240
[13:36:20] [PASSED] oob_was/18013179988
[13:36:20] [PASSED] oob_was/1508761755
[13:36:20] [PASSED] oob_was/16023105232
[13:36:20] [PASSED] oob_was/16026508708
[13:36:20] [PASSED] oob_was/14020001231
[13:36:20] [PASSED] oob_was/16023683509
[13:36:20] [PASSED] oob_was/14025515070
[13:36:20] [PASSED] oob_was/15015404425_disable
[13:36:20] [PASSED] oob_was/16026007364
[13:36:20] [PASSED] oob_was/14020316580
[13:36:20] [PASSED] oob_was/14025883347
[13:36:20] [PASSED] oob_was/16029380221
[13:36:20] [PASSED] oob_was/22022079272
[13:36:20] [PASSED] oob_was/16029897822
[13:36:20] [PASSED] oob_was/14026539277
[13:36:20] [PASSED] oob_was/14027054324
[13:36:20] [PASSED] oob_was/14025941587
[13:36:20] [PASSED] oob_was/16030224309
[13:36:20] ============== [PASSED] xe_rtp_table_oob_test ==============
[13:36:20] ================ xe_rtp_table_dev_oob_test  ================
[13:36:20] [PASSED] device_oob_was/22010954014
[13:36:20] [PASSED] device_oob_was/15015404425
[13:36:20] [PASSED] device_oob_was/22019338487_display
[13:36:20] [PASSED] device_oob_was/14022085890
[13:36:20] [PASSED] device_oob_was/14026633728
[13:36:20] [PASSED] device_oob_was/14026746987
[13:36:20] [PASSED] device_oob_was/14026779378
[13:36:20] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[13:36:20] ========== xe_rtp_table_missing_upper_bound_test  ==========
[13:36:20] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865
[13:36:20] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037
[13:36:20] [PASSED] register_whitelist/1806527549
[13:36:20] [PASSED] register_whitelist/allow_read_ctx_timestamp
[13:36:20] [PASSED] register_whitelist/allow_read_queue_timestamp
[13:36:20] [PASSED] register_whitelist/16014440446
[13:36:20] [PASSED] register_whitelist/16017236439
[13:36:20] [PASSED] register_whitelist/16020183090
[13:36:20] [PASSED] register_whitelist/14024997852
[13:36:20] [PASSED] register_whitelist/14024997852
[13:36:20] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ======
[13:36:20] =============== [PASSED] xe_rtp_tables_test ================
[13:36:20] =================== xe_rtp (3 subtests) ====================
[13:36:20] =================== xe_rtp_rules_tests  ====================
[13:36:20] [PASSED] no
[13:36:20] [PASSED] yes
[13:36:20] [PASSED] no-and-no
[13:36:20] [PASSED] no-and-yes
[13:36:20] [PASSED] yes-and-no
[13:36:20] [PASSED] yes-and-yes
[13:36:20] [PASSED] no-or-no
[13:36:20] [PASSED] no-or-yes
[13:36:20] [PASSED] yes-or-no
[13:36:20] [PASSED] yes-or-yes
[13:36:20] [PASSED] no-yes-or-yes-no
[13:36:20] [PASSED] no-yes-or-yes-yes
[13:36:20] [PASSED] yes-yes-or-no-yes
[13:36:20] [PASSED] yes-yes-or-yes-yes
[13:36:20] [PASSED] no-no-or-yes-or-no
[13:36:20] [PASSED] or
[13:36:20] [PASSED] or-yes
[13:36:20] [PASSED] or-no
[13:36:20] [PASSED] yes-or
[13:36:20] [PASSED] no-or
[13:36:20] [PASSED] no-or-or-yes
[13:36:20] [PASSED] yes-or-or-no
[13:36:20] [PASSED] no-or-or-no
[13:36:20] [PASSED] missing-context-engine-class
[13:36:20] [PASSED] missing-context-engine-class-or-yes
[13:36:20] [PASSED] missing-context-engine-class-or-or-yes
[13:36:20] =============== [PASSED] xe_rtp_rules_tests ================
[13:36:20] =============== xe_rtp_process_to_sr_tests  ================
[13:36:20] [PASSED] coalesce-same-reg
[13:36:20] [PASSED] coalesce-same-reg-literal-and-func
[13:36:20] [PASSED] no-match-no-add
[13:36:20] [PASSED] two-regs-two-entries
[13:36:20] [PASSED] clr-one-set-other
[13:36:20] [PASSED] set-field
[13:36:20] [PASSED] conflict-duplicate
[13:36:20] [PASSED] conflict-not-disjoint
[13:36:20] [PASSED] conflict-not-disjoint-literal-and-func
[13:36:20] [PASSED] conflict-reg-type
[13:36:20] [PASSED] bad-mcr-reg-forced-to-regular
[13:36:20] [PASSED] bad-regular-reg-forced-to-mcr
[13:36:20] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[13:36:20] ================== xe_rtp_process_tests  ===================
[13:36:20] [PASSED] active1
[13:36:20] [PASSED] active2
[13:36:20] [PASSED] active-inactive
[13:36:20] [PASSED] inactive-active
[13:36:20] [PASSED] inactive-active-inactive
[13:36:20] [PASSED] inactive-inactive-inactive
[13:36:20] ============== [PASSED] xe_rtp_process_tests ===============
[13:36:20] ===================== [PASSED] xe_rtp ======================
[13:36:20] ==================== xe_wa (1 subtest) =====================
[13:36:20] ======================== xe_wa_gt  =========================
[13:36:20] [PASSED] TIGERLAKE B0
[13:36:20] [PASSED] DG1 A0
[13:36:20] [PASSED] DG1 B0
[13:36:20] [PASSED] ALDERLAKE_S A0
[13:36:20] [PASSED] ALDERLAKE_S B0
[13:36:20] [PASSED] ALDERLAKE_S C0
[13:36:20] [PASSED] ALDERLAKE_S D0
[13:36:20] [PASSED] ALDERLAKE_P A0
[13:36:20] [PASSED] ALDERLAKE_P B0
[13:36:20] [PASSED] ALDERLAKE_P C0
[13:36:20] [PASSED] ALDERLAKE_S RPLS D0
[13:36:20] [PASSED] ALDERLAKE_P RPLU E0
[13:36:20] [PASSED] DG2 G10 C0
[13:36:20] [PASSED] DG2 G11 B1
[13:36:20] [PASSED] DG2 G12 A1
[13:36:20] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[13:36:20] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[13:36:20] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[13:36:20] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[13:36:20] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[13:36:20] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[13:36:20] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[13:36:20] ==================== [PASSED] xe_wa_gt =====================
[13:36:20] ====================== [PASSED] xe_wa ======================
[13:36:20] ============================================================
[13:36:20] Testing complete. Ran 844 tests: passed: 815, skipped: 29
[13:36:20] Elapsed time: 41.188s total, 1.830s configuring, 38.590s building, 0.734s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[13:36:20] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[13:36:22] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[13:36:47] Starting KUnit Kernel (1/1)...
[13:36:47] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[13:36:47] ============ drm_test_pick_cmdline (2 subtests) ============
[13:36:47] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[13:36:47] =============== drm_test_pick_cmdline_named  ===============
[13:36:47] [PASSED] NTSC
[13:36:47] [PASSED] NTSC-J
[13:36:47] [PASSED] PAL
[13:36:47] [PASSED] PAL-M
[13:36:47] =========== [PASSED] drm_test_pick_cmdline_named ===========
[13:36:47] ============== [PASSED] drm_test_pick_cmdline ==============
[13:36:47] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[13:36:47] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[13:36:47] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[13:36:47] =========== drm_validate_clone_mode (2 subtests) ===========
[13:36:47] ============== drm_test_check_in_clone_mode  ===============
[13:36:47] [PASSED] in_clone_mode
[13:36:47] [PASSED] not_in_clone_mode
[13:36:47] ========== [PASSED] drm_test_check_in_clone_mode ===========
[13:36:47] =============== drm_test_check_valid_clones  ===============
[13:36:47] [PASSED] not_in_clone_mode
[13:36:47] [PASSED] valid_clone
[13:36:47] [PASSED] invalid_clone
[13:36:47] =========== [PASSED] drm_test_check_valid_clones ===========
[13:36:47] ============= [PASSED] drm_validate_clone_mode =============
[13:36:47] ============= drm_validate_modeset (1 subtest) =============
[13:36:47] [PASSED] drm_test_check_connector_changed_modeset
[13:36:47] ============== [PASSED] drm_validate_modeset ===============
[13:36:47] ====== drm_test_bridge_get_current_state (1 subtest) =======
[13:36:47] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[13:36:47] ======== [PASSED] drm_test_bridge_get_current_state ========
[13:36:47] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[13:36:47] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[13:36:47] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[13:36:47] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[13:36:47] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[13:36:47] ============== drm_bridge_alloc (2 subtests) ===============
[13:36:47] [PASSED] drm_test_drm_bridge_alloc_basic
[13:36:47] [PASSED] drm_test_drm_bridge_alloc_get_put
[13:36:47] ================ [PASSED] drm_bridge_alloc =================
[13:36:47] ============= drm_bridge_bus_fmt (5 subtests) ==============
[13:36:47] [PASSED] drm_test_bridge_rgb_yuv_rgb
[13:36:47] [PASSED] drm_test_bridge_must_convert_to_yuv444
[13:36:47] [PASSED] drm_test_bridge_hdmi_auto_rgb
[13:36:47] [PASSED] drm_test_bridge_auto_first
[13:36:47] [PASSED] drm_test_bridge_rgb_yuv_no_path
[13:36:47] =============== [PASSED] drm_bridge_bus_fmt ================
[13:36:47] ============= drm_cmdline_parser (40 subtests) =============
[13:36:47] [PASSED] drm_test_cmdline_force_d_only
[13:36:47] [PASSED] drm_test_cmdline_force_D_only_dvi
[13:36:47] [PASSED] drm_test_cmdline_force_D_only_hdmi
[13:36:47] [PASSED] drm_test_cmdline_force_D_only_not_digital
[13:36:47] [PASSED] drm_test_cmdline_force_e_only
[13:36:47] [PASSED] drm_test_cmdline_res
[13:36:47] [PASSED] drm_test_cmdline_res_vesa
[13:36:47] [PASSED] drm_test_cmdline_res_vesa_rblank
[13:36:47] [PASSED] drm_test_cmdline_res_rblank
[13:36:47] [PASSED] drm_test_cmdline_res_bpp
[13:36:47] [PASSED] drm_test_cmdline_res_refresh
[13:36:47] [PASSED] drm_test_cmdline_res_bpp_refresh
[13:36:47] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[13:36:47] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[13:36:47] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[13:36:47] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[13:36:47] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[13:36:47] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[13:36:47] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[13:36:47] [PASSED] drm_test_cmdline_res_margins_force_on
[13:36:47] [PASSED] drm_test_cmdline_res_vesa_margins
[13:36:47] [PASSED] drm_test_cmdline_name
[13:36:47] [PASSED] drm_test_cmdline_name_bpp
[13:36:47] [PASSED] drm_test_cmdline_name_option
[13:36:47] [PASSED] drm_test_cmdline_name_bpp_option
[13:36:47] [PASSED] drm_test_cmdline_rotate_0
[13:36:47] [PASSED] drm_test_cmdline_rotate_90
[13:36:47] [PASSED] drm_test_cmdline_rotate_180
[13:36:47] [PASSED] drm_test_cmdline_rotate_270
[13:36:47] [PASSED] drm_test_cmdline_hmirror
[13:36:47] [PASSED] drm_test_cmdline_vmirror
[13:36:47] [PASSED] drm_test_cmdline_margin_options
[13:36:47] [PASSED] drm_test_cmdline_multiple_options
[13:36:47] [PASSED] drm_test_cmdline_bpp_extra_and_option
[13:36:47] [PASSED] drm_test_cmdline_extra_and_option
[13:36:47] [PASSED] drm_test_cmdline_freestanding_options
[13:36:47] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[13:36:47] [PASSED] drm_test_cmdline_panel_orientation
[13:36:47] ================ drm_test_cmdline_invalid  =================
[13:36:47] [PASSED] margin_only
[13:36:47] [PASSED] interlace_only
[13:36:47] [PASSED] res_missing_x
[13:36:47] [PASSED] res_missing_y
[13:36:47] [PASSED] res_bad_y
[13:36:47] [PASSED] res_missing_y_bpp
[13:36:47] [PASSED] res_bad_bpp
[13:36:47] [PASSED] res_bad_refresh
[13:36:47] [PASSED] res_bpp_refresh_force_on_off
[13:36:47] [PASSED] res_invalid_mode
[13:36:47] [PASSED] res_bpp_wrong_place_mode
[13:36:47] [PASSED] name_bpp_refresh
[13:36:47] [PASSED] name_refresh
[13:36:47] [PASSED] name_refresh_wrong_mode
[13:36:47] [PASSED] name_refresh_invalid_mode
[13:36:47] [PASSED] rotate_multiple
[13:36:47] [PASSED] rotate_invalid_val
[13:36:47] [PASSED] rotate_truncated
[13:36:47] [PASSED] invalid_option
[13:36:47] [PASSED] invalid_tv_option
[13:36:47] [PASSED] truncated_tv_option
[13:36:47] ============ [PASSED] drm_test_cmdline_invalid =============
[13:36:47] =============== drm_test_cmdline_tv_options  ===============
[13:36:47] [PASSED] NTSC
[13:36:47] [PASSED] NTSC_443
[13:36:47] [PASSED] NTSC_J
[13:36:47] [PASSED] PAL
[13:36:47] [PASSED] PAL_M
[13:36:47] [PASSED] PAL_N
[13:36:47] [PASSED] SECAM
[13:36:47] [PASSED] MONO_525
[13:36:47] [PASSED] MONO_625
[13:36:47] =========== [PASSED] drm_test_cmdline_tv_options ===========
[13:36:47] =============== [PASSED] drm_cmdline_parser ================
[13:36:47] ========== drmm_connector_hdmi_init (20 subtests) ==========
[13:36:47] [PASSED] drm_test_connector_hdmi_init_valid
[13:36:47] [PASSED] drm_test_connector_hdmi_init_bpc_8
[13:36:47] [PASSED] drm_test_connector_hdmi_init_bpc_10
[13:36:47] [PASSED] drm_test_connector_hdmi_init_bpc_12
[13:36:47] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[13:36:47] [PASSED] drm_test_connector_hdmi_init_bpc_null
[13:36:47] [PASSED] drm_test_connector_hdmi_init_formats_empty
[13:36:47] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[13:36:47] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[13:36:47] [PASSED] supported_formats=0x9 yuv420_allowed=1
[13:36:47] [PASSED] supported_formats=0x9 yuv420_allowed=0
[13:36:47] [PASSED] supported_formats=0x5 yuv420_allowed=1
[13:36:47] [PASSED] supported_formats=0x5 yuv420_allowed=0
[13:36:47] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[13:36:47] [PASSED] drm_test_connector_hdmi_init_null_ddc
[13:36:47] [PASSED] drm_test_connector_hdmi_init_null_product
[13:36:47] [PASSED] drm_test_connector_hdmi_init_null_vendor
[13:36:47] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[13:36:47] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[13:36:47] [PASSED] drm_test_connector_hdmi_init_product_valid
[13:36:47] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[13:36:47] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[13:36:47] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[13:36:47] ========= drm_test_connector_hdmi_init_type_valid  =========
[13:36:47] [PASSED] HDMI-A
[13:36:47] [PASSED] HDMI-B
[13:36:47] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[13:36:47] ======== drm_test_connector_hdmi_init_type_invalid  ========
[13:36:47] [PASSED] Unknown
[13:36:47] [PASSED] VGA
[13:36:47] [PASSED] DVI-I
[13:36:47] [PASSED] DVI-D
[13:36:47] [PASSED] DVI-A
[13:36:47] [PASSED] Composite
[13:36:47] [PASSED] SVIDEO
[13:36:47] [PASSED] LVDS
[13:36:47] [PASSED] Component
[13:36:47] [PASSED] DIN
[13:36:47] [PASSED] DP
[13:36:47] [PASSED] TV
[13:36:47] [PASSED] eDP
[13:36:47] [PASSED] Virtual
[13:36:47] [PASSED] DSI
[13:36:47] [PASSED] DPI
[13:36:47] [PASSED] Writeback
[13:36:47] [PASSED] SPI
[13:36:47] [PASSED] USB
[13:36:47] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[13:36:47] ============ [PASSED] drmm_connector_hdmi_init =============
[13:36:47] ============= drmm_connector_init (3 subtests) =============
[13:36:47] [PASSED] drm_test_drmm_connector_init
[13:36:47] [PASSED] drm_test_drmm_connector_init_null_ddc
[13:36:47] ========= drm_test_drmm_connector_init_type_valid  =========
[13:36:47] [PASSED] Unknown
[13:36:47] [PASSED] VGA
[13:36:47] [PASSED] DVI-I
[13:36:47] [PASSED] DVI-D
[13:36:47] [PASSED] DVI-A
[13:36:47] [PASSED] Composite
[13:36:47] [PASSED] SVIDEO
[13:36:47] [PASSED] LVDS
[13:36:47] [PASSED] Component
[13:36:47] [PASSED] DIN
[13:36:47] [PASSED] DP
[13:36:47] [PASSED] HDMI-A
[13:36:47] [PASSED] HDMI-B
[13:36:47] [PASSED] TV
[13:36:47] [PASSED] eDP
[13:36:47] [PASSED] Virtual
[13:36:47] [PASSED] DSI
[13:36:47] [PASSED] DPI
[13:36:47] [PASSED] Writeback
[13:36:47] [PASSED] SPI
[13:36:47] [PASSED] USB
[13:36:47] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[13:36:47] =============== [PASSED] drmm_connector_init ===============
[13:36:47] ========= drm_connector_dynamic_init (6 subtests) ==========
[13:36:47] [PASSED] drm_test_drm_connector_dynamic_init
[13:36:47] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[13:36:47] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[13:36:47] [PASSED] drm_test_drm_connector_dynamic_init_properties
[13:36:47] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[13:36:47] [PASSED] Unknown
[13:36:47] [PASSED] VGA
[13:36:47] [PASSED] DVI-I
[13:36:47] [PASSED] DVI-D
[13:36:47] [PASSED] DVI-A
[13:36:47] [PASSED] Composite
[13:36:47] [PASSED] SVIDEO
[13:36:47] [PASSED] LVDS
[13:36:47] [PASSED] Component
[13:36:47] [PASSED] DIN
[13:36:47] [PASSED] DP
[13:36:47] [PASSED] HDMI-A
[13:36:47] [PASSED] HDMI-B
[13:36:47] [PASSED] TV
[13:36:47] [PASSED] eDP
[13:36:47] [PASSED] Virtual
[13:36:47] [PASSED] DSI
[13:36:47] [PASSED] DPI
[13:36:47] [PASSED] Writeback
[13:36:47] [PASSED] SPI
[13:36:47] [PASSED] USB
[13:36:47] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[13:36:47] ======== drm_test_drm_connector_dynamic_init_name  =========
[13:36:47] [PASSED] Unknown
[13:36:47] [PASSED] VGA
[13:36:47] [PASSED] DVI-I
[13:36:47] [PASSED] DVI-D
[13:36:47] [PASSED] DVI-A
[13:36:47] [PASSED] Composite
[13:36:47] [PASSED] SVIDEO
[13:36:47] [PASSED] LVDS
[13:36:47] [PASSED] Component
[13:36:47] [PASSED] DIN
[13:36:47] [PASSED] DP
[13:36:47] [PASSED] HDMI-A
[13:36:47] [PASSED] HDMI-B
[13:36:47] [PASSED] TV
[13:36:47] [PASSED] eDP
[13:36:47] [PASSED] Virtual
[13:36:47] [PASSED] DSI
[13:36:47] [PASSED] DPI
[13:36:47] [PASSED] Writeback
[13:36:47] [PASSED] SPI
[13:36:47] [PASSED] USB
[13:36:47] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[13:36:47] =========== [PASSED] drm_connector_dynamic_init ============
[13:36:47] ==== drm_connector_dynamic_register_early (4 subtests) =====
[13:36:47] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[13:36:47] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[13:36:47] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[13:36:47] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[13:36:47] ====== [PASSED] drm_connector_dynamic_register_early =======
[13:36:47] ======= drm_connector_dynamic_register (7 subtests) ========
[13:36:47] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[13:36:47] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[13:36:47] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[13:36:47] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[13:36:47] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[13:36:47] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[13:36:47] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[13:36:47] ========= [PASSED] drm_connector_dynamic_register ==========
[13:36:47] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[13:36:47] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[13:36:47] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[13:36:47] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[13:36:47] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[13:36:47] ========== drm_test_get_tv_mode_from_name_valid  ===========
[13:36:47] [PASSED] NTSC
[13:36:47] [PASSED] NTSC-443
[13:36:47] [PASSED] NTSC-J
[13:36:47] [PASSED] PAL
[13:36:47] [PASSED] PAL-M
[13:36:47] [PASSED] PAL-N
[13:36:47] [PASSED] SECAM
[13:36:47] [PASSED] Mono
[13:36:47] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[13:36:47] [PASSED] drm_test_get_tv_mode_from_name_truncated
[13:36:47] ============ [PASSED] drm_get_tv_mode_from_name ============
[13:36:47] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[13:36:47] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[13:36:47] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[13:36:47] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[13:36:47] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[13:36:47] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[13:36:47] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[13:36:47] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[13:36:47] [PASSED] VIC 96
[13:36:47] [PASSED] VIC 97
[13:36:47] [PASSED] VIC 101
[13:36:47] [PASSED] VIC 102
[13:36:47] [PASSED] VIC 106
[13:36:47] [PASSED] VIC 107
[13:36:47] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[13:36:47] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[13:36:47] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[13:36:47] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[13:36:47] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[13:36:47] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[13:36:47] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[13:36:47] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[13:36:47] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[13:36:47] [PASSED] Automatic
[13:36:47] [PASSED] Full
[13:36:47] [PASSED] Limited 16:235
[13:36:47] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[13:36:47] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[13:36:47] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[13:36:47] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[13:36:47] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[13:36:47] [PASSED] RGB
[13:36:47] [PASSED] YUV 4:2:0
[13:36:47] [PASSED] YUV 4:2:2
[13:36:47] [PASSED] YUV 4:4:4
[13:36:47] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[13:36:47] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[13:36:47] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[13:36:47] ============= drm_damage_helper (21 subtests) ==============
[13:36:47] [PASSED] drm_test_damage_iter_no_damage
[13:36:47] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[13:36:47] [PASSED] drm_test_damage_iter_no_damage_src_moved
[13:36:47] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[13:36:47] [PASSED] drm_test_damage_iter_no_damage_not_visible
[13:36:47] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[13:36:47] [PASSED] drm_test_damage_iter_no_damage_no_fb
[13:36:47] [PASSED] drm_test_damage_iter_simple_damage
[13:36:47] [PASSED] drm_test_damage_iter_single_damage
[13:36:47] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[13:36:47] [PASSED] drm_test_damage_iter_single_damage_outside_src
[13:36:47] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[13:36:47] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[13:36:47] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[13:36:47] [PASSED] drm_test_damage_iter_single_damage_src_moved
[13:36:47] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[13:36:47] [PASSED] drm_test_damage_iter_damage
[13:36:47] [PASSED] drm_test_damage_iter_damage_one_intersect
[13:36:47] [PASSED] drm_test_damage_iter_damage_one_outside
[13:36:47] [PASSED] drm_test_damage_iter_damage_src_moved
[13:36:47] [PASSED] drm_test_damage_iter_damage_not_visible
[13:36:47] ================ [PASSED] drm_damage_helper ================
[13:36:47] ============== drm_dp_mst_helper (3 subtests) ==============
[13:36:47] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[13:36:47] [PASSED] Clock 154000 BPP 30 DSC disabled
[13:36:47] [PASSED] Clock 234000 BPP 30 DSC disabled
[13:36:47] [PASSED] Clock 297000 BPP 24 DSC disabled
[13:36:47] [PASSED] Clock 332880 BPP 24 DSC enabled
[13:36:47] [PASSED] Clock 324540 BPP 24 DSC enabled
[13:36:47] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[13:36:47] ============== drm_test_dp_mst_calc_pbn_div  ===============
[13:36:47] [PASSED] Link rate 2000000 lane count 4
[13:36:47] [PASSED] Link rate 2000000 lane count 2
[13:36:47] [PASSED] Link rate 2000000 lane count 1
[13:36:47] [PASSED] Link rate 1350000 lane count 4
[13:36:47] [PASSED] Link rate 1350000 lane count 2
[13:36:47] [PASSED] Link rate 1350000 lane count 1
[13:36:47] [PASSED] Link rate 1000000 lane count 4
[13:36:47] [PASSED] Link rate 1000000 lane count 2
[13:36:47] [PASSED] Link rate 1000000 lane count 1
[13:36:47] [PASSED] Link rate 810000 lane count 4
[13:36:47] [PASSED] Link rate 810000 lane count 2
[13:36:47] [PASSED] Link rate 810000 lane count 1
[13:36:47] [PASSED] Link rate 540000 lane count 4
[13:36:47] [PASSED] Link rate 540000 lane count 2
[13:36:47] [PASSED] Link rate 540000 lane count 1
[13:36:47] [PASSED] Link rate 270000 lane count 4
[13:36:47] [PASSED] Link rate 270000 lane count 2
[13:36:47] [PASSED] Link rate 270000 lane count 1
[13:36:47] [PASSED] Link rate 162000 lane count 4
[13:36:47] [PASSED] Link rate 162000 lane count 2
[13:36:47] [PASSED] Link rate 162000 lane count 1
[13:36:47] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[13:36:47] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[13:36:47] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[13:36:47] [PASSED] DP_POWER_UP_PHY with port number
[13:36:47] [PASSED] DP_POWER_DOWN_PHY with port number
[13:36:47] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[13:36:47] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[13:36:47] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[13:36:47] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[13:36:47] [PASSED] DP_QUERY_PAYLOAD with port number
[13:36:47] [PASSED] DP_QUERY_PAYLOAD with VCPI
[13:36:47] [PASSED] DP_REMOTE_DPCD_READ with port number
[13:36:47] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[13:36:47] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[13:36:47] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[13:36:47] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[13:36:47] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[13:36:47] [PASSED] DP_REMOTE_I2C_READ with port number
[13:36:47] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[13:36:47] [PASSED] DP_REMOTE_I2C_READ with transactions array
[13:36:47] [PASSED] DP_REMOTE_I2C_WRITE with port number
[13:36:47] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[13:36:47] [PASSED] DP_REMOTE_I2C_WRITE with data array
[13:36:47] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[13:36:47] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[13:36:47] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[13:36:47] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[13:36:47] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[13:36:47] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[13:36:47] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[13:36:47] ================ [PASSED] drm_dp_mst_helper ================
[13:36:47] ================== drm_exec (7 subtests) ===================
[13:36:47] [PASSED] sanitycheck
[13:36:47] [PASSED] test_lock
[13:36:47] [PASSED] test_lock_unlock
[13:36:47] [PASSED] test_duplicates
[13:36:47] [PASSED] test_prepare
[13:36:47] [PASSED] test_prepare_array
[13:36:47] [PASSED] test_multiple_loops
[13:36:47] ==================== [PASSED] drm_exec =====================
[13:36:47] =========== drm_format_helper_test (17 subtests) ===========
[13:36:47] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[13:36:47] [PASSED] single_pixel_source_buffer
[13:36:47] [PASSED] single_pixel_clip_rectangle
[13:36:47] [PASSED] well_known_colors
[13:36:47] [PASSED] destination_pitch
[13:36:47] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[13:36:47] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[13:36:47] [PASSED] single_pixel_source_buffer
[13:36:47] [PASSED] single_pixel_clip_rectangle
[13:36:47] [PASSED] well_known_colors
[13:36:47] [PASSED] destination_pitch
[13:36:47] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[13:36:47] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[13:36:47] [PASSED] single_pixel_source_buffer
[13:36:47] [PASSED] single_pixel_clip_rectangle
[13:36:47] [PASSED] well_known_colors
[13:36:47] [PASSED] destination_pitch
[13:36:47] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[13:36:47] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[13:36:47] [PASSED] single_pixel_source_buffer
[13:36:47] [PASSED] single_pixel_clip_rectangle
[13:36:47] [PASSED] well_known_colors
[13:36:47] [PASSED] destination_pitch
[13:36:47] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[13:36:47] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[13:36:47] [PASSED] single_pixel_source_buffer
[13:36:47] [PASSED] single_pixel_clip_rectangle
[13:36:47] [PASSED] well_known_colors
[13:36:47] [PASSED] destination_pitch
[13:36:47] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[13:36:47] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[13:36:47] [PASSED] single_pixel_source_buffer
[13:36:47] [PASSED] single_pixel_clip_rectangle
[13:36:47] [PASSED] well_known_colors
[13:36:47] [PASSED] destination_pitch
[13:36:47] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[13:36:47] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[13:36:47] [PASSED] single_pixel_source_buffer
[13:36:47] [PASSED] single_pixel_clip_rectangle
[13:36:47] [PASSED] well_known_colors
[13:36:47] [PASSED] destination_pitch
[13:36:47] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[13:36:47] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[13:36:47] [PASSED] single_pixel_source_buffer
[13:36:47] [PASSED] single_pixel_clip_rectangle
[13:36:47] [PASSED] well_known_colors
[13:36:47] [PASSED] destination_pitch
[13:36:47] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[13:36:47] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[13:36:47] [PASSED] single_pixel_source_buffer
[13:36:47] [PASSED] single_pixel_clip_rectangle
[13:36:47] [PASSED] well_known_colors
[13:36:47] [PASSED] destination_pitch
[13:36:47] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[13:36:47] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[13:36:47] [PASSED] single_pixel_source_buffer
[13:36:47] [PASSED] single_pixel_clip_rectangle
[13:36:47] [PASSED] well_known_colors
[13:36:47] [PASSED] destination_pitch
[13:36:47] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[13:36:47] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[13:36:47] [PASSED] single_pixel_source_buffer
[13:36:47] [PASSED] single_pixel_clip_rectangle
[13:36:47] [PASSED] well_known_colors
[13:36:47] [PASSED] destination_pitch
[13:36:47] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[13:36:47] ============== drm_test_fb_xrgb8888_to_mono  ===============
[13:36:47] [PASSED] single_pixel_source_buffer
[13:36:47] [PASSED] single_pixel_clip_rectangle
[13:36:47] [PASSED] well_known_colors
[13:36:47] [PASSED] destination_pitch
[13:36:47] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[13:36:47] ==================== drm_test_fb_swab  =====================
[13:36:47] [PASSED] single_pixel_source_buffer
[13:36:47] [PASSED] single_pixel_clip_rectangle
[13:36:47] [PASSED] well_known_colors
[13:36:47] [PASSED] destination_pitch
[13:36:47] ================ [PASSED] drm_test_fb_swab =================
[13:36:47] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[13:36:47] [PASSED] single_pixel_source_buffer
[13:36:47] [PASSED] single_pixel_clip_rectangle
[13:36:47] [PASSED] well_known_colors
[13:36:47] [PASSED] destination_pitch
[13:36:47] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[13:36:47] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[13:36:47] [PASSED] single_pixel_source_buffer
[13:36:47] [PASSED] single_pixel_clip_rectangle
[13:36:47] [PASSED] well_known_colors
[13:36:47] [PASSED] destination_pitch
[13:36:47] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[13:36:47] ================= drm_test_fb_clip_offset  =================
[13:36:47] [PASSED] pass through
[13:36:47] [PASSED] horizontal offset
[13:36:47] [PASSED] vertical offset
[13:36:47] [PASSED] horizontal and vertical offset
[13:36:47] [PASSED] horizontal offset (custom pitch)
[13:36:47] [PASSED] vertical offset (custom pitch)
[13:36:47] [PASSED] horizontal and vertical offset (custom pitch)
[13:36:47] ============= [PASSED] drm_test_fb_clip_offset =============
[13:36:47] =================== drm_test_fb_memcpy  ====================
[13:36:47] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[13:36:47] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[13:36:47] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[13:36:47] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[13:36:47] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[13:36:47] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[13:36:47] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[13:36:47] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[13:36:47] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[13:36:47] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[13:36:47] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[13:36:47] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[13:36:47] =============== [PASSED] drm_test_fb_memcpy ================
[13:36:47] ============= [PASSED] drm_format_helper_test ==============
[13:36:47] ================= drm_format (18 subtests) =================
[13:36:47] [PASSED] drm_test_format_block_width_invalid
[13:36:47] [PASSED] drm_test_format_block_width_one_plane
[13:36:47] [PASSED] drm_test_format_block_width_two_plane
[13:36:47] [PASSED] drm_test_format_block_width_three_plane
[13:36:47] [PASSED] drm_test_format_block_width_tiled
[13:36:47] [PASSED] drm_test_format_block_height_invalid
[13:36:47] [PASSED] drm_test_format_block_height_one_plane
[13:36:47] [PASSED] drm_test_format_block_height_two_plane
[13:36:47] [PASSED] drm_test_format_block_height_three_plane
[13:36:47] [PASSED] drm_test_format_block_height_tiled
[13:36:47] [PASSED] drm_test_format_min_pitch_invalid
[13:36:47] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[13:36:47] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[13:36:47] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[13:36:47] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[13:36:47] [PASSED] drm_test_format_min_pitch_two_plane
[13:36:47] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[13:36:47] [PASSED] drm_test_format_min_pitch_tiled
[13:36:47] =================== [PASSED] drm_format ====================
[13:36:47] ============== drm_framebuffer (10 subtests) ===============
[13:36:47] ========== drm_test_framebuffer_check_src_coords  ==========
[13:36:47] [PASSED] Success: source fits into fb
[13:36:47] [PASSED] Fail: overflowing fb with x-axis coordinate
[13:36:47] [PASSED] Fail: overflowing fb with y-axis coordinate
[13:36:47] [PASSED] Fail: overflowing fb with source width
[13:36:47] [PASSED] Fail: overflowing fb with source height
[13:36:47] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[13:36:47] [PASSED] drm_test_framebuffer_cleanup
[13:36:47] =============== drm_test_framebuffer_create  ===============
[13:36:47] [PASSED] ABGR8888 normal sizes
[13:36:47] [PASSED] ABGR8888 max sizes
[13:36:47] [PASSED] ABGR8888 pitch greater than min required
[13:36:47] [PASSED] ABGR8888 pitch less than min required
[13:36:47] [PASSED] ABGR8888 Invalid width
[13:36:47] [PASSED] ABGR8888 Invalid buffer handle
[13:36:47] [PASSED] No pixel format
[13:36:47] [PASSED] ABGR8888 Width 0
[13:36:47] [PASSED] ABGR8888 Height 0
[13:36:47] [PASSED] ABGR8888 Out of bound height * pitch combination
[13:36:47] [PASSED] ABGR8888 Large buffer offset
[13:36:47] [PASSED] ABGR8888 Buffer offset for inexistent plane
[13:36:47] [PASSED] ABGR8888 Invalid flag
[13:36:47] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[13:36:47] [PASSED] ABGR8888 Valid buffer modifier
[13:36:47] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[13:36:47] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[13:36:47] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[13:36:47] [PASSED] NV12 Normal sizes
[13:36:47] [PASSED] NV12 Max sizes
[13:36:47] [PASSED] NV12 Invalid pitch
[13:36:47] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[13:36:47] [PASSED] NV12 different  modifier per-plane
[13:36:47] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[13:36:47] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[13:36:47] [PASSED] NV12 Modifier for inexistent plane
[13:36:47] [PASSED] NV12 Handle for inexistent plane
[13:36:47] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[13:36:47] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[13:36:47] [PASSED] YVU420 Normal sizes
[13:36:47] [PASSED] YVU420 Max sizes
[13:36:47] [PASSED] YVU420 Invalid pitch
[13:36:47] [PASSED] YVU420 Different pitches
[13:36:47] [PASSED] YVU420 Different buffer offsets/pitches
[13:36:47] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[13:36:47] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[13:36:47] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[13:36:47] [PASSED] YVU420 Valid modifier
[13:36:47] [PASSED] YVU420 Different modifiers per plane
[13:36:47] [PASSED] YVU420 Modifier for inexistent plane
[13:36:47] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[13:36:47] [PASSED] X0L2 Normal sizes
[13:36:47] [PASSED] X0L2 Max sizes
[13:36:47] [PASSED] X0L2 Invalid pitch
[13:36:47] [PASSED] X0L2 Pitch greater than minimum required
[13:36:47] [PASSED] X0L2 Handle for inexistent plane
[13:36:47] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[13:36:47] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[13:36:47] [PASSED] X0L2 Valid modifier
[13:36:47] [PASSED] X0L2 Modifier for inexistent plane
[13:36:47] =========== [PASSED] drm_test_framebuffer_create ===========
[13:36:47] [PASSED] drm_test_framebuffer_free
[13:36:47] [PASSED] drm_test_framebuffer_init
[13:36:47] [PASSED] drm_test_framebuffer_init_bad_format
[13:36:47] [PASSED] drm_test_framebuffer_init_dev_mismatch
[13:36:47] [PASSED] drm_test_framebuffer_lookup
[13:36:47] [PASSED] drm_test_framebuffer_lookup_inexistent
[13:36:47] [PASSED] drm_test_framebuffer_modifiers_not_supported
[13:36:47] ================= [PASSED] drm_framebuffer =================
[13:36:47] ================ drm_gem_shmem (8 subtests) ================
[13:36:47] [PASSED] drm_gem_shmem_test_obj_create
[13:36:47] [PASSED] drm_gem_shmem_test_obj_create_private
[13:36:47] [PASSED] drm_gem_shmem_test_pin_pages
[13:36:47] [PASSED] drm_gem_shmem_test_vmap
[13:36:47] [PASSED] drm_gem_shmem_test_get_sg_table
[13:36:47] [PASSED] drm_gem_shmem_test_get_pages_sgt
[13:36:47] [PASSED] drm_gem_shmem_test_madvise
[13:36:47] [PASSED] drm_gem_shmem_test_purge
[13:36:47] ================== [PASSED] drm_gem_shmem ==================
[13:36:47] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[13:36:47] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[13:36:47] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[13:36:47] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[13:36:47] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[13:36:47] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[13:36:47] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[13:36:47] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[13:36:47] [PASSED] Automatic
[13:36:47] [PASSED] Full
[13:36:47] [PASSED] Limited 16:235
[13:36:47] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[13:36:47] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[13:36:47] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[13:36:47] [PASSED] drm_test_check_disable_connector
[13:36:47] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[13:36:47] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[13:36:47] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[13:36:47] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[13:36:47] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[13:36:47] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[13:36:47] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[13:36:47] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[13:36:47] [PASSED] drm_test_check_output_bpc_dvi
[13:36:47] [PASSED] drm_test_check_output_bpc_format_vic_1
[13:36:47] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[13:36:47] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[13:36:47] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[13:36:47] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[13:36:47] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[13:36:47] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[13:36:47] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[13:36:47] ============ drm_test_check_hdmi_color_format  =============
[13:36:47] [PASSED] AUTO -> RGB
[13:36:47] [PASSED] YCBCR422 -> YUV422
[13:36:47] [PASSED] YCBCR420 -> YUV420
[13:36:47] [PASSED] YCBCR444 -> YUV444
[13:36:47] [PASSED] RGB -> RGB
[13:36:47] ======== [PASSED] drm_test_check_hdmi_color_format =========
[13:36:47] ======== drm_test_check_hdmi_color_format_420_only  ========
[13:36:47] [PASSED] RGB should fail
[13:36:47] [PASSED] YUV444 should fail
[13:36:47] [PASSED] YUV422 should fail
[13:36:47] [PASSED] YUV420 should work
[13:36:47] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[13:36:47] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[13:36:47] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[13:36:47] [PASSED] drm_test_check_broadcast_rgb_value
[13:36:47] [PASSED] drm_test_check_bpc_8_value
[13:36:47] [PASSED] drm_test_check_bpc_10_value
[13:36:47] [PASSED] drm_test_check_bpc_12_value
[13:36:47] [PASSED] drm_test_check_format_value
[13:36:47] [PASSED] drm_test_check_tmds_char_value
[13:36:47] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[13:36:47] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[13:36:47] [PASSED] drm_test_check_mode_valid
[13:36:47] [PASSED] drm_test_check_mode_valid_reject
[13:36:47] [PASSED] drm_test_check_mode_valid_reject_rate
[13:36:47] [PASSED] drm_test_check_mode_valid_reject_max_clock
[13:36:47] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[13:36:47] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[13:36:47] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[13:36:47] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[13:36:47] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[13:36:47] [PASSED] drm_test_check_infoframes
[13:36:47] [PASSED] drm_test_check_reject_avi_infoframe
[13:36:47] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[13:36:47] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[13:36:47] [PASSED] drm_test_check_reject_audio_infoframe
[13:36:47] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[13:36:47] ================= drm_managed (2 subtests) =================
[13:36:47] [PASSED] drm_test_managed_release_action
[13:36:47] [PASSED] drm_test_managed_run_action
[13:36:47] =================== [PASSED] drm_managed ===================
[13:36:47] =================== drm_mm (6 subtests) ====================
[13:36:47] [PASSED] drm_test_mm_init
[13:36:47] [PASSED] drm_test_mm_debug
[13:36:47] [PASSED] drm_test_mm_align32
[13:36:47] [PASSED] drm_test_mm_align64
[13:36:47] [PASSED] drm_test_mm_lowest
[13:36:47] [PASSED] drm_test_mm_highest
[13:36:47] ===================== [PASSED] drm_mm ======================
[13:36:47] ============= drm_modes_analog_tv (5 subtests) =============
[13:36:47] [PASSED] drm_test_modes_analog_tv_mono_576i
[13:36:47] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[13:36:47] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[13:36:47] [PASSED] drm_test_modes_analog_tv_pal_576i
[13:36:47] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[13:36:47] =============== [PASSED] drm_modes_analog_tv ===============
[13:36:47] ============== drm_panic_helper (3 subtests) ===============
[13:36:47] ============= drm_test_panic_screen_user_map  ==============
[13:36:47] [PASSED] Panic screen user, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[13:36:47] [PASSED] Panic screen user, mode: 494 x 494 	XR24 little-endian (0x34325258)
[13:36:47] [PASSED] Panic screen user, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[13:36:47] [PASSED] Panic screen user, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[13:36:47] [PASSED] Panic screen user, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[13:36:47] [PASSED] Panic screen kmsg, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[13:36:47] [PASSED] Panic screen kmsg, mode: 494 x 494 	XR24 little-endian (0x34325258)
[13:36:47] [PASSED] Panic screen kmsg, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[13:36:48] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[13:36:48] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[13:36:48] ========= [PASSED] drm_test_panic_screen_user_map ==========
[13:36:48] ============= drm_test_panic_screen_user_page  =============
[13:36:48] [PASSED] Panic screen user, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[13:36:48] [PASSED] Panic screen user, mode: 494 x 494 	XR24 little-endian (0x34325258)
[13:36:48] [PASSED] Panic screen user, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[13:36:48] [PASSED] Panic screen user, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[13:36:48] [PASSED] Panic screen user, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[13:36:48] [PASSED] Panic screen kmsg, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[13:36:48] [PASSED] Panic screen kmsg, mode: 494 x 494 	XR24 little-endian (0x34325258)
[13:36:48] [PASSED] Panic screen kmsg, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[13:36:48] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[13:36:48] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[13:36:48] ========= [PASSED] drm_test_panic_screen_user_page =========
[13:36:48] ========== drm_test_panic_screen_user_set_pixel  ===========
[13:36:48] [PASSED] Panic screen user, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[13:36:48] [PASSED] Panic screen user, mode: 494 x 494 	XR24 little-endian (0x34325258)
[13:36:48] [PASSED] Panic screen user, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[13:36:48] [PASSED] Panic screen user, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[13:36:48] [PASSED] Panic screen user, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[13:36:48] [PASSED] Panic screen kmsg, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[13:36:48] [PASSED] Panic screen kmsg, mode: 494 x 494 	XR24 little-endian (0x34325258)
[13:36:48] [PASSED] Panic screen kmsg, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[13:36:48] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[13:36:48] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[13:36:48] ====== [PASSED] drm_test_panic_screen_user_set_pixel =======
[13:36:48] ================ [PASSED] drm_panic_helper =================
[13:36:48] ============== drm_plane_helper (2 subtests) ===============
[13:36:48] =============== drm_test_check_plane_state  ================
[13:36:48] [PASSED] clipping_simple
[13:36:48] [PASSED] clipping_rotate_reflect
[13:36:48] [PASSED] positioning_simple
[13:36:48] [PASSED] upscaling
[13:36:48] [PASSED] downscaling
[13:36:48] [PASSED] rounding1
[13:36:48] [PASSED] rounding2
[13:36:48] [PASSED] rounding3
[13:36:48] [PASSED] rounding4
[13:36:48] =========== [PASSED] drm_test_check_plane_state ============
[13:36:48] =========== drm_test_check_invalid_plane_state  ============
[13:36:48] [PASSED] positioning_invalid
[13:36:48] [PASSED] upscaling_invalid
[13:36:48] [PASSED] downscaling_invalid
[13:36:48] ======= [PASSED] drm_test_check_invalid_plane_state ========
[13:36:48] ================ [PASSED] drm_plane_helper =================
[13:36:48] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[13:36:48] ====== drm_test_connector_helper_tv_get_modes_check  =======
[13:36:48] [PASSED] None
[13:36:48] [PASSED] PAL
[13:36:48] [PASSED] NTSC
[13:36:48] [PASSED] Both, NTSC Default
[13:36:48] [PASSED] Both, PAL Default
[13:36:48] [PASSED] Both, NTSC Default, with PAL on command-line
[13:36:48] [PASSED] Both, PAL Default, with NTSC on command-line
[13:36:48] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[13:36:48] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[13:36:48] ================== drm_rect (9 subtests) ===================
[13:36:48] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[13:36:48] [PASSED] drm_test_rect_clip_scaled_not_clipped
[13:36:48] [PASSED] drm_test_rect_clip_scaled_clipped
[13:36:48] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[13:36:48] ================= drm_test_rect_intersect  =================
[13:36:48] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[13:36:48] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[13:36:48] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[13:36:48] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[13:36:48] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[13:36:48] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[13:36:48] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[13:36:48] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[13:36:48] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[13:36:48] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[13:36:48] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[13:36:48] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[13:36:48] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[13:36:48] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[13:36:48] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[13:36:48] ============= [PASSED] drm_test_rect_intersect =============
[13:36:48] ================ drm_test_rect_calc_hscale  ================
[13:36:48] [PASSED] normal use
[13:36:48] [PASSED] out of max range
[13:36:48] [PASSED] out of min range
[13:36:48] [PASSED] zero dst
[13:36:48] [PASSED] negative src
[13:36:48] [PASSED] negative dst
[13:36:48] ============ [PASSED] drm_test_rect_calc_hscale ============
[13:36:48] ================ drm_test_rect_calc_vscale  ================
[13:36:48] [PASSED] normal use
[13:36:48] [PASSED] out of max range
[13:36:48] [PASSED] out of min range
[13:36:48] [PASSED] zero dst
[13:36:48] [PASSED] negative src
[13:36:48] [PASSED] negative dst
[13:36:48] ============ [PASSED] drm_test_rect_calc_vscale ============
[13:36:48] ================== drm_test_rect_rotate  ===================
[13:36:48] [PASSED] reflect-x
[13:36:48] [PASSED] reflect-y
[13:36:48] [PASSED] rotate-0
[13:36:48] [PASSED] rotate-90
[13:36:48] [PASSED] rotate-180
[13:36:48] [PASSED] rotate-270
[13:36:48] ============== [PASSED] drm_test_rect_rotate ===============
[13:36:48] ================ drm_test_rect_rotate_inv  =================
[13:36:48] [PASSED] reflect-x
[13:36:48] [PASSED] reflect-y
[13:36:48] [PASSED] rotate-0
[13:36:48] [PASSED] rotate-90
[13:36:48] [PASSED] rotate-180
[13:36:48] [PASSED] rotate-270
[13:36:48] ============ [PASSED] drm_test_rect_rotate_inv =============
[13:36:48] ==================== [PASSED] drm_rect =====================
[13:36:48] ============ drm_sysfb_modeset_test (1 subtest) ============
[13:36:48] ============ drm_test_sysfb_build_fourcc_list  =============
[13:36:48] [PASSED] no native formats
[13:36:48] [PASSED] XRGB8888 as native format
[13:36:48] [PASSED] remove duplicates
[13:36:48] [PASSED] convert alpha formats
[13:36:48] [PASSED] random formats
[13:36:48] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[13:36:48] ============= [PASSED] drm_sysfb_modeset_test ==============
[13:36:48] ================== drm_fixp (2 subtests) ===================
[13:36:48] [PASSED] drm_test_int2fixp
[13:36:48] [PASSED] drm_test_sm2fixp
[13:36:48] ==================== [PASSED] drm_fixp =====================
[13:36:48] ============================================================
[13:36:48] Testing complete. Ran 667 tests: passed: 667
[13:36:48] Elapsed time: 27.228s total, 1.906s configuring, 24.906s building, 0.398s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[13:36:48] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[13:36:50] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[13:37:00] Starting KUnit Kernel (1/1)...
[13:37:00] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[13:37:00] ================= ttm_device (5 subtests) ==================
[13:37:00] [PASSED] ttm_device_init_basic
[13:37:00] [PASSED] ttm_device_init_multiple
[13:37:00] [PASSED] ttm_device_fini_basic
[13:37:00] [PASSED] ttm_device_init_no_vma_man
[13:37:00] ================== ttm_device_init_pools  ==================
[13:37:00] [PASSED] No DMA allocations, no DMA32 required
[13:37:00] [PASSED] DMA allocations, DMA32 required
[13:37:00] [PASSED] No DMA allocations, DMA32 required
[13:37:00] [PASSED] DMA allocations, no DMA32 required
[13:37:00] ============== [PASSED] ttm_device_init_pools ==============
[13:37:00] =================== [PASSED] ttm_device ====================
[13:37:00] ================== ttm_pool (8 subtests) ===================
[13:37:00] ================== ttm_pool_alloc_basic  ===================
[13:37:00] [PASSED] One page
[13:37:00] [PASSED] More than one page
[13:37:00] [PASSED] Above the allocation limit
[13:37:00] [PASSED] One page, with coherent DMA mappings enabled
[13:37:00] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[13:37:00] ============== [PASSED] ttm_pool_alloc_basic ===============
[13:37:00] ============== ttm_pool_alloc_basic_dma_addr  ==============
[13:37:00] [PASSED] One page
[13:37:00] [PASSED] More than one page
[13:37:00] [PASSED] Above the allocation limit
[13:37:00] [PASSED] One page, with coherent DMA mappings enabled
[13:37:00] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[13:37:00] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[13:37:00] [PASSED] ttm_pool_alloc_order_caching_match
[13:37:00] [PASSED] ttm_pool_alloc_caching_mismatch
[13:37:00] [PASSED] ttm_pool_alloc_order_mismatch
[13:37:00] [PASSED] ttm_pool_free_dma_alloc
[13:37:00] [PASSED] ttm_pool_free_no_dma_alloc
[13:37:00] [PASSED] ttm_pool_fini_basic
[13:37:00] ==================== [PASSED] ttm_pool =====================
[13:37:00] ================ ttm_resource (8 subtests) =================
[13:37:00] ================= ttm_resource_init_basic  =================
[13:37:00] [PASSED] Init resource in TTM_PL_SYSTEM
[13:37:00] [PASSED] Init resource in TTM_PL_VRAM
[13:37:00] [PASSED] Init resource in a private placement
[13:37:00] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[13:37:00] ============= [PASSED] ttm_resource_init_basic =============
[13:37:00] [PASSED] ttm_resource_init_pinned
[13:37:00] [PASSED] ttm_resource_fini_basic
[13:37:00] [PASSED] ttm_resource_manager_init_basic
[13:37:00] [PASSED] ttm_resource_manager_usage_basic
[13:37:00] [PASSED] ttm_resource_manager_set_used_basic
[13:37:00] [PASSED] ttm_sys_man_alloc_basic
[13:37:00] [PASSED] ttm_sys_man_free_basic
[13:37:00] ================== [PASSED] ttm_resource ===================
[13:37:00] =================== ttm_tt (15 subtests) ===================
[13:37:00] ==================== ttm_tt_init_basic  ====================
[13:37:00] [PASSED] Page-aligned size
[13:37:00] [PASSED] Extra pages requested
[13:37:00] ================ [PASSED] ttm_tt_init_basic ================
[13:37:00] [PASSED] ttm_tt_init_misaligned
[13:37:00] [PASSED] ttm_tt_fini_basic
[13:37:00] [PASSED] ttm_tt_fini_sg
[13:37:00] [PASSED] ttm_tt_fini_shmem
[13:37:00] [PASSED] ttm_tt_create_basic
[13:37:00] [PASSED] ttm_tt_create_invalid_bo_type
[13:37:00] [PASSED] ttm_tt_create_ttm_exists
[13:37:00] [PASSED] ttm_tt_create_failed
[13:37:00] [PASSED] ttm_tt_destroy_basic
[13:37:00] [PASSED] ttm_tt_populate_null_ttm
[13:37:00] [PASSED] ttm_tt_populate_populated_ttm
[13:37:00] [PASSED] ttm_tt_unpopulate_basic
[13:37:00] [PASSED] ttm_tt_unpopulate_empty_ttm
[13:37:00] [PASSED] ttm_tt_swapin_basic
[13:37:00] ===================== [PASSED] ttm_tt ======================
[13:37:00] =================== ttm_bo (14 subtests) ===================
[13:37:00] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[13:37:00] [PASSED] Cannot be interrupted and sleeps
[13:37:00] [PASSED] Cannot be interrupted, locks straight away
[13:37:00] [PASSED] Can be interrupted, sleeps
[13:37:00] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[13:37:00] [PASSED] ttm_bo_reserve_locked_no_sleep
[13:37:00] [PASSED] ttm_bo_reserve_no_wait_ticket
[13:37:00] [PASSED] ttm_bo_reserve_double_resv
[13:37:00] [PASSED] ttm_bo_reserve_interrupted
[13:37:00] [PASSED] ttm_bo_reserve_deadlock
[13:37:00] [PASSED] ttm_bo_unreserve_basic
[13:37:00] [PASSED] ttm_bo_unreserve_pinned
[13:37:00] [PASSED] ttm_bo_unreserve_bulk
[13:37:00] [PASSED] ttm_bo_fini_basic
[13:37:00] [PASSED] ttm_bo_fini_shared_resv
[13:37:00] [PASSED] ttm_bo_pin_basic
[13:37:00] [PASSED] ttm_bo_pin_unpin_resource
[13:37:00] [PASSED] ttm_bo_multiple_pin_one_unpin
[13:37:00] ===================== [PASSED] ttm_bo ======================
[13:37:00] ============== ttm_bo_validate (22 subtests) ===============
[13:37:00] ============== ttm_bo_init_reserved_sys_man  ===============
[13:37:00] [PASSED] Buffer object for userspace
[13:37:00] [PASSED] Kernel buffer object
[13:37:00] [PASSED] Shared buffer object
[13:37:00] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[13:37:00] ============== ttm_bo_init_reserved_mock_man  ==============
[13:37:00] [PASSED] Buffer object for userspace
[13:37:00] [PASSED] Kernel buffer object
[13:37:00] [PASSED] Shared buffer object
[13:37:00] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[13:37:00] [PASSED] ttm_bo_init_reserved_resv
[13:37:00] ================== ttm_bo_validate_basic  ==================
[13:37:00] [PASSED] Buffer object for userspace
[13:37:00] [PASSED] Kernel buffer object
[13:37:00] [PASSED] Shared buffer object
[13:37:00] ============== [PASSED] ttm_bo_validate_basic ==============
[13:37:00] [PASSED] ttm_bo_validate_invalid_placement
[13:37:00] ============= ttm_bo_validate_same_placement  ==============
[13:37:00] [PASSED] System manager
[13:37:00] [PASSED] VRAM manager
[13:37:00] ========= [PASSED] ttm_bo_validate_same_placement ==========
[13:37:00] [PASSED] ttm_bo_validate_failed_alloc
[13:37:00] [PASSED] ttm_bo_validate_pinned
[13:37:00] [PASSED] ttm_bo_validate_busy_placement
[13:37:00] ================ ttm_bo_validate_multihop  =================
[13:37:00] [PASSED] Buffer object for userspace
[13:37:00] [PASSED] Kernel buffer object
[13:37:00] [PASSED] Shared buffer object
[13:37:00] ============ [PASSED] ttm_bo_validate_multihop =============
[13:37:00] ========== ttm_bo_validate_no_placement_signaled  ==========
[13:37:00] [PASSED] Buffer object in system domain, no page vector
[13:37:00] [PASSED] Buffer object in system domain with an existing page vector
[13:37:00] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[13:37:00] ======== ttm_bo_validate_no_placement_not_signaled  ========
[13:37:00] [PASSED] Buffer object for userspace
[13:37:00] [PASSED] Kernel buffer object
[13:37:00] [PASSED] Shared buffer object
[13:37:00] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[13:37:00] [PASSED] ttm_bo_validate_move_fence_signaled
[13:37:00] ========= ttm_bo_validate_move_fence_not_signaled  =========
[13:37:00] [PASSED] Waits for GPU
[13:37:00] [PASSED] Tries to lock straight away
[13:37:00] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[13:37:00] [PASSED] ttm_bo_validate_swapout
[13:37:00] [PASSED] ttm_bo_validate_happy_evict
[13:37:00] [PASSED] ttm_bo_validate_all_pinned_evict
[13:37:00] [PASSED] ttm_bo_validate_allowed_only_evict
[13:37:00] [PASSED] ttm_bo_validate_deleted_evict
[13:37:00] [PASSED] ttm_bo_validate_busy_domain_evict
[13:37:00] [PASSED] ttm_bo_validate_evict_gutting
[13:37:00] [PASSED] ttm_bo_validate_recrusive_evict
[13:37:00] ================= [PASSED] ttm_bo_validate =================
[13:37:00] ============================================================
[13:37:00] Testing complete. Ran 102 tests: passed: 102
[13:37:00] Elapsed time: 12.039s total, 1.854s configuring, 9.970s building, 0.184s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/dma-buf/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/dma-buf/.kunitconfig
[13:37:00] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[13:37:02] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[13:37:10] Starting KUnit Kernel (1/1)...
[13:37:10] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[13:37:11] =============== dma-buf-fence (12 subtests) ================
[13:37:11] [PASSED] test_sanitycheck
[13:37:11] [PASSED] test_signaling
[13:37:11] [PASSED] test_add_callback
[13:37:11] [PASSED] test_late_add_callback
[13:37:11] [PASSED] test_rm_callback
[13:37:11] [PASSED] test_late_rm_callback
[13:37:11] [PASSED] test_status
[13:37:11] [PASSED] test_error
[13:37:11] [PASSED] test_wait
[13:37:11] [PASSED] test_wait_timeout
[13:37:11] [PASSED] test_stub
[13:37:11] [SKIPPED] test_race_signal_callback (requires at least 2 CPUs)
[13:37:11] ================== [PASSED] dma-buf-fence ==================
[13:37:11] ============ dma-buf-fence-chain (11 subtests) =============
[13:37:11] [PASSED] test_sanitycheck
[13:37:11] [PASSED] test_find_seqno
[13:37:11] [PASSED] test_find_signaled
[13:37:11] [PASSED] test_find_out_of_order
[13:37:16] [PASSED] test_find_gap
[13:37:16] [PASSED] test_find_race
[13:37:16] [PASSED] test_signal_forward
[13:37:16] [PASSED] test_signal_backward
[13:37:16] [PASSED] test_wait_forward
[13:37:16] [PASSED] test_wait_backward
[13:37:16] [PASSED] test_wait_random
[13:37:16] =============== [PASSED] dma-buf-fence-chain ===============
[13:37:16] ============ dma-buf-fence-unwrap (11 subtests) ============
[13:37:16] [PASSED] test_sanitycheck
[13:37:16] [PASSED] test_unwrap_array
[13:37:16] [PASSED] test_unwrap_chain
[13:37:16] [PASSED] test_unwrap_chain_array
[13:37:16] [PASSED] test_unwrap_merge
[13:37:16] [PASSED] test_unwrap_merge_duplicate
[13:37:16] [PASSED] test_unwrap_merge_seqno
[13:37:16] [PASSED] test_unwrap_merge_order
[13:37:16] [PASSED] test_unwrap_merge_complex
[13:37:16] [PASSED] test_unwrap_merge_complex_seqno
[13:37:16] [PASSED] test_dedup_empty
[13:37:16] ============== [PASSED] dma-buf-fence-unwrap ===============
[13:37:16] ================ dma-buf-resv (5 subtests) =================
[13:37:16] [PASSED] test_sanitycheck
[13:37:16] ===================== test_signaling  ======================
[13:37:16] [PASSED] kernel
[13:37:16] [PASSED] write
[13:37:16] [PASSED] read
[13:37:16] [PASSED] bookkeep
[13:37:16] ================= [PASSED] test_signaling ==================
[13:37:16] ====================== test_for_each  ======================
[13:37:16] [PASSED] kernel
[13:37:16] [PASSED] write
[13:37:16] [PASSED] read
[13:37:16] [PASSED] bookkeep
[13:37:16] ================== [PASSED] test_for_each ==================
[13:37:16] ================= test_for_each_unlocked  ==================
[13:37:16] [PASSED] kernel
[13:37:16] [PASSED] write
[13:37:16] [PASSED] read
[13:37:16] [PASSED] bookkeep
[13:37:16] ============= [PASSED] test_for_each_unlocked ==============
[13:37:16] ===================== test_get_fences  =====================
[13:37:16] [PASSED] kernel
[13:37:16] [PASSED] write
[13:37:16] [PASSED] read
[13:37:16] [PASSED] bookkeep
[13:37:16] ================= [PASSED] test_get_fences =================
[13:37:16] ================== [PASSED] dma-buf-resv ===================
[13:37:16] ============================================================
[13:37:16] Testing complete. Ran 51 tests: passed: 50, skipped: 1
[13:37:16] Elapsed time: 15.859s total, 1.826s configuring, 8.662s building, 5.338s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel



^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PATCH v2 4/6] drm/xe/cper: Support software CPER records
  2026-10-29 13:26 ` [PATCH v2 4/6] drm/xe/cper: Support software CPER records Mallesh Koujalagi
@ 2026-10-29 13:37   ` sashiko-bot
  0 siblings, 0 replies; 11+ messages in thread
From: sashiko-bot @ 2026-10-29 13:37 UTC (permalink / raw)
  To: Mallesh Koujalagi, intel-xe

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [High] drm/xe/cper: sleeping in atomic context in cper_emit_sw_err()
- [High] drm/xe/cper: NULL pointer dereference in cper_emit_sw_err() when xe is NULL
--

commit c16a87d05ae708e1a17ac24623a75a82d558972b
Author: Mallesh Koujalagi <mallesh.koujalagi@intel.com>

drm/xe/cper: Support software CPER records

This commit adds support for handling software SIGIDs in xe_cper_emit() by
formatting the log message and emitting driver-notification CPER records via
cper_emit_sw_err().

> diff --git a/drivers/gpu/drm/xe/xe_cper.c b/drivers/gpu/drm/xe/xe_cper.c
> index e802f534eb45a..ec61605d0a314 100644
> --- a/drivers/gpu/drm/xe/xe_cper.c
> +++ b/drivers/gpu/drm/xe/xe_cper.c

[ ... ]

> @@ -239,6 +246,37 @@ static void cper_emit_hw_err(struct xe_device *xe, int cper_sev, enum xe_sigid s
>  	xe_cper_emit_counter(xe, cper_sev, sigid, counter, &response);
>  }
>  
> +#define XE_CPER_SW_MSG_MAX	256
> +
> +static size_t cper_format_sw_msg(struct va_format *vaf, char *buf, size_t size)
> +{
> +	return scnprintf(buf, size, "%pV", vaf) + 1;
> +}
> +
> +static void cper_emit_sw_err(struct xe_device *xe, int cper_sev, enum xe_sigid sigid,
> +			     u32 component, u32 location, const void *data,
> +			     struct va_format *vaf)
> +{
> +	struct xe_cper_intel_hdr ihdr = {};
> +	struct xe_cper_driver_error_class *driver = &ihdr.driver;
> +	u64 timestamp = ktime_get_boottime_ns();
> +	char msg[XE_CPER_SW_MSG_MAX];
> +	size_t msg_len;
> +
> +	might_sleep();
> +
> +	driver->error_type = cper_sev;
> +	driver->error_component = component;
> +	driver->tile = location;
> +	if (IS_ERR(data))
> +		driver->cause = -PTR_ERR(data);
> +
> +	msg_len = cper_format_sw_msg(vaf, msg, sizeof(msg));
> +
> +	cper_init_intel_hdr(xe, timestamp, sigid, 1, &ihdr);
> +	cper_record_emit(xe, cper_sev, &INTEL_CPER_NOTIFY_DRV_ERROR, &ihdr, msg, msg_len);
> +}

[Severity: High]
Can cper_emit_sw_err() sleep in atomic context when software SIGIDs are
logged?

In drivers/gpu/drm/xe/xe_log.c, __xe_log_emit() unconditionally calls
log_emit_cper() -> xe_cper_emit(). With this change, software SIGIDs are
routed to cper_emit_sw_err(), which calls might_sleep() and then calls
cper_record_emit() in drivers/gpu/drm/xe/xe_cper.c:

    total_len = sizeof(struct xe_cper_nonstd_record) + einfo_len;
    rec = kzalloc(total_len, GFP_KERNEL);

However, several paths in the driver emit software SIGID logs from hardirq
context, while holding spinlocks, or with preemption disabled:

1. In drivers/gpu/drm/xe/xe_guc_ct.c, xe_guc_ct_fast_path() runs from the
interrupt handler under xe->irq.lock and ct->fast_lock:

    spin_lock(&ct->fast_lock);
    do {
        len = g2h_read(ct, ct->fast_msg, true);
        if (len > 0)
            g2h_fast_path(ct, ct->fast_msg, len);
    } while (len > 0);
    spin_unlock(&ct->fast_lock);

Within this critical section (as well as in g2h_release_space(),
dequeue_one_g2h(), and __guc_ct_send_locked() while holding ct->fast_lock),
g2h_read() -> ct_corrupted() and g2h_fast_path() -> __g2h_release_space()
call xe_log_err() for the GuC component:

    xe_log_err(ct_to_gt(ct), GUC, err, "CT: %pV", &vaf);

2. In drivers/gpu/drm/xe/xe_pagefault.c, xe_pagefault_handler() (called from
hardirq context via xe_guc_ct_fast_path()) and xe_pagefault_queue_pop() hold
pf_queue->lock and call xe_pagefault_queue_add():

    guard(spinlock_irqsave)(&pf_queue->lock);

    empty = xe_pagefault_queue_empty(pf_queue);
    lpf = xe_pagefault_queue_add(pf_queue, pf);

When the queue is full, xe_pagefault_queue_add() calls:

    if (WARN_ON_ONCE(xe_pagefault_queue_full(pf_queue))) {
        xe_log_err(xe, PAGEFAULT, -ENOSPC, "Queue full!\n");
        return NULL;
    }

3. In drivers/gpu/drm/xe/xe_wedge.c, xe_wedge_declare() is documented as safe
for atomic callers and is invoked from hardirq context via
dg1_irq_handler() -> xe_mert_irq_handler() -> mert_handle_cat_error():

    xe_log_err_fatal(xe, WEDGED, -EIO, "Device declared wedged!\n");

4. In drivers/gpu/drm/xe/xe_pcode.c, xe_pcode_request() disables preemption
around pcode_try_request() -> pcode_mailbox_rw() -> __pcode_mailbox_rw() ->
pcode_mailbox_status(), which logs PCODE errors via xe_log_err():

    preempt_disable();
    ret = pcode_try_request(tile, mbox, request, reply_mask, reply, &status,
                            true, 50 * 1000, true);
    preempt_enable();

> +
>  /**
>   * xe_cper_emit() - Emit a CPER record for a SIGID log entry
>   * @xe: The &xe_device
> @@ -272,7 +310,8 @@ void xe_cper_emit(struct xe_device *xe, int cper_sev, enum xe_sigid sigid,
>  		return;
>  	}
>  
> -	/* TODO software CPER */
> +	if (is_sw_sigid(sigid))
> +		cper_emit_sw_err(xe, cper_sev, sigid, component, location, data, vaf);
>  }

[Severity: High]
Could this dereference a null xe pointer when xe_cper_emit() is called during
early PCI probe?

In drivers/gpu/drm/xe/xe_log.c, log_emit_cper() resolves the device pointer
via xe_any_to_xe():

    xe_cper_emit(xe_any_to_xe(pdev), cper_sev, sigid,
                 component, location, data, len, vaf);

When a struct pci_dev pointer is passed to the logging macros before
pci_set_drvdata() has been called in __xe_pci_probe(), pdev_to_xe_device(pdev)
returns NULL. This happens in drivers/gpu/drm/xe/xe_pci.c in xe_pci_probe()
when a device ID is blocked or if __xe_pci_probe() fails during early setup
(such as in devres_open_group(), pcim_enable_device(), or
xe_device_create()):

    if (id_blocked(pdev->device)) {
        xe_log_info(pdev, PROBE, "driver loading blocked for device '%04x'\n",
                    pdev->device);
        return -ENODEV;
    }

    if (xe_display_driver_probe_defer(pdev))
        return -EPROBE_DEFER;

    err = __xe_pci_probe(pdev, desc);
    if (err) {
        xe_log_err_fatal(pdev, PROBE, err, "driver loading failed for device '%04x'\n",
                         pdev->device);
        return err;
    }

Because those probe logs use a software SIGID, xe_cper_emit() now calls
cper_emit_sw_err() -> cper_init_intel_hdr() with xe set to NULL, which
dereferences xe->drm.dev in drivers/gpu/drm/xe/xe_cper.c:

    strscpy(ihdr->pci_bdf, pci_name(to_pci_dev(xe->drm.dev)), sizeof(ihdr->pci_bdf));

Should xe_cper_emit() check for a null xe pointer before proceeding?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261029132609.907017-8-mallesh.koujalagi@intel.com?part=4

^ permalink raw reply	[flat|nested] 11+ messages in thread

* ✗ Xe.CI.BAT: failure for drm/xe/cper: Software (driver-detected) CPER error reporting (rev2)
  2026-10-29 13:26 [PATCH v2 0/6] drm/xe/cper: Software (driver-detected) CPER error reporting Mallesh Koujalagi
                   ` (7 preceding siblings ...)
  2026-10-29 13:37 ` ✓ CI.KUnit: success " Patchwork
@ 2026-10-29 14:12 ` Patchwork
  8 siblings, 0 replies; 11+ messages in thread
From: Patchwork @ 2026-10-29 14:12 UTC (permalink / raw)
  To: Mallesh Koujalagi; +Cc: intel-xe

[-- Attachment #1: Type: text/plain, Size: 6517 bytes --]

== Series Details ==

Series: drm/xe/cper: Software (driver-detected) CPER error reporting (rev2)
URL   : https://patchwork.freedesktop.org/series/176576/
State : failure

== Summary ==

CI Bug Log - changes from xe-6031-e650cd4c5bd5d3b068ed7a1eb3c55cde4386b355_BAT -> xe-pw-176576v2_BAT
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with xe-pw-176576v2_BAT absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in xe-pw-176576v2_BAT, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (15 -> 15)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in xe-pw-176576v2_BAT:

### IGT changes ###

#### Possible regressions ####

  * igt@kms_pipe_crc_basic@hang-read-crc:
    - bat-ptl-2:          [PASS][1] -> [DMESG-WARN][2] +1 other test dmesg-warn
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6031-e650cd4c5bd5d3b068ed7a1eb3c55cde4386b355/bat-ptl-2/igt@kms_pipe_crc_basic@hang-read-crc.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v2/bat-ptl-2/igt@kms_pipe_crc_basic@hang-read-crc.html

  * igt@kms_pipe_crc_basic@hang-read-crc@pipe-a-edp-1:
    - bat-nvls-1:         [PASS][3] -> [DMESG-WARN][4] +1 other test dmesg-warn
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6031-e650cd4c5bd5d3b068ed7a1eb3c55cde4386b355/bat-nvls-1/igt@kms_pipe_crc_basic@hang-read-crc@pipe-a-edp-1.html
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v2/bat-nvls-1/igt@kms_pipe_crc_basic@hang-read-crc@pipe-a-edp-1.html
    - bat-wcl-1:          [PASS][5] -> [DMESG-WARN][6] +1 other test dmesg-warn
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6031-e650cd4c5bd5d3b068ed7a1eb3c55cde4386b355/bat-wcl-1/igt@kms_pipe_crc_basic@hang-read-crc@pipe-a-edp-1.html
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v2/bat-wcl-1/igt@kms_pipe_crc_basic@hang-read-crc@pipe-a-edp-1.html
    - bat-lnl-1:          [PASS][7] -> [DMESG-WARN][8] +1 other test dmesg-warn
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6031-e650cd4c5bd5d3b068ed7a1eb3c55cde4386b355/bat-lnl-1/igt@kms_pipe_crc_basic@hang-read-crc@pipe-a-edp-1.html
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v2/bat-lnl-1/igt@kms_pipe_crc_basic@hang-read-crc@pipe-a-edp-1.html
    - bat-adlp-7:         [PASS][9] -> [DMESG-WARN][10] +1 other test dmesg-warn
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6031-e650cd4c5bd5d3b068ed7a1eb3c55cde4386b355/bat-adlp-7/igt@kms_pipe_crc_basic@hang-read-crc@pipe-a-edp-1.html
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v2/bat-adlp-7/igt@kms_pipe_crc_basic@hang-read-crc@pipe-a-edp-1.html

  * igt@xe_exec_fault_mode@invalid-va:
    - bat-lnl-2:          [PASS][11] -> [DMESG-WARN][12]
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6031-e650cd4c5bd5d3b068ed7a1eb3c55cde4386b355/bat-lnl-2/igt@xe_exec_fault_mode@invalid-va.html
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v2/bat-lnl-2/igt@xe_exec_fault_mode@invalid-va.html
    - bat-nvls-2:         [PASS][13] -> [DMESG-WARN][14]
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6031-e650cd4c5bd5d3b068ed7a1eb3c55cde4386b355/bat-nvls-2/igt@xe_exec_fault_mode@invalid-va.html
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v2/bat-nvls-2/igt@xe_exec_fault_mode@invalid-va.html
    - bat-ptl-1:          [PASS][15] -> [DMESG-WARN][16]
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6031-e650cd4c5bd5d3b068ed7a1eb3c55cde4386b355/bat-ptl-1/igt@xe_exec_fault_mode@invalid-va.html
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v2/bat-ptl-1/igt@xe_exec_fault_mode@invalid-va.html
    - bat-ptl-vm:         [PASS][17] -> [DMESG-WARN][18]
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6031-e650cd4c5bd5d3b068ed7a1eb3c55cde4386b355/bat-ptl-vm/igt@xe_exec_fault_mode@invalid-va.html
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v2/bat-ptl-vm/igt@xe_exec_fault_mode@invalid-va.html
    - bat-wcl-2:          [PASS][19] -> [DMESG-WARN][20]
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6031-e650cd4c5bd5d3b068ed7a1eb3c55cde4386b355/bat-wcl-2/igt@xe_exec_fault_mode@invalid-va.html
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v2/bat-wcl-2/igt@xe_exec_fault_mode@invalid-va.html

  * igt@xe_module_load@load:
    - bat-atsm-2:         [PASS][21] -> [DMESG-WARN][22]
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6031-e650cd4c5bd5d3b068ed7a1eb3c55cde4386b355/bat-atsm-2/igt@xe_module_load@load.html
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v2/bat-atsm-2/igt@xe_module_load@load.html
    - bat-bmg-vm:         [PASS][23] -> [DMESG-WARN][24]
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6031-e650cd4c5bd5d3b068ed7a1eb3c55cde4386b355/bat-bmg-vm/igt@xe_module_load@load.html
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v2/bat-bmg-vm/igt@xe_module_load@load.html
    - bat-bmg-3:          [PASS][25] -> [DMESG-WARN][26]
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6031-e650cd4c5bd5d3b068ed7a1eb3c55cde4386b355/bat-bmg-3/igt@xe_module_load@load.html
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v2/bat-bmg-3/igt@xe_module_load@load.html
    - bat-bmg-2:          [PASS][27] -> [DMESG-WARN][28]
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6031-e650cd4c5bd5d3b068ed7a1eb3c55cde4386b355/bat-bmg-2/igt@xe_module_load@load.html
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v2/bat-bmg-2/igt@xe_module_load@load.html
    - bat-bmg-1:          [PASS][29] -> [DMESG-WARN][30]
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6031-e650cd4c5bd5d3b068ed7a1eb3c55cde4386b355/bat-bmg-1/igt@xe_module_load@load.html
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v2/bat-bmg-1/igt@xe_module_load@load.html

  


Build changes
-------------

  * Linux: xe-6031-e650cd4c5bd5d3b068ed7a1eb3c55cde4386b355 -> xe-pw-176576v2

  IGT_9170: 9170
  xe-6031-e650cd4c5bd5d3b068ed7a1eb3c55cde4386b355: e650cd4c5bd5d3b068ed7a1eb3c55cde4386b355
  xe-pw-176576v2: 176576v2

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176576v2/index.html

[-- Attachment #2: Type: text/html, Size: 7253 bytes --]

^ permalink raw reply	[flat|nested] 11+ messages in thread

end of thread, other threads:[~2026-10-29 14:12 UTC | newest]

Thread overview: 11+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-10-29 13:26 [PATCH v2 0/6] drm/xe/cper: Software (driver-detected) CPER error reporting Mallesh Koujalagi
2026-10-29 13:26 ` [PATCH v2 1/6] Add CPER logging support for CRI-Do not review Mallesh Koujalagi
2026-10-29 13:26 ` [PATCH v2 2/6] drm/xe/cper: Add software error classification definitions Mallesh Koujalagi
2026-10-29 13:26 ` [PATCH v2 3/6] drm/xe/cper: Decouple RAS error class initialization Mallesh Koujalagi
2026-10-29 13:26 ` [PATCH v2 4/6] drm/xe/cper: Support software CPER records Mallesh Koujalagi
2026-10-29 13:37   ` sashiko-bot
2026-10-29 13:26 ` [PATCH v2 5/6] drm/xe/log: Add software CPER information to KUnit output Mallesh Koujalagi
2026-10-29 13:26 ` [PATCH v2 6/6] drm/xe/log: Test software CPER emission parameters Mallesh Koujalagi
2026-10-29 13:35 ` ✗ CI.checkpatch: warning for drm/xe/cper: Software (driver-detected) CPER error reporting (rev2) Patchwork
2026-10-29 13:37 ` ✓ CI.KUnit: success " Patchwork
2026-10-29 14:12 ` ✗ Xe.CI.BAT: failure " Patchwork

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.