* [PATCH v17 0/2] phy: qcom: add the SGMII SerDes PHY for firmware-managed systems
@ 2026-11-02 10:31 ` Bartosz Golaszewski
0 siblings, 0 replies; 8+ messages in thread
From: Bartosz Golaszewski @ 2026-11-02 10:31 UTC (permalink / raw)
To: Vinod Koul, Neil Armstrong, Manivannan Sadhasivam, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Bartosz Golaszewski
Cc: linux-arm-msm, linux-phy, devicetree, linux-kernel,
Bartosz Golaszewski, Krzysztof Kozlowski, Manivannan Sadhasivam
As Jakub suggested: I'm sending this separately targetting the PHY tree
as there are no build-time dependencies on the rest of the series.
Vinod: this should be good to go, there were no more sashiko comments
and this is just a rebase + a commit message tweak.
Add support for the firmware-managed variant of the Serdes PHY present
on the Qualcomm sa8255p platforms.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
---
Changes in v17:
- Extended the commit message for patch 2 (Manivannan)
- Rebased on top of v7.4-rc1
- Link to v16: https://patch.msgid.link/20261014-sa8255p-eth-phy-v16-0-6310fac52e85@oss.qualcomm.com
Changes in v16:
- Split out the PHY patches into a separate series
- Set the SerDes line rate through the OPP API
- Link to v15: https://patch.msgid.link/20260923-qcom-sa8255p-emac-v15-0-e82f33720737@oss.qualcomm.com
Changes in v15:
- Squash patches 6 and 7 to avoid a potential hang-on-resume regression
(Sashiko)
- Fix the AUTONEG_DISABLE early return path in forced mode (Sashiko)
- Fix Kconfig dependencies on generic power domains (Sashiko)
- Set the performance level back to 0 on unbind in the PHY driver
(Sashiko)
- Use devm_pm_runtime_enable() where applicable
- Link to v14: https://patch.msgid.link/20260908-qcom-sa8255p-emac-v14-0-ec212b747a7d@oss.qualcomm.com
Changes in v14:
- let genpd's own runtime suspend/resume callbacks own the perf state entirely
by calling dev_pm_genpd_set_performance_state() in set_mode()
unconditionally in the sgmii PHY driver
- drop usleep_range() from the PHY driver when setting the state as the level
setting is already synchronous
- add missing power-domains limits for ma35d1/k3-dwmac
- fix ordering of clearing the sgmii loopback
- configure the wrapper clocks synchronously in scmi setup
- Link to v13: https://patch.msgid.link/20260713-qcom-sa8255p-emac-v13-0-119f8699ef8e@oss.qualcomm.com
Changes in v13:
- Reapply OPP on speed change in the PHY driver
- Use linux/device-id/of.h instead of mod_devicetable.h
- Fix the "invalid PTP clock rate" warning on sa8255p
- Add commits necessary to allow correct link speed change with SCMI
- Link to v12: https://patch.msgid.link/20260706-qcom-sa8255p-emac-v12-0-e3ab1ecf2901@oss.qualcomm.com
Changes in v12:
- Drop the power-domain-names from the SGMII PHY DT bindings
- Add missing Kconfig dependency on PM for the new SGMII PHY driver
- Link to v11: https://patch.msgid.link/20260629-qcom-sa8255p-emac-v11-0-1b7fb95b51f9@oss.qualcomm.com
Changes in v11:
- Take a new approach: add a dedicated driver for the firmware-managed
SGMII PHY and simplify changes made to the MAC driver
- Link to v10: https://patch.msgid.link/20260323-qcom-sa8255p-emac-v10-0-79302b238a16@oss.qualcomm.com
Changes in v10:
- Fix unit address in DT example
- Link to v9: https://patch.msgid.link/20260316-qcom-sa8255p-emac-v9-0-c58934e76ff2@oss.qualcomm.com
Changes in v9:
- Rebase on top of current linux-next again
- Link to v8: https://patch.msgid.link/20260311-qcom-sa8255p-emac-v8-0-58227bcf1018@oss.qualcomm.com
Changes in v8:
- Rebase on top of recent changes in linux-next which required an
extensive rework
- Drop partial R-b tags
- Link to v7: https://patch.msgid.link/20260306-qcom-sa8255p-emac-v7-0-d6a3013094b7@oss.qualcomm.com
Changes in v7:
- Restored the correct authorship after learning git uses .mailmap for
the --author switch
- Rebased on top of changes from Russell
- Fixed resource management issues in error paths
- Link to v6: https://lore.kernel.org/r/20260112-qcom-sa8255p-emac-v6-0-86a3d4b2ad83@oss.qualcomm.com
Changes in v6:
- Fix $id value in the bindings
- Drop patch 3/8 from the series
- Update init/exit callback signatures
- Link to v5: https://lore.kernel.org/r/20251107-qcom-sa8255p-emac-v5-0-01d3e3aaf388@linaro.org
- Link to v6: https://lore.kernel.org/r/20251219-qcom-sa8255p-emac-v6-0-487f1082461e@oss.qualcomm.com
Changes in v5:
- Name the DT binding document after the new compatbile
- Add missing space
- Make the power-domains limits stricter
- Link to v4: https://lore.kernel.org/r/20251104-qcom-sa8255p-emac-v4-0-f76660087cea@linaro.org
Changes in v4:
- Remove the phys property from the SCMI bindings
- Mark the power-domain-names property as required
- Set maxItems for power-domains to 1 for all existing bindings to
maintain the current requirements after modifying the value in the
top-level document
- Link to v3: https://lore.kernel.org/r/20251027-qcom-sa8255p-emac-v3-0-75767b9230ab@linaro.org
Changes in v3:
- Drop 'power' and 'perf' prefixes from power domain names
- Rebase on top of Russell's changes to dwmac
- Rebase on top of even more changes from Russell that are not yet
in next (E1vB6ld-0000000BIPy-2Qi4@rmk-PC.armlinux.org.uk)
- Link to v2: https://lore.kernel.org/all/20251008-qcom-sa8255p-emac-v2-0-92bc29309fce@linaro.org/
Changes in v2:
- Fix the power-domains property in DT bindings
- Rework the DT bindings example
- Drop the DTS patch, it will go upstream separately
- Link to v1: https://lore.kernel.org/r/20250910-qcom-sa8255p-emac-v1-0-32a79cf1e668@linaro.org
---
Bartosz Golaszewski (2):
dt-bindings: phy: document the serdes PHY on sa8255p
phy: qcom: add the SGMII SerDes PHY driver for SCMI systems
.../bindings/phy/qcom,sa8255p-dwmac-sgmii-phy.yaml | 50 +++++++++
drivers/phy/qualcomm/Kconfig | 11 ++
drivers/phy/qualcomm/Makefile | 1 +
drivers/phy/qualcomm/phy-qcom-sgmii-eth-scmi.c | 113 +++++++++++++++++++++
4 files changed, 175 insertions(+)
---
base-commit: 6628e7d4c6b25c8d18f1345e3a20d21829aae7e4
change-id: 20261002-sa8255p-eth-phy-6a0699f98a7a
Best regards,
--
Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply [flat|nested] 8+ messages in thread* [PATCH v17 0/2] phy: qcom: add the SGMII SerDes PHY for firmware-managed systems @ 2026-11-02 10:31 ` Bartosz Golaszewski 0 siblings, 0 replies; 8+ messages in thread From: Bartosz Golaszewski @ 2026-11-02 10:31 UTC (permalink / raw) To: Vinod Koul, Neil Armstrong, Manivannan Sadhasivam, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Bartosz Golaszewski Cc: linux-arm-msm, linux-phy, devicetree, linux-kernel, Bartosz Golaszewski, Krzysztof Kozlowski, Manivannan Sadhasivam As Jakub suggested: I'm sending this separately targetting the PHY tree as there are no build-time dependencies on the rest of the series. Vinod: this should be good to go, there were no more sashiko comments and this is just a rebase + a commit message tweak. Add support for the firmware-managed variant of the Serdes PHY present on the Qualcomm sa8255p platforms. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> --- Changes in v17: - Extended the commit message for patch 2 (Manivannan) - Rebased on top of v7.4-rc1 - Link to v16: https://patch.msgid.link/20261014-sa8255p-eth-phy-v16-0-6310fac52e85@oss.qualcomm.com Changes in v16: - Split out the PHY patches into a separate series - Set the SerDes line rate through the OPP API - Link to v15: https://patch.msgid.link/20260923-qcom-sa8255p-emac-v15-0-e82f33720737@oss.qualcomm.com Changes in v15: - Squash patches 6 and 7 to avoid a potential hang-on-resume regression (Sashiko) - Fix the AUTONEG_DISABLE early return path in forced mode (Sashiko) - Fix Kconfig dependencies on generic power domains (Sashiko) - Set the performance level back to 0 on unbind in the PHY driver (Sashiko) - Use devm_pm_runtime_enable() where applicable - Link to v14: https://patch.msgid.link/20260908-qcom-sa8255p-emac-v14-0-ec212b747a7d@oss.qualcomm.com Changes in v14: - let genpd's own runtime suspend/resume callbacks own the perf state entirely by calling dev_pm_genpd_set_performance_state() in set_mode() unconditionally in the sgmii PHY driver - drop usleep_range() from the PHY driver when setting the state as the level setting is already synchronous - add missing power-domains limits for ma35d1/k3-dwmac - fix ordering of clearing the sgmii loopback - configure the wrapper clocks synchronously in scmi setup - Link to v13: https://patch.msgid.link/20260713-qcom-sa8255p-emac-v13-0-119f8699ef8e@oss.qualcomm.com Changes in v13: - Reapply OPP on speed change in the PHY driver - Use linux/device-id/of.h instead of mod_devicetable.h - Fix the "invalid PTP clock rate" warning on sa8255p - Add commits necessary to allow correct link speed change with SCMI - Link to v12: https://patch.msgid.link/20260706-qcom-sa8255p-emac-v12-0-e3ab1ecf2901@oss.qualcomm.com Changes in v12: - Drop the power-domain-names from the SGMII PHY DT bindings - Add missing Kconfig dependency on PM for the new SGMII PHY driver - Link to v11: https://patch.msgid.link/20260629-qcom-sa8255p-emac-v11-0-1b7fb95b51f9@oss.qualcomm.com Changes in v11: - Take a new approach: add a dedicated driver for the firmware-managed SGMII PHY and simplify changes made to the MAC driver - Link to v10: https://patch.msgid.link/20260323-qcom-sa8255p-emac-v10-0-79302b238a16@oss.qualcomm.com Changes in v10: - Fix unit address in DT example - Link to v9: https://patch.msgid.link/20260316-qcom-sa8255p-emac-v9-0-c58934e76ff2@oss.qualcomm.com Changes in v9: - Rebase on top of current linux-next again - Link to v8: https://patch.msgid.link/20260311-qcom-sa8255p-emac-v8-0-58227bcf1018@oss.qualcomm.com Changes in v8: - Rebase on top of recent changes in linux-next which required an extensive rework - Drop partial R-b tags - Link to v7: https://patch.msgid.link/20260306-qcom-sa8255p-emac-v7-0-d6a3013094b7@oss.qualcomm.com Changes in v7: - Restored the correct authorship after learning git uses .mailmap for the --author switch - Rebased on top of changes from Russell - Fixed resource management issues in error paths - Link to v6: https://lore.kernel.org/r/20260112-qcom-sa8255p-emac-v6-0-86a3d4b2ad83@oss.qualcomm.com Changes in v6: - Fix $id value in the bindings - Drop patch 3/8 from the series - Update init/exit callback signatures - Link to v5: https://lore.kernel.org/r/20251107-qcom-sa8255p-emac-v5-0-01d3e3aaf388@linaro.org - Link to v6: https://lore.kernel.org/r/20251219-qcom-sa8255p-emac-v6-0-487f1082461e@oss.qualcomm.com Changes in v5: - Name the DT binding document after the new compatbile - Add missing space - Make the power-domains limits stricter - Link to v4: https://lore.kernel.org/r/20251104-qcom-sa8255p-emac-v4-0-f76660087cea@linaro.org Changes in v4: - Remove the phys property from the SCMI bindings - Mark the power-domain-names property as required - Set maxItems for power-domains to 1 for all existing bindings to maintain the current requirements after modifying the value in the top-level document - Link to v3: https://lore.kernel.org/r/20251027-qcom-sa8255p-emac-v3-0-75767b9230ab@linaro.org Changes in v3: - Drop 'power' and 'perf' prefixes from power domain names - Rebase on top of Russell's changes to dwmac - Rebase on top of even more changes from Russell that are not yet in next (E1vB6ld-0000000BIPy-2Qi4@rmk-PC.armlinux.org.uk) - Link to v2: https://lore.kernel.org/all/20251008-qcom-sa8255p-emac-v2-0-92bc29309fce@linaro.org/ Changes in v2: - Fix the power-domains property in DT bindings - Rework the DT bindings example - Drop the DTS patch, it will go upstream separately - Link to v1: https://lore.kernel.org/r/20250910-qcom-sa8255p-emac-v1-0-32a79cf1e668@linaro.org --- Bartosz Golaszewski (2): dt-bindings: phy: document the serdes PHY on sa8255p phy: qcom: add the SGMII SerDes PHY driver for SCMI systems .../bindings/phy/qcom,sa8255p-dwmac-sgmii-phy.yaml | 50 +++++++++ drivers/phy/qualcomm/Kconfig | 11 ++ drivers/phy/qualcomm/Makefile | 1 + drivers/phy/qualcomm/phy-qcom-sgmii-eth-scmi.c | 113 +++++++++++++++++++++ 4 files changed, 175 insertions(+) --- base-commit: 6628e7d4c6b25c8d18f1345e3a20d21829aae7e4 change-id: 20261002-sa8255p-eth-phy-6a0699f98a7a Best regards, -- Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH v17 1/2] dt-bindings: phy: document the serdes PHY on sa8255p 2026-11-02 10:31 ` Bartosz Golaszewski @ 2026-11-02 10:31 ` Bartosz Golaszewski -1 siblings, 0 replies; 8+ messages in thread From: Bartosz Golaszewski @ 2026-11-02 10:31 UTC (permalink / raw) To: Vinod Koul, Neil Armstrong, Manivannan Sadhasivam, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Bartosz Golaszewski Cc: linux-arm-msm, linux-phy, devicetree, linux-kernel, Bartosz Golaszewski, Krzysztof Kozlowski Describe the SGMII/SerDes PHY present on the Qualcomm sa8255p platforms. This is essentially the same hardware as sa8775p rev3 but the PHY is managed by firmware over SCMI. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> --- .../bindings/phy/qcom,sa8255p-dwmac-sgmii-phy.yaml | 50 ++++++++++++++++++++++ 1 file changed, 50 insertions(+) diff --git a/Documentation/devicetree/bindings/phy/qcom,sa8255p-dwmac-sgmii-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sa8255p-dwmac-sgmii-phy.yaml new file mode 100644 index 0000000000000000000000000000000000000000..9e846e381555514bb32177f884abf0cf2c942948 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/qcom,sa8255p-dwmac-sgmii-phy.yaml @@ -0,0 +1,50 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/qcom,sa8255p-dwmac-sgmii-phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SerDes/SGMII ethernet PHY controller (firmware managed) + +maintainers: + - Bartosz Golaszewski <brgl@kernel.org> + +description: + The SerDes PHY sits between the MAC and the external PHY and provides + separate Rx Tx lines. + +properties: + compatible: + const: qcom,sa8255p-dwmac-sgmii-phy + + reg: + items: + - description: serdes + + power-domains: + maxItems: 1 + + power-domain-names: + maxItems: 1 + + "#phy-cells": + const: 0 + +required: + - compatible + - reg + - "#phy-cells" + - power-domains + - power-domain-names + +additionalProperties: false + +examples: + - | + phy@8901000 { + compatible = "qcom,sa8255p-dwmac-sgmii-phy"; + reg = <0x08901000 0xe10>; + #phy-cells = <0>; + power-domains = <&scmi7_dvfs 0>; + power-domain-names = "serdes"; + }; -- 2.47.3 -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy ^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v17 1/2] dt-bindings: phy: document the serdes PHY on sa8255p @ 2026-11-02 10:31 ` Bartosz Golaszewski 0 siblings, 0 replies; 8+ messages in thread From: Bartosz Golaszewski @ 2026-11-02 10:31 UTC (permalink / raw) To: Vinod Koul, Neil Armstrong, Manivannan Sadhasivam, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Bartosz Golaszewski Cc: linux-arm-msm, linux-phy, devicetree, linux-kernel, Bartosz Golaszewski, Krzysztof Kozlowski Describe the SGMII/SerDes PHY present on the Qualcomm sa8255p platforms. This is essentially the same hardware as sa8775p rev3 but the PHY is managed by firmware over SCMI. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> --- .../bindings/phy/qcom,sa8255p-dwmac-sgmii-phy.yaml | 50 ++++++++++++++++++++++ 1 file changed, 50 insertions(+) diff --git a/Documentation/devicetree/bindings/phy/qcom,sa8255p-dwmac-sgmii-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sa8255p-dwmac-sgmii-phy.yaml new file mode 100644 index 0000000000000000000000000000000000000000..9e846e381555514bb32177f884abf0cf2c942948 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/qcom,sa8255p-dwmac-sgmii-phy.yaml @@ -0,0 +1,50 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/qcom,sa8255p-dwmac-sgmii-phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SerDes/SGMII ethernet PHY controller (firmware managed) + +maintainers: + - Bartosz Golaszewski <brgl@kernel.org> + +description: + The SerDes PHY sits between the MAC and the external PHY and provides + separate Rx Tx lines. + +properties: + compatible: + const: qcom,sa8255p-dwmac-sgmii-phy + + reg: + items: + - description: serdes + + power-domains: + maxItems: 1 + + power-domain-names: + maxItems: 1 + + "#phy-cells": + const: 0 + +required: + - compatible + - reg + - "#phy-cells" + - power-domains + - power-domain-names + +additionalProperties: false + +examples: + - | + phy@8901000 { + compatible = "qcom,sa8255p-dwmac-sgmii-phy"; + reg = <0x08901000 0xe10>; + #phy-cells = <0>; + power-domains = <&scmi7_dvfs 0>; + power-domain-names = "serdes"; + }; -- 2.47.3 ^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH v17 1/2] dt-bindings: phy: document the serdes PHY on sa8255p 2026-11-02 10:31 ` Bartosz Golaszewski @ 2026-11-02 10:40 ` sashiko-bot -1 siblings, 0 replies; 8+ messages in thread From: sashiko-bot @ 2026-11-02 10:40 UTC (permalink / raw) To: Bartosz Golaszewski Cc: linux-phy, devicetree, robh, conor+dt, vkoul, neil.armstrong, olteanv Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider: - [Low] dt-bindings: phy: qcom,sa8255p-dwmac-sgmii-phy: unremoved power-domain-names -- commit 00c832f9534ae5a6afdd6391553244658cdbc81c Author: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> dt-bindings: phy: document the serdes PHY on sa8255p This commit adds the Device Tree binding schema for the firmware-managed SGMII/SerDes PHY on Qualcomm sa8255p platforms. > diff --git a/Documentation/devicetree/bindings/phy/qcom,sa8255p-dwmac-sgmii-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sa8255p-dwmac-sgmii-phy.yaml > new file mode 100644 > index 0000000000000..9e846e3815555 > --- /dev/null > +++ b/Documentation/devicetree/bindings/phy/qcom,sa8255p-dwmac-sgmii-phy.yaml > @@ -0,0 +1,50 @@ > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/phy/qcom,sa8255p-dwmac-sgmii-phy.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Qualcomm SerDes/SGMII ethernet PHY controller (firmware managed) > + > +maintainers: > + - Bartosz Golaszewski <brgl@kernel.org> > + > +description: > + The SerDes PHY sits between the MAC and the external PHY and provides > + separate Rx Tx lines. > + > +properties: > + compatible: > + const: qcom,sa8255p-dwmac-sgmii-phy > + > + reg: > + items: > + - description: serdes > + > + power-domains: > + maxItems: 1 > + > + power-domain-names: > + maxItems: 1 > + > + "#phy-cells": > + const: 0 > + > +required: > + - compatible > + - reg > + - "#phy-cells" > + - power-domains > + - power-domain-names > + > +additionalProperties: false > + > +examples: > + - | > + phy@8901000 { > + compatible = "qcom,sa8255p-dwmac-sgmii-phy"; > + reg = <0x08901000 0xe10>; > + #phy-cells = <0>; > + power-domains = <&scmi7_dvfs 0>; > + power-domain-names = "serdes"; > + }; [Severity: Low] As reported by Krzysztof Kozlowski on v11 [1], should power-domain-names be dropped from properties, required, and examples in Documentation/devicetree/bindings/phy/qcom,sa8255p-dwmac-sgmii-phy.yaml? There is only a single power domain that is attached via the platform bus core rather than looked up by name, and changing power-domain-names from const: serdes to maxItems: 1 leaves the property required for DT validation while allowing any arbitrary string value. [1] https://lore.kernel.org/r/20260630-exuberant-dramatic-bustard-068bf8@quoll -- Sashiko AI review · https://sashiko.dev/#/patchset/20261102-sa8255p-eth-phy-v17-0-aa138f2912a0@oss.qualcomm.com?part=1 -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v17 1/2] dt-bindings: phy: document the serdes PHY on sa8255p @ 2026-11-02 10:40 ` sashiko-bot 0 siblings, 0 replies; 8+ messages in thread From: sashiko-bot @ 2026-11-02 10:40 UTC (permalink / raw) To: Bartosz Golaszewski Cc: linux-phy, devicetree, robh, conor+dt, vkoul, neil.armstrong, olteanv Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider: - [Low] dt-bindings: phy: qcom,sa8255p-dwmac-sgmii-phy: unremoved power-domain-names -- commit 00c832f9534ae5a6afdd6391553244658cdbc81c Author: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> dt-bindings: phy: document the serdes PHY on sa8255p This commit adds the Device Tree binding schema for the firmware-managed SGMII/SerDes PHY on Qualcomm sa8255p platforms. > diff --git a/Documentation/devicetree/bindings/phy/qcom,sa8255p-dwmac-sgmii-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sa8255p-dwmac-sgmii-phy.yaml > new file mode 100644 > index 0000000000000..9e846e3815555 > --- /dev/null > +++ b/Documentation/devicetree/bindings/phy/qcom,sa8255p-dwmac-sgmii-phy.yaml > @@ -0,0 +1,50 @@ > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/phy/qcom,sa8255p-dwmac-sgmii-phy.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Qualcomm SerDes/SGMII ethernet PHY controller (firmware managed) > + > +maintainers: > + - Bartosz Golaszewski <brgl@kernel.org> > + > +description: > + The SerDes PHY sits between the MAC and the external PHY and provides > + separate Rx Tx lines. > + > +properties: > + compatible: > + const: qcom,sa8255p-dwmac-sgmii-phy > + > + reg: > + items: > + - description: serdes > + > + power-domains: > + maxItems: 1 > + > + power-domain-names: > + maxItems: 1 > + > + "#phy-cells": > + const: 0 > + > +required: > + - compatible > + - reg > + - "#phy-cells" > + - power-domains > + - power-domain-names > + > +additionalProperties: false > + > +examples: > + - | > + phy@8901000 { > + compatible = "qcom,sa8255p-dwmac-sgmii-phy"; > + reg = <0x08901000 0xe10>; > + #phy-cells = <0>; > + power-domains = <&scmi7_dvfs 0>; > + power-domain-names = "serdes"; > + }; [Severity: Low] As reported by Krzysztof Kozlowski on v11 [1], should power-domain-names be dropped from properties, required, and examples in Documentation/devicetree/bindings/phy/qcom,sa8255p-dwmac-sgmii-phy.yaml? There is only a single power domain that is attached via the platform bus core rather than looked up by name, and changing power-domain-names from const: serdes to maxItems: 1 leaves the property required for DT validation while allowing any arbitrary string value. [1] https://lore.kernel.org/r/20260630-exuberant-dramatic-bustard-068bf8@quoll -- Sashiko AI review · https://sashiko.dev/#/patchset/20261102-sa8255p-eth-phy-v17-0-aa138f2912a0@oss.qualcomm.com?part=1 ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH v17 2/2] phy: qcom: add the SGMII SerDes PHY driver for SCMI systems 2026-11-02 10:31 ` Bartosz Golaszewski @ 2026-11-02 10:31 ` Bartosz Golaszewski -1 siblings, 0 replies; 8+ messages in thread From: Bartosz Golaszewski @ 2026-11-02 10:31 UTC (permalink / raw) To: Vinod Koul, Neil Armstrong, Manivannan Sadhasivam, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Bartosz Golaszewski Cc: linux-arm-msm, linux-phy, devicetree, linux-kernel, Bartosz Golaszewski, Manivannan Sadhasivam Implement support for the firmware-managed SGMII/SerDes PHY present on Qualcomm platforms. Do this as a separate driver from the HLOS-managed variant as they don't share almost any code. The OPP table is added by the SCMI DVFS perf power domain driver after being fetched from the firmware. Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> --- drivers/phy/qualcomm/Kconfig | 11 +++ drivers/phy/qualcomm/Makefile | 1 + drivers/phy/qualcomm/phy-qcom-sgmii-eth-scmi.c | 113 +++++++++++++++++++++++++ 3 files changed, 125 insertions(+) diff --git a/drivers/phy/qualcomm/Kconfig b/drivers/phy/qualcomm/Kconfig index 44a805361e35d9b34b9ae0bf30b0f8201a2532b9..2486720b9ffc8e7661ca3e109aadc6971abce6c4 100644 --- a/drivers/phy/qualcomm/Kconfig +++ b/drivers/phy/qualcomm/Kconfig @@ -260,3 +260,14 @@ config PHY_QCOM_SGMII_ETH help Enable this to support the internal SerDes/SGMII PHY on various Qualcomm chipsets. + +config PHY_QCOM_SGMII_ETH_SCMI + tristate "Qualcomm DWMAC SGMII SerDes/PHY driver (firmware managed)" + depends on OF && (ARCH_QCOM || COMPILE_TEST) + depends on PM_GENERIC_DOMAINS + depends on PM_OPP + select GENERIC_PHY + help + Enable this to support the internal SerDes/SGMII PHY on Qualcomm + chipsets where the SerDes hardware (clocks and registers) is owned + by the firmware. diff --git a/drivers/phy/qualcomm/Makefile b/drivers/phy/qualcomm/Makefile index 4b5e6640a6faa05715b96cc8e9512208340fb595..41f192c9f4182977573dc8755b34575b13212fd7 100644 --- a/drivers/phy/qualcomm/Makefile +++ b/drivers/phy/qualcomm/Makefile @@ -31,3 +31,4 @@ obj-$(CONFIG_PHY_QCOM_USB_SS) += phy-qcom-usb-ss.o obj-$(CONFIG_PHY_QCOM_USB_SNPS_FEMTO_V2)+= phy-qcom-snps-femto-v2.o obj-$(CONFIG_PHY_QCOM_IPQ806X_USB) += phy-qcom-ipq806x-usb.o obj-$(CONFIG_PHY_QCOM_SGMII_ETH) += phy-qcom-sgmii-eth.o +obj-$(CONFIG_PHY_QCOM_SGMII_ETH_SCMI) += phy-qcom-sgmii-eth-scmi.o diff --git a/drivers/phy/qualcomm/phy-qcom-sgmii-eth-scmi.c b/drivers/phy/qualcomm/phy-qcom-sgmii-eth-scmi.c new file mode 100644 index 0000000000000000000000000000000000000000..81bed5702bc17d2b05513122b22dc7a5cb75fa63 --- /dev/null +++ b/drivers/phy/qualcomm/phy-qcom-sgmii-eth-scmi.c @@ -0,0 +1,113 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + * + * Firmware-managed variant of the Qualcomm DWMAC SGMII SerDes/PHY driver. + */ + +#include <linux/device-id/of.h> +#include <linux/ethtool.h> +#include <linux/module.h> +#include <linux/of.h> +#include <linux/phy.h> +#include <linux/phy/phy.h> +#include <linux/platform_device.h> +#include <linux/pm_opp.h> +#include <linux/pm_runtime.h> + +static int qcom_dwmac_sgmii_phy_scmi_validate(struct phy *phy, enum phy_mode mode, + int submode, + union phy_configure_opts *opts) +{ + if (mode != PHY_MODE_ETHERNET) + return -EINVAL; + + switch (submode) { + case PHY_INTERFACE_MODE_SGMII: + case PHY_INTERFACE_MODE_1000BASEX: + case PHY_INTERFACE_MODE_2500BASEX: + return 0; + default: + return -EINVAL; + } +} + +static int qcom_dwmac_sgmii_phy_scmi_set_mode(struct phy *phy, enum phy_mode mode, + int submode) +{ + struct device *dev = phy->dev.parent; + unsigned int level; + int ret; + + ret = qcom_dwmac_sgmii_phy_scmi_validate(phy, mode, submode, NULL); + if (ret) + return ret; + + level = (submode == PHY_INTERFACE_MODE_2500BASEX) ? SPEED_2500 : SPEED_1000; + + return dev_pm_opp_set_level(dev, level); +} + +static const struct phy_ops qcom_dwmac_sgmii_phy_scmi_ops = { + .set_mode = qcom_dwmac_sgmii_phy_scmi_set_mode, + .validate = qcom_dwmac_sgmii_phy_scmi_validate, + .owner = THIS_MODULE, +}; + +static void qcom_dwmac_sgmii_phy_scmi_drop_level(void *data) +{ + struct device *dev = data; + + dev_pm_opp_set_opp(dev, NULL); +} + +static int qcom_dwmac_sgmii_phy_scmi_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct phy_provider *provider; + struct phy *phy; + int ret; + + ret = dev_pm_opp_get_opp_count(dev); + if (ret <= 0) + return dev_err_probe(dev, ret ?: -ENODEV, + "no performance levels available\n"); + + ret = devm_pm_runtime_enable(dev); + if (ret) + return ret; + + ret = devm_add_action_or_reset(dev, qcom_dwmac_sgmii_phy_scmi_drop_level, dev); + if (ret) + return ret; + + phy = devm_phy_create(dev, NULL, &qcom_dwmac_sgmii_phy_scmi_ops); + if (IS_ERR(phy)) + return dev_err_probe(dev, PTR_ERR(phy), "failed to create the phy\n"); + + provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate); + if (IS_ERR(provider)) + return dev_err_probe(dev, PTR_ERR(provider), + "failed to register the PHY provider\n"); + + return 0; +} + +static const struct of_device_id qcom_dwmac_sgmii_phy_scmi_of_match[] = { + { .compatible = "qcom,sa8255p-dwmac-sgmii-phy" }, + { } +}; +MODULE_DEVICE_TABLE(of, qcom_dwmac_sgmii_phy_scmi_of_match); + +static struct platform_driver qcom_dwmac_sgmii_phy_scmi_driver = { + .probe = qcom_dwmac_sgmii_phy_scmi_probe, + .driver = { + .name = "qcom-dwmac-sgmii-phy-scmi", + .of_match_table = qcom_dwmac_sgmii_phy_scmi_of_match, + }, +}; +module_platform_driver(qcom_dwmac_sgmii_phy_scmi_driver); + +MODULE_DESCRIPTION("Qualcomm DWMAC SGMII PHY driver (firmware managed)"); +MODULE_AUTHOR("Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>"); +MODULE_LICENSE("GPL"); -- 2.47.3 -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy ^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v17 2/2] phy: qcom: add the SGMII SerDes PHY driver for SCMI systems @ 2026-11-02 10:31 ` Bartosz Golaszewski 0 siblings, 0 replies; 8+ messages in thread From: Bartosz Golaszewski @ 2026-11-02 10:31 UTC (permalink / raw) To: Vinod Koul, Neil Armstrong, Manivannan Sadhasivam, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Bartosz Golaszewski Cc: linux-arm-msm, linux-phy, devicetree, linux-kernel, Bartosz Golaszewski, Manivannan Sadhasivam Implement support for the firmware-managed SGMII/SerDes PHY present on Qualcomm platforms. Do this as a separate driver from the HLOS-managed variant as they don't share almost any code. The OPP table is added by the SCMI DVFS perf power domain driver after being fetched from the firmware. Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> --- drivers/phy/qualcomm/Kconfig | 11 +++ drivers/phy/qualcomm/Makefile | 1 + drivers/phy/qualcomm/phy-qcom-sgmii-eth-scmi.c | 113 +++++++++++++++++++++++++ 3 files changed, 125 insertions(+) diff --git a/drivers/phy/qualcomm/Kconfig b/drivers/phy/qualcomm/Kconfig index 44a805361e35d9b34b9ae0bf30b0f8201a2532b9..2486720b9ffc8e7661ca3e109aadc6971abce6c4 100644 --- a/drivers/phy/qualcomm/Kconfig +++ b/drivers/phy/qualcomm/Kconfig @@ -260,3 +260,14 @@ config PHY_QCOM_SGMII_ETH help Enable this to support the internal SerDes/SGMII PHY on various Qualcomm chipsets. + +config PHY_QCOM_SGMII_ETH_SCMI + tristate "Qualcomm DWMAC SGMII SerDes/PHY driver (firmware managed)" + depends on OF && (ARCH_QCOM || COMPILE_TEST) + depends on PM_GENERIC_DOMAINS + depends on PM_OPP + select GENERIC_PHY + help + Enable this to support the internal SerDes/SGMII PHY on Qualcomm + chipsets where the SerDes hardware (clocks and registers) is owned + by the firmware. diff --git a/drivers/phy/qualcomm/Makefile b/drivers/phy/qualcomm/Makefile index 4b5e6640a6faa05715b96cc8e9512208340fb595..41f192c9f4182977573dc8755b34575b13212fd7 100644 --- a/drivers/phy/qualcomm/Makefile +++ b/drivers/phy/qualcomm/Makefile @@ -31,3 +31,4 @@ obj-$(CONFIG_PHY_QCOM_USB_SS) += phy-qcom-usb-ss.o obj-$(CONFIG_PHY_QCOM_USB_SNPS_FEMTO_V2)+= phy-qcom-snps-femto-v2.o obj-$(CONFIG_PHY_QCOM_IPQ806X_USB) += phy-qcom-ipq806x-usb.o obj-$(CONFIG_PHY_QCOM_SGMII_ETH) += phy-qcom-sgmii-eth.o +obj-$(CONFIG_PHY_QCOM_SGMII_ETH_SCMI) += phy-qcom-sgmii-eth-scmi.o diff --git a/drivers/phy/qualcomm/phy-qcom-sgmii-eth-scmi.c b/drivers/phy/qualcomm/phy-qcom-sgmii-eth-scmi.c new file mode 100644 index 0000000000000000000000000000000000000000..81bed5702bc17d2b05513122b22dc7a5cb75fa63 --- /dev/null +++ b/drivers/phy/qualcomm/phy-qcom-sgmii-eth-scmi.c @@ -0,0 +1,113 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + * + * Firmware-managed variant of the Qualcomm DWMAC SGMII SerDes/PHY driver. + */ + +#include <linux/device-id/of.h> +#include <linux/ethtool.h> +#include <linux/module.h> +#include <linux/of.h> +#include <linux/phy.h> +#include <linux/phy/phy.h> +#include <linux/platform_device.h> +#include <linux/pm_opp.h> +#include <linux/pm_runtime.h> + +static int qcom_dwmac_sgmii_phy_scmi_validate(struct phy *phy, enum phy_mode mode, + int submode, + union phy_configure_opts *opts) +{ + if (mode != PHY_MODE_ETHERNET) + return -EINVAL; + + switch (submode) { + case PHY_INTERFACE_MODE_SGMII: + case PHY_INTERFACE_MODE_1000BASEX: + case PHY_INTERFACE_MODE_2500BASEX: + return 0; + default: + return -EINVAL; + } +} + +static int qcom_dwmac_sgmii_phy_scmi_set_mode(struct phy *phy, enum phy_mode mode, + int submode) +{ + struct device *dev = phy->dev.parent; + unsigned int level; + int ret; + + ret = qcom_dwmac_sgmii_phy_scmi_validate(phy, mode, submode, NULL); + if (ret) + return ret; + + level = (submode == PHY_INTERFACE_MODE_2500BASEX) ? SPEED_2500 : SPEED_1000; + + return dev_pm_opp_set_level(dev, level); +} + +static const struct phy_ops qcom_dwmac_sgmii_phy_scmi_ops = { + .set_mode = qcom_dwmac_sgmii_phy_scmi_set_mode, + .validate = qcom_dwmac_sgmii_phy_scmi_validate, + .owner = THIS_MODULE, +}; + +static void qcom_dwmac_sgmii_phy_scmi_drop_level(void *data) +{ + struct device *dev = data; + + dev_pm_opp_set_opp(dev, NULL); +} + +static int qcom_dwmac_sgmii_phy_scmi_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct phy_provider *provider; + struct phy *phy; + int ret; + + ret = dev_pm_opp_get_opp_count(dev); + if (ret <= 0) + return dev_err_probe(dev, ret ?: -ENODEV, + "no performance levels available\n"); + + ret = devm_pm_runtime_enable(dev); + if (ret) + return ret; + + ret = devm_add_action_or_reset(dev, qcom_dwmac_sgmii_phy_scmi_drop_level, dev); + if (ret) + return ret; + + phy = devm_phy_create(dev, NULL, &qcom_dwmac_sgmii_phy_scmi_ops); + if (IS_ERR(phy)) + return dev_err_probe(dev, PTR_ERR(phy), "failed to create the phy\n"); + + provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate); + if (IS_ERR(provider)) + return dev_err_probe(dev, PTR_ERR(provider), + "failed to register the PHY provider\n"); + + return 0; +} + +static const struct of_device_id qcom_dwmac_sgmii_phy_scmi_of_match[] = { + { .compatible = "qcom,sa8255p-dwmac-sgmii-phy" }, + { } +}; +MODULE_DEVICE_TABLE(of, qcom_dwmac_sgmii_phy_scmi_of_match); + +static struct platform_driver qcom_dwmac_sgmii_phy_scmi_driver = { + .probe = qcom_dwmac_sgmii_phy_scmi_probe, + .driver = { + .name = "qcom-dwmac-sgmii-phy-scmi", + .of_match_table = qcom_dwmac_sgmii_phy_scmi_of_match, + }, +}; +module_platform_driver(qcom_dwmac_sgmii_phy_scmi_driver); + +MODULE_DESCRIPTION("Qualcomm DWMAC SGMII PHY driver (firmware managed)"); +MODULE_AUTHOR("Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>"); +MODULE_LICENSE("GPL"); -- 2.47.3 ^ permalink raw reply related [flat|nested] 8+ messages in thread
end of thread, other threads:[~2026-11-02 10:40 UTC | newest] Thread overview: 8+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2026-11-02 10:31 [PATCH v17 0/2] phy: qcom: add the SGMII SerDes PHY for firmware-managed systems Bartosz Golaszewski 2026-11-02 10:31 ` Bartosz Golaszewski 2026-11-02 10:31 ` [PATCH v17 1/2] dt-bindings: phy: document the serdes PHY on sa8255p Bartosz Golaszewski 2026-11-02 10:31 ` Bartosz Golaszewski 2026-11-02 10:40 ` sashiko-bot 2026-11-02 10:40 ` sashiko-bot 2026-11-02 10:31 ` [PATCH v17 2/2] phy: qcom: add the SGMII SerDes PHY driver for SCMI systems Bartosz Golaszewski 2026-11-02 10:31 ` Bartosz Golaszewski
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