[PATCH 0/3] Fix up AON clamps on qmp-combo-phy

[PATCH 0/3] Fix up AON clamps on qmp-combo-phy

[Konrad Dybcio]

Various platforms have apparently not had the AON clamp writes end up
at the desired registers. This fixes that up, based on the robot's
findings.

Depends on (reviewed and ready to be picked up):
https://lore.kernel.org/linux-arm-msm/20261023123512.1912-1-26rote@gmail.com/

Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
---
Konrad Dybcio (3):
      phy: qcom: qmp-combo: Separate PCS misc clamp mapping
      phy: qcom: qmp-combo: Make v4/v5 targets use the right clamp
      phy: qcom: qmp-combo: Use V6 offsets for PCS-AON clamps

 drivers/phy/qualcomm/phy-qcom-qmp-combo.c  | 30 +++++++++++++++++++-----------
 drivers/phy/qualcomm/phy-qcom-qmp-pcs-v5.h |  1 +
 2 files changed, 20 insertions(+), 11 deletions(-)
---
base-commit: 63ad76011c4162b0e0e516e5eb76acc554683cae
change-id: 20261102-topic-qmp_aon_clamp-16e6950d4106

Best regards,
--  
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[PATCH 1/3] phy: qcom: qmp-combo: Separate PCS misc clamp mapping

[Konrad Dybcio]

From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>

PCS clamp offsets can belong to different register windows. Using
QPHY_PCS_CLAMP_ENABLE for both the AON and PCS misc windows conflates
those layouts when a PHY has both controls.

Add QPHY_PCS_MISC_CLAMP_ENABLE for misc-backed platforms and use it for
misc-window clamp accesses. Keep QPHY_PCS_CLAMP_ENABLE for PCS/AON
clamps.

Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
---
 drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 17 ++++++++++-------
 1 file changed, 10 insertions(+), 7 deletions(-)

diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
index aa9dc9716574..1c7b653975f1 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
@@ -101,6 +101,7 @@ enum qphy_reg_layout {
 	QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR,
 	QPHY_PCS_POWER_DOWN_CONTROL,
 	QPHY_PCS_CLAMP_ENABLE,
+	QPHY_PCS_MISC_CLAMP_ENABLE,
 	QPHY_PCS_USB4_CLAMP_ENABLE,
 
 	QPHY_COM_RESETSM_CNTRL,
@@ -131,7 +132,7 @@ static const unsigned int qmp_v3_usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = {
 	[QPHY_PCS_AUTONOMOUS_MODE_CTRL]	= QPHY_V3_PCS_AUTONOMOUS_MODE_CTRL,
 	[QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR] = QPHY_V3_PCS_LFPS_RXTERM_IRQ_CLEAR,
 
-	[QPHY_PCS_CLAMP_ENABLE]		= QPHY_V3_PCS_MISC_CLAMP_ENABLE,
+	[QPHY_PCS_MISC_CLAMP_ENABLE]	= QPHY_V3_PCS_MISC_CLAMP_ENABLE,
 
 	[QPHY_COM_RESETSM_CNTRL]	= QSERDES_V3_COM_RESETSM_CNTRL,
 	[QPHY_COM_C_READY_STATUS]	= QSERDES_V3_COM_C_READY_STATUS,
@@ -158,7 +159,7 @@ static const unsigned int qmp_v45_usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = {
 	[QPHY_PCS_AUTONOMOUS_MODE_CTRL]	= QPHY_V4_PCS_USB3_AUTONOMOUS_MODE_CTRL,
 	[QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR] = QPHY_V4_PCS_USB3_LFPS_RXTERM_IRQ_CLEAR,
 
-	[QPHY_PCS_CLAMP_ENABLE]		= QPHY_V4_PCS_MISC_CLAMP_ENABLE,
+	[QPHY_PCS_MISC_CLAMP_ENABLE]	= QPHY_V4_PCS_MISC_CLAMP_ENABLE,
 
 	[QPHY_COM_RESETSM_CNTRL]	= QSERDES_V4_COM_RESETSM_CNTRL,
 	[QPHY_COM_C_READY_STATUS]	= QSERDES_V4_COM_C_READY_STATUS,
@@ -185,7 +186,7 @@ static const unsigned int qmp_v5_5nm_usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = {
 	[QPHY_PCS_AUTONOMOUS_MODE_CTRL]	= QPHY_V5_PCS_USB3_AUTONOMOUS_MODE_CTRL,
 	[QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR] = QPHY_V5_PCS_USB3_LFPS_RXTERM_IRQ_CLEAR,
 
-	[QPHY_PCS_CLAMP_ENABLE]		= QPHY_V5_PCS_MISC_CLAMP_ENABLE,
+	[QPHY_PCS_MISC_CLAMP_ENABLE]	= QPHY_V5_PCS_MISC_CLAMP_ENABLE,
 
 	[QPHY_COM_RESETSM_CNTRL]	= QSERDES_V5_COM_RESETSM_CNTRL,
 	[QPHY_COM_C_READY_STATUS]	= QSERDES_V5_COM_C_READY_STATUS,
@@ -4698,8 +4699,9 @@ static void qmp_combo_enable_autonomous_mode(struct qmp_combo *qmp)
 			qphy_clrbits(pcs_aon, cfg->regs[QPHY_PCS_USB4_CLAMP_ENABLE], CLAMP_EN);
 		else
 			qphy_clrbits(pcs_aon, cfg->regs[QPHY_PCS_CLAMP_ENABLE], CLAMP_EN);
-	} else if (pcs_misc)
-		qphy_clrbits(pcs_misc, cfg->regs[QPHY_PCS_CLAMP_ENABLE], CLAMP_EN);
+	} else if (pcs_misc) {
+		qphy_clrbits(pcs_misc, cfg->regs[QPHY_PCS_MISC_CLAMP_ENABLE], CLAMP_EN);
+	}
 }
 
 static void qmp_combo_disable_autonomous_mode(struct qmp_combo *qmp)
@@ -4715,8 +4717,9 @@ static void qmp_combo_disable_autonomous_mode(struct qmp_combo *qmp)
 			qphy_setbits(pcs_aon, cfg->regs[QPHY_PCS_USB4_CLAMP_ENABLE], CLAMP_EN);
 		else
 			qphy_setbits(pcs_aon, cfg->regs[QPHY_PCS_CLAMP_ENABLE], CLAMP_EN);
-	} else if (pcs_misc)
-		qphy_setbits(pcs_misc, cfg->regs[QPHY_PCS_CLAMP_ENABLE], CLAMP_EN);
+	} else if (pcs_misc) {
+		qphy_setbits(pcs_misc, cfg->regs[QPHY_PCS_MISC_CLAMP_ENABLE], CLAMP_EN);
+	}
 
 	qphy_clrbits(pcs_usb, cfg->regs[QPHY_PCS_AUTONOMOUS_MODE_CTRL],
 		     ARCVR_DTCT_EN | ARCVR_DTCT_EVENT_SEL | ALFPS_DTCT_EN);

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Re: [PATCH 1/3] phy: qcom: qmp-combo: Separate PCS misc clamp mapping

[Abel Vesa]

On 26-11-02 14:59:32, Konrad Dybcio wrote:
> From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
> 
> PCS clamp offsets can belong to different register windows. Using
> QPHY_PCS_CLAMP_ENABLE for both the AON and PCS misc windows conflates
> those layouts when a PHY has both controls.
> 
> Add QPHY_PCS_MISC_CLAMP_ENABLE for misc-backed platforms and use it for
> misc-window clamp accesses. Keep QPHY_PCS_CLAMP_ENABLE for PCS/AON
> clamps.
> 
> Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>

Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>

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[PATCH 2/3] phy: qcom: qmp-combo: Make v4/v5 targets use the right clamp

[Konrad Dybcio]

From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>

The clamp in PCS_MISC may or may not exist on some of these targets,
but in any case it's not the right one to assert. Switch over to the
one the hardware programming guide calls for.

Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
---
 drivers/phy/qualcomm/phy-qcom-qmp-combo.c  | 7 ++++++-
 drivers/phy/qualcomm/phy-qcom-qmp-pcs-v5.h | 1 +
 2 files changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
index 1c7b653975f1..84b9d6f3969c 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
@@ -159,7 +159,7 @@ static const unsigned int qmp_v45_usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = {
 	[QPHY_PCS_AUTONOMOUS_MODE_CTRL]	= QPHY_V4_PCS_USB3_AUTONOMOUS_MODE_CTRL,
 	[QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR] = QPHY_V4_PCS_USB3_LFPS_RXTERM_IRQ_CLEAR,
 
-	[QPHY_PCS_MISC_CLAMP_ENABLE]	= QPHY_V4_PCS_MISC_CLAMP_ENABLE,
+	[QPHY_PCS_CLAMP_ENABLE]		= QPHY_V4_PCS_CLAMP_ENABLE,
 
 	[QPHY_COM_RESETSM_CNTRL]	= QSERDES_V4_COM_RESETSM_CNTRL,
 	[QPHY_COM_C_READY_STATUS]	= QSERDES_V4_COM_C_READY_STATUS,
@@ -186,6 +186,7 @@ static const unsigned int qmp_v5_5nm_usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = {
 	[QPHY_PCS_AUTONOMOUS_MODE_CTRL]	= QPHY_V5_PCS_USB3_AUTONOMOUS_MODE_CTRL,
 	[QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR] = QPHY_V5_PCS_USB3_LFPS_RXTERM_IRQ_CLEAR,
 
+	[QPHY_PCS_CLAMP_ENABLE]		= QPHY_V5_PCS_CLAMP_ENABLE,
 	[QPHY_PCS_MISC_CLAMP_ENABLE]	= QPHY_V5_PCS_MISC_CLAMP_ENABLE,
 
 	[QPHY_COM_RESETSM_CNTRL]	= QSERDES_V5_COM_RESETSM_CNTRL,
@@ -4699,6 +4700,8 @@ static void qmp_combo_enable_autonomous_mode(struct qmp_combo *qmp)
 			qphy_clrbits(pcs_aon, cfg->regs[QPHY_PCS_USB4_CLAMP_ENABLE], CLAMP_EN);
 		else
 			qphy_clrbits(pcs_aon, cfg->regs[QPHY_PCS_CLAMP_ENABLE], CLAMP_EN);
+	} else if (cfg->regs[QPHY_PCS_CLAMP_ENABLE]) {
+		qphy_clrbits(qmp->pcs, cfg->regs[QPHY_PCS_CLAMP_ENABLE], CLAMP_EN);
 	} else if (pcs_misc) {
 		qphy_clrbits(pcs_misc, cfg->regs[QPHY_PCS_MISC_CLAMP_ENABLE], CLAMP_EN);
 	}
@@ -4717,6 +4720,8 @@ static void qmp_combo_disable_autonomous_mode(struct qmp_combo *qmp)
 			qphy_setbits(pcs_aon, cfg->regs[QPHY_PCS_USB4_CLAMP_ENABLE], CLAMP_EN);
 		else
 			qphy_setbits(pcs_aon, cfg->regs[QPHY_PCS_CLAMP_ENABLE], CLAMP_EN);
+	} else if (cfg->regs[QPHY_PCS_CLAMP_ENABLE]) {
+		qphy_setbits(qmp->pcs, cfg->regs[QPHY_PCS_CLAMP_ENABLE], CLAMP_EN);
 	} else if (pcs_misc) {
 		qphy_setbits(pcs_misc, cfg->regs[QPHY_PCS_MISC_CLAMP_ENABLE], CLAMP_EN);
 	}
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v5.h b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v5.h
index 36cc80bb9059..1d1688b3d7ba 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v5.h
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v5.h
@@ -11,6 +11,7 @@
 #define QPHY_V5_PCS_PCS_STATUS1				0x014
 #define QPHY_V5_PCS_POWER_DOWN_CONTROL			0x040
 #define QPHY_V5_PCS_START_CONTROL			0x044
+#define QPHY_V5_PCS_CLAMP_ENABLE			0x08c
 #define QPHY_V5_PCS_LOCK_DETECT_CONFIG1			0x0c4
 #define QPHY_V5_PCS_LOCK_DETECT_CONFIG2			0x0c8
 #define QPHY_V5_PCS_LOCK_DETECT_CONFIG3			0x0cc

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Re: [PATCH 2/3] phy: qcom: qmp-combo: Make v4/v5 targets use the right clamp

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] phy: qcom: qmp-combo: dead QPHY_PCS_MISC_CLAMP_ENABLE entry in v5 layout
--

commit 5854e61ed6a55b0bb186cbe1a5d7267876acb2c9
Author: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>

phy: qcom: qmp-combo: Make v4/v5 targets use the right clamp

This commit updates QMP v4 and v5 combo PHY register layouts and autonomous
mode helpers to use the PCS clamp register instead of the PCS_MISC clamp
register.

> diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
> index 5a4e12698d516..ff8cc26667cdc 100644
> --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
> +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
> @@ -159,7 +159,7 @@ static const unsigned int qmp_v45_usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = {
>  	[QPHY_PCS_AUTONOMOUS_MODE_CTRL]	= QPHY_V4_PCS_USB3_AUTONOMOUS_MODE_CTRL,
>  	[QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR] = QPHY_V4_PCS_USB3_LFPS_RXTERM_IRQ_CLEAR,
>  
> -	[QPHY_PCS_MISC_CLAMP_ENABLE]	= QPHY_V4_PCS_MISC_CLAMP_ENABLE,
> +	[QPHY_PCS_CLAMP_ENABLE]		= QPHY_V4_PCS_CLAMP_ENABLE,
>  
>  	[QPHY_COM_RESETSM_CNTRL]	= QSERDES_V4_COM_RESETSM_CNTRL,
>  	[QPHY_COM_C_READY_STATUS]	= QSERDES_V4_COM_C_READY_STATUS,
> @@ -186,6 +186,7 @@ static const unsigned int qmp_v5_5nm_usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = {
>  	[QPHY_PCS_AUTONOMOUS_MODE_CTRL]	= QPHY_V5_PCS_USB3_AUTONOMOUS_MODE_CTRL,
>  	[QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR] = QPHY_V5_PCS_USB3_LFPS_RXTERM_IRQ_CLEAR,
>  
> +	[QPHY_PCS_CLAMP_ENABLE]		= QPHY_V5_PCS_CLAMP_ENABLE,
>  	[QPHY_PCS_MISC_CLAMP_ENABLE]	= QPHY_V5_PCS_MISC_CLAMP_ENABLE,

[Severity: Low]
This isn't a bug, but should QPHY_PCS_MISC_CLAMP_ENABLE also be removed from
qmp_v5_5nm_usb3phy_regs_layout here, matching qmp_v45_usb3phy_regs_layout?

In qmp_combo_enable_autonomous_mode() and qmp_combo_disable_autonomous_mode(),
the new cfg->regs[QPHY_PCS_CLAMP_ENABLE] branch is checked before the
pcs_misc fallback:

	} else if (cfg->regs[QPHY_PCS_CLAMP_ENABLE]) {
		qphy_clrbits(qmp->pcs, cfg->regs[QPHY_PCS_CLAMP_ENABLE], CLAMP_EN);
	} else if (pcs_misc) {
		qphy_clrbits(pcs_misc, cfg->regs[QPHY_PCS_MISC_CLAMP_ENABLE], CLAMP_EN);
	}

Since QPHY_V5_PCS_CLAMP_ENABLE is non-zero (0x08c), the pcs_misc branch using
QPHY_PCS_MISC_CLAMP_ENABLE is no longer reachable for this layout. Dropping
that entry would also allow removing the now-unused phy-qcom-qmp-pcs-misc-v4.h
and phy-qcom-qmp-pcs-misc-v5.h includes from phy-qcom-qmp-combo.c.

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Re: [PATCH 2/3] phy: qcom: qmp-combo: Make v4/v5 targets use the right clamp

[Abel Vesa]

On 26-11-02 14:59:33, Konrad Dybcio wrote:
> From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
> 
> The clamp in PCS_MISC may or may not exist on some of these targets,
> but in any case it's not the right one to assert. Switch over to the
> one the hardware programming guide calls for.
> 
> Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>

Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>

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[PATCH 3/3] phy: qcom: qmp-combo: Use V6 offsets for PCS-AON clamps

[Konrad Dybcio]

From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>

These V6 combo PHYs were configured with the V3 resource-offset table,
which omits their PCS-AON window. Autonomous-mode suspend therefore
cannot reach the HPG-required clamp register.

Select the existing V6 offsets for SAR2130P, SM8475, SM8550, and
SM8650.

Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
---
 drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
index 84b9d6f3969c..f9ab503c81ac 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
@@ -2793,7 +2793,7 @@ static const struct qmp_combo_offsets qmp_combo_usb43dp_offsets_v8 = {
 };
 
 static const struct qmp_phy_cfg sar2130p_usb3dpphy_cfg = {
-	.offsets		= &qmp_combo_offsets_v3,
+	.offsets		= &qmp_combo_offsets_v6,
 
 	.serdes_tbl		= sar2130p_usb3_serdes_tbl,
 	.serdes_tbl_num		= ARRAY_SIZE(sar2130p_usb3_serdes_tbl),
@@ -3224,7 +3224,7 @@ static const struct qmp_phy_cfg sm8350_usb3dpphy_cfg = {
 };
 
 static const struct qmp_phy_cfg sm8475_usb3dpphy_cfg = {
-	.offsets		= &qmp_combo_offsets_v3,
+	.offsets		= &qmp_combo_offsets_v6,
 
 	.serdes_tbl		= sar2130p_usb3_serdes_tbl,
 	.serdes_tbl_num		= ARRAY_SIZE(sar2130p_usb3_serdes_tbl),
@@ -3269,7 +3269,7 @@ static const struct qmp_phy_cfg sm8475_usb3dpphy_cfg = {
 };
 
 static const struct qmp_phy_cfg sm8550_usb3dpphy_cfg = {
-	.offsets		= &qmp_combo_offsets_v3,
+	.offsets		= &qmp_combo_offsets_v6,
 
 	.serdes_tbl		= sm8550_usb3_serdes_tbl,
 	.serdes_tbl_num		= ARRAY_SIZE(sm8550_usb3_serdes_tbl),
@@ -3314,7 +3314,7 @@ static const struct qmp_phy_cfg sm8550_usb3dpphy_cfg = {
 };
 
 static const struct qmp_phy_cfg sm8650_usb3dpphy_cfg = {
-	.offsets		= &qmp_combo_offsets_v3,
+	.offsets		= &qmp_combo_offsets_v6,
 
 	.serdes_tbl		= sm8550_usb3_serdes_tbl,
 	.serdes_tbl_num		= ARRAY_SIZE(sm8550_usb3_serdes_tbl),

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Re: [PATCH 3/3] phy: qcom: qmp-combo: Use V6 offsets for PCS-AON clamps

[Abel Vesa]

On 26-11-02 14:59:34, Konrad Dybcio wrote:
> From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
> 
> These V6 combo PHYs were configured with the V3 resource-offset table,
> which omits their PCS-AON window. Autonomous-mode suspend therefore
> cannot reach the HPG-required clamp register.
> 
> Select the existing V6 offsets for SAR2130P, SM8475, SM8550, and
> SM8650.
> 
> Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>

Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>

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