* [PATCH v3 0/7] Handle non-fatal errors routed via IRQ
@ 2026-11-03 6:09 Riana Tauro
2026-11-03 6:09 ` [PATCH v3 1/7] drm/xe/hw_error: Reuse CSC worker for generic error handling Riana Tauro
` (9 more replies)
0 siblings, 10 replies; 23+ messages in thread
From: Riana Tauro @ 2026-11-03 6:09 UTC (permalink / raw)
To: intel-xe
Cc: riana.tauro, anshuman.gupta, rodrigo.vivi, aravind.iddamsetty,
raag.jadav, ravi.kishore.koppuravuri, mallesh.koujalagi,
tejas.upadhyay
Implement wa_14028434957 on platform CRI
Process, log and recover non-fatal errors routed via direct IRQ.
Double-bit ECC errors are also reported as non-fatal errors. Process and
offline pages for user bos. Critical Bo's require a SBR to recover.
Wedge the device with bus reset.
Race Case Handling:
There is a potential race between errors reported via AER that require
an SBR (Secondary Bus Reset) and non-fatal errors still being processed
by the worker. Since a reset is imminent once AER reports such an
error, the worker processing non-fatal errors is flushed and disabled.
There is also a possibility of the AER handler running first, in which
case firmware reports all pending errors including non-fatal ones as a
single response, since it maintains a single queue for all error types.
Skip handling of double-bit ECC errors in that case, since the SBR already
clears the offlined pages on reload and firmware drops them from its queue
once read, so offlining them here would be unnecessary and could leave the
queue and the soft-offlined pages list out of sync.
Rev2: Handle Race between AER
Use WA number
Rev3: Reorder patches to fix sashiko comments
squash all WA patches
remove delayed worker
Raag Jadav (1):
drm/xe/hw_error: Reuse CSC worker for generic error handling
Riana Tauro (6):
drm/xe/hw_error: Initialize hw_error_work per tile
drm/xe/ras: Treat non-fatal PCIe errors as recovered
drm/xe/pci: Add upstream switch port lookup helper
drm/xe/xe_ras: Add a flag for uncorrectable internal error
drm/xe: Add support for wa_14028434957
drm/xe/xe_ras: Skip double-bit ECC page offlining on AER path
drivers/gpu/drm/xe/xe_device.c | 3 +
drivers/gpu/drm/xe/xe_device_wa_oob.rules | 1 +
drivers/gpu/drm/xe/xe_hw_error.c | 64 +++++++++++++++---
drivers/gpu/drm/xe/xe_hw_error.h | 1 +
drivers/gpu/drm/xe/xe_pci.c | 23 +++++++
drivers/gpu/drm/xe/xe_pci.h | 1 +
drivers/gpu/drm/xe/xe_pci_error.c | 36 +++++++++++
drivers/gpu/drm/xe/xe_ras.c | 79 +++++++++++++++++------
drivers/gpu/drm/xe/xe_ras.h | 2 +
drivers/gpu/drm/xe/xe_ras_types.h | 2 +
drivers/gpu/drm/xe/xe_tile_types.h | 4 +-
11 files changed, 184 insertions(+), 32 deletions(-)
--
2.47.1
^ permalink raw reply [flat|nested] 23+ messages in thread
* [PATCH v3 1/7] drm/xe/hw_error: Reuse CSC worker for generic error handling
2026-11-03 6:09 [PATCH v3 0/7] Handle non-fatal errors routed via IRQ Riana Tauro
@ 2026-11-03 6:09 ` Riana Tauro
2026-11-03 6:27 ` Mallesh, Koujalagi
2026-11-03 6:09 ` [PATCH v3 2/7] drm/xe/hw_error: Initialize hw_error_work per tile Riana Tauro
` (8 subsequent siblings)
9 siblings, 1 reply; 23+ messages in thread
From: Riana Tauro @ 2026-11-03 6:09 UTC (permalink / raw)
To: intel-xe
Cc: riana.tauro, anshuman.gupta, rodrigo.vivi, aravind.iddamsetty,
raag.jadav, ravi.kishore.koppuravuri, mallesh.koujalagi,
tejas.upadhyay
From: Raag Jadav <raag.jadav@intel.com>
We have upcoming usecases which require defering work during error
handling. Since we already have CSC worker in place, prepare it to
be reused generically.
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Reviewed-by: Riana Tauro <riana.tauro@intel.com>
---
v2: Remove delayed work
---
drivers/gpu/drm/xe/xe_hw_error.c | 10 +++++-----
drivers/gpu/drm/xe/xe_tile_types.h | 4 ++--
2 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_hw_error.c b/drivers/gpu/drm/xe/xe_hw_error.c
index ac720710c8e8..a934b649575c 100644
--- a/drivers/gpu/drm/xe/xe_hw_error.c
+++ b/drivers/gpu/drm/xe/xe_hw_error.c
@@ -166,9 +166,9 @@ static_assert(ARRAY_SIZE(pvc_master_local_nonfatal_err_reg) == XE_RAS_REG_SIZE);
pvc_master_local_fatal_err_reg : \
pvc_master_local_nonfatal_err_reg)
-static void csc_hw_error_work(struct work_struct *work)
+static void hw_error_work(struct work_struct *work)
{
- struct xe_tile *tile = container_of(work, typeof(*tile), csc_hw_error_work);
+ struct xe_tile *tile = container_of(work, typeof(*tile), hw_error_work);
struct xe_device *xe = tile_to_xe(tile);
guard(xe_pm_runtime)(xe);
@@ -204,7 +204,7 @@ static void csc_hw_error_handler(struct xe_tile *tile, const enum hardware_error
hec_uncorrected_fw_errors[err_bit], severity_str,
err_bit);
- schedule_work(&tile->csc_hw_error_work);
+ schedule_work(&tile->hw_error_work);
}
}
@@ -513,7 +513,7 @@ void xe_hw_error_irq_handler(struct xe_tile *tile, const u32 master_ctl)
enum hardware_error hw_err;
if (xe_fault_csc_hw_error())
- schedule_work(&tile->csc_hw_error_work);
+ schedule_work(&tile->hw_error_work);
for (hw_err = 0; hw_err < HARDWARE_ERROR_MAX; hw_err++) {
if (master_ctl & ERROR_IRQ(hw_err))
@@ -551,7 +551,7 @@ void xe_hw_error_init(struct xe_device *xe)
if (!IS_DGFX(xe) || IS_SRIOV_VF(xe))
return;
- INIT_WORK(&tile->csc_hw_error_work, csc_hw_error_work);
+ INIT_WORK(&tile->hw_error_work, hw_error_work);
process_hw_errors(xe);
}
diff --git a/drivers/gpu/drm/xe/xe_tile_types.h b/drivers/gpu/drm/xe/xe_tile_types.h
index e1368c04846a..3dc011f111a4 100644
--- a/drivers/gpu/drm/xe/xe_tile_types.h
+++ b/drivers/gpu/drm/xe/xe_tile_types.h
@@ -118,8 +118,8 @@ struct xe_tile {
/** @memirq: Memory Based Interrupts. */
struct xe_memirq memirq;
- /** @csc_hw_error_work: worker to report CSC HW errors */
- struct work_struct csc_hw_error_work;
+ /** @hw_error_work: worker to handle HW errors */
+ struct work_struct hw_error_work;
/** @pcode: tile's PCODE */
struct {
--
2.47.1
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH v3 2/7] drm/xe/hw_error: Initialize hw_error_work per tile
2026-11-03 6:09 [PATCH v3 0/7] Handle non-fatal errors routed via IRQ Riana Tauro
2026-11-03 6:09 ` [PATCH v3 1/7] drm/xe/hw_error: Reuse CSC worker for generic error handling Riana Tauro
@ 2026-11-03 6:09 ` Riana Tauro
2026-11-03 6:23 ` sashiko-bot
2026-11-04 9:31 ` Mallesh, Koujalagi
2026-11-03 6:09 ` [PATCH v3 3/7] drm/xe/ras: Treat non-fatal PCIe errors as recovered Riana Tauro
` (7 subsequent siblings)
9 siblings, 2 replies; 23+ messages in thread
From: Riana Tauro @ 2026-11-03 6:09 UTC (permalink / raw)
To: intel-xe
Cc: riana.tauro, anshuman.gupta, rodrigo.vivi, aravind.iddamsetty,
raag.jadav, ravi.kishore.koppuravuri, mallesh.koujalagi,
tejas.upadhyay
Since hw_error_work is now being reused generically, initialize it per tile
so that we don't hit uninitialized work for non-root tile. While at it,
disable hw_error_work on remove to prevent UAF during unwind.
Signed-off-by: Riana Tauro <riana.tauro@intel.com>
---
v2: move disable work to xe_device_remove
add dgfx and sriov check (Sashiko)
---
drivers/gpu/drm/xe/xe_device.c | 3 +++
drivers/gpu/drm/xe/xe_hw_error.c | 24 ++++++++++++++++++++++--
drivers/gpu/drm/xe/xe_hw_error.h | 1 +
3 files changed, 26 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index 07a7ab6ac083..8f498e3e3e58 100644
--- a/drivers/gpu/drm/xe/xe_device.c
+++ b/drivers/gpu/drm/xe/xe_device.c
@@ -45,6 +45,7 @@
#include "xe_guc.h"
#include "xe_guc_pc.h"
#include "xe_hw_engine_group.h"
+#include "xe_hw_error.h"
#include "xe_hwmon.h"
#include "xe_i2c.h"
#include "xe_irq.h"
@@ -1118,6 +1119,8 @@ int xe_device_probe(struct xe_device *xe)
void xe_device_remove(struct xe_device *xe)
{
+ xe_hw_error_work_disable(xe);
+
xe_display_unregister(xe);
drm_dev_unplug(&xe->drm);
diff --git a/drivers/gpu/drm/xe/xe_hw_error.c b/drivers/gpu/drm/xe/xe_hw_error.c
index a934b649575c..aaa2437d40bf 100644
--- a/drivers/gpu/drm/xe/xe_hw_error.c
+++ b/drivers/gpu/drm/xe/xe_hw_error.c
@@ -537,6 +537,24 @@ static void process_hw_errors(struct xe_device *xe)
}
}
+/**
+ * xe_hw_error_work_disable - Disable hw error work
+ * @xe: xe device instance
+ *
+ * This function disables work for hardware error handling for all tiles.
+ */
+void xe_hw_error_work_disable(struct xe_device *xe)
+{
+ struct xe_tile *tile;
+ u8 id;
+
+ if (!IS_DGFX(xe) || IS_SRIOV_VF(xe))
+ return;
+
+ for_each_tile(tile, xe, id)
+ disable_work_sync(&tile->hw_error_work);
+}
+
/**
* xe_hw_error_init - Initialize hw errors
* @xe: xe device instance
@@ -546,12 +564,14 @@ static void process_hw_errors(struct xe_device *xe)
*/
void xe_hw_error_init(struct xe_device *xe)
{
- struct xe_tile *tile = xe_device_get_root_tile(xe);
+ struct xe_tile *tile;
+ u8 id;
if (!IS_DGFX(xe) || IS_SRIOV_VF(xe))
return;
- INIT_WORK(&tile->hw_error_work, hw_error_work);
+ for_each_tile(tile, xe, id)
+ INIT_WORK(&tile->hw_error_work, hw_error_work);
process_hw_errors(xe);
}
diff --git a/drivers/gpu/drm/xe/xe_hw_error.h b/drivers/gpu/drm/xe/xe_hw_error.h
index 5e3a11424108..944699331a93 100644
--- a/drivers/gpu/drm/xe/xe_hw_error.h
+++ b/drivers/gpu/drm/xe/xe_hw_error.h
@@ -12,4 +12,5 @@ struct xe_device;
void xe_hw_error_irq_handler(struct xe_tile *tile, const u32 master_ctl);
void xe_hw_error_init(struct xe_device *xe);
+void xe_hw_error_work_disable(struct xe_device *xe);
#endif
--
2.47.1
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH v3 3/7] drm/xe/ras: Treat non-fatal PCIe errors as recovered
2026-11-03 6:09 [PATCH v3 0/7] Handle non-fatal errors routed via IRQ Riana Tauro
2026-11-03 6:09 ` [PATCH v3 1/7] drm/xe/hw_error: Reuse CSC worker for generic error handling Riana Tauro
2026-11-03 6:09 ` [PATCH v3 2/7] drm/xe/hw_error: Initialize hw_error_work per tile Riana Tauro
@ 2026-11-03 6:09 ` Riana Tauro
2026-11-03 6:19 ` Mallesh, Koujalagi
2026-11-03 6:09 ` [PATCH v3 4/7] drm/xe/pci: Add upstream switch port lookup helper Riana Tauro
` (6 subsequent siblings)
9 siblings, 1 reply; 23+ messages in thread
From: Riana Tauro @ 2026-11-03 6:09 UTC (permalink / raw)
To: intel-xe
Cc: riana.tauro, anshuman.gupta, rodrigo.vivi, aravind.iddamsetty,
raag.jadav, ravi.kishore.koppuravuri, mallesh.koujalagi,
tejas.upadhyay
On systems lacking RAS capability, only PCIe errors are reported, via
AER, not device errors. Non-fatal PCIe errors reported at the Upstream
Switch Port (USP) have no impact on link or device state, so treat
them as recovered without requiring a secondary bus reset (SBR).
Fixes: 25913a062cd4 ("drm/xe/xe_ras: Add support for uncorrectable core-compute errors")
Signed-off-by: Riana Tauro <riana.tauro@intel.com>
---
drivers/gpu/drm/xe/xe_ras.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
index 2c01c183d02b..cd753c82b0ff 100644
--- a/drivers/gpu/drm/xe/xe_ras.c
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -830,7 +830,7 @@ enum xe_ras_recovery_action xe_ras_process_errors(struct xe_device *xe)
}
if (!xe->info.has_sysctrl)
- return XE_RAS_RECOVERY_ACTION_RESET;
+ return XE_RAS_RECOVERY_ACTION_RECOVERED;
BUILD_BUG_ON(BITS_PER_TYPE(sent) < XE_RAS_COMP_MAX);
/* Default action */
--
2.47.1
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH v3 4/7] drm/xe/pci: Add upstream switch port lookup helper
2026-11-03 6:09 [PATCH v3 0/7] Handle non-fatal errors routed via IRQ Riana Tauro
` (2 preceding siblings ...)
2026-11-03 6:09 ` [PATCH v3 3/7] drm/xe/ras: Treat non-fatal PCIe errors as recovered Riana Tauro
@ 2026-11-03 6:09 ` Riana Tauro
2026-11-03 6:09 ` [PATCH v3 5/7] drm/xe/xe_ras: Add a flag for uncorrectable internal error Riana Tauro
` (5 subsequent siblings)
9 siblings, 0 replies; 23+ messages in thread
From: Riana Tauro @ 2026-11-03 6:09 UTC (permalink / raw)
To: intel-xe
Cc: riana.tauro, anshuman.gupta, rodrigo.vivi, aravind.iddamsetty,
raag.jadav, ravi.kishore.koppuravuri, mallesh.koujalagi,
tejas.upadhyay, Andi Shyti
Move the USP lookup logic out of RAS code and into the PCI
layer so it can be reused by other callers.
No functional change.
Signed-off-by: Riana Tauro <riana.tauro@intel.com>
Reviewed-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
---
drivers/gpu/drm/xe/xe_pci.c | 23 +++++++++++++++++++++++
drivers/gpu/drm/xe/xe_pci.h | 1 +
drivers/gpu/drm/xe/xe_ras.c | 19 ++-----------------
3 files changed, 26 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index d13599d79ae9..1fa9b683f045 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -1524,6 +1524,29 @@ struct xe_device *xe_pci_to_pf_device(struct pci_dev *pdev)
return to_xe_device(drm);
}
+/**
+ * xe_pci_get_usp_dev() - Get the upstream switch port device.
+ * @pdev: pci device of SGunit
+ *
+ * Device Hierarchy:
+ * Upstream Switch Port (USP) --> Virtual Switch Port (VSP) --> SGunit (GPU endpoint)
+ *
+ * The function traverses the PCI device hierarchy to find the upstream switch port
+ * device.
+ *
+ * Return: pointer to USP &pci_dev, NULL otherwise.
+ */
+struct pci_dev *xe_pci_get_usp_dev(struct pci_dev *pdev)
+{
+ struct pci_dev *vsp;
+
+ vsp = pci_upstream_bridge(pdev);
+ if (!vsp)
+ return NULL;
+
+ return pci_upstream_bridge(vsp);
+}
+
int xe_register_pci_driver(void)
{
return pci_register_driver(&xe_pci_driver);
diff --git a/drivers/gpu/drm/xe/xe_pci.h b/drivers/gpu/drm/xe/xe_pci.h
index 11bcc5fe2c5b..3dc3539c3970 100644
--- a/drivers/gpu/drm/xe/xe_pci.h
+++ b/drivers/gpu/drm/xe/xe_pci.h
@@ -11,5 +11,6 @@ struct pci_dev;
int xe_register_pci_driver(void);
void xe_unregister_pci_driver(void);
struct xe_device *xe_pci_to_pf_device(struct pci_dev *pdev);
+struct pci_dev *xe_pci_get_usp_dev(struct pci_dev *pdev);
#endif
diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
index cd753c82b0ff..3aea4969af13 100644
--- a/drivers/gpu/drm/xe/xe_ras.c
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -13,6 +13,7 @@
#include "xe_device.h"
#include "xe_drm_ras.h"
#include "xe_log.h"
+#include "xe_pci.h"
#include "xe_pm.h"
#include "xe_printk.h"
#include "xe_ras.h"
@@ -504,22 +505,6 @@ static void get_offline_list(struct xe_device *xe)
&response, sizeof(response), &response.common, false);
}
-static struct pci_dev *find_usp_dev(struct pci_dev *pdev)
-{
- struct pci_dev *vsp;
-
- /*
- * Device Hierarchy:
- *
- * Upstream Switch Port (USP) --> Virtual Switch Port (VSP) --> SGunit (GPU endpoint)
- */
- vsp = pci_upstream_bridge(pdev);
- if (!vsp)
- return NULL;
-
- return pci_upstream_bridge(vsp);
-}
-
static void ras_usp_aer_init(struct xe_device *xe)
{
struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
@@ -527,7 +512,7 @@ static void ras_usp_aer_init(struct xe_device *xe)
u16 aer_cap;
u32 status;
- usp = find_usp_dev(pdev);
+ usp = xe_pci_get_usp_dev(pdev);
if (!usp)
return;
--
2.47.1
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH v3 5/7] drm/xe/xe_ras: Add a flag for uncorrectable internal error
2026-11-03 6:09 [PATCH v3 0/7] Handle non-fatal errors routed via IRQ Riana Tauro
` (3 preceding siblings ...)
2026-11-03 6:09 ` [PATCH v3 4/7] drm/xe/pci: Add upstream switch port lookup helper Riana Tauro
@ 2026-11-03 6:09 ` Riana Tauro
2026-11-03 8:19 ` Mallesh, Koujalagi
2026-11-03 6:09 ` [PATCH v3 6/7] drm/xe: Add support for wa_14028434957 Riana Tauro
` (4 subsequent siblings)
9 siblings, 1 reply; 23+ messages in thread
From: Riana Tauro @ 2026-11-03 6:09 UTC (permalink / raw)
To: intel-xe
Cc: riana.tauro, anshuman.gupta, rodrigo.vivi, aravind.iddamsetty,
raag.jadav, ravi.kishore.koppuravuri, mallesh.koujalagi,
tejas.upadhyay
Introduce a flag with get/set accessors to record when an
uncorrectable internal error was reported via AER.
Signed-off-by: Riana Tauro <riana.tauro@intel.com>
---
v2: add PCI_POSSIBLE_ERROR
fix kernel-doc
rename aer_path to internal error
---
drivers/gpu/drm/xe/xe_pci_error.c | 26 ++++++++++++++++++++++++++
drivers/gpu/drm/xe/xe_ras.c | 20 ++++++++++++++++++++
drivers/gpu/drm/xe/xe_ras.h | 2 ++
drivers/gpu/drm/xe/xe_ras_types.h | 2 ++
4 files changed, 50 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_pci_error.c b/drivers/gpu/drm/xe/xe_pci_error.c
index 9bf0da3a3d15..4ade392b47be 100644
--- a/drivers/gpu/drm/xe/xe_pci_error.c
+++ b/drivers/gpu/drm/xe/xe_pci_error.c
@@ -54,6 +54,29 @@ static pci_ers_result_t ras_action_to_pci_result(struct pci_dev *pdev, u8 action
}
}
+static bool is_aer_internal_error(struct pci_dev *pdev)
+{
+ struct pci_dev *usp;
+ u16 aer_cap;
+ u32 status;
+
+ usp = xe_pci_get_usp_dev(pdev);
+ if (!usp)
+ return false;
+
+ aer_cap = pci_find_ext_capability(usp, PCI_EXT_CAP_ID_ERR);
+ if (!aer_cap) {
+ dev_warn_once(&usp->dev, "AER capability unavailable\n");
+ return false;
+ }
+
+ pci_read_config_dword(usp, aer_cap + PCI_ERR_UNCOR_STATUS, &status);
+ if (PCI_POSSIBLE_ERROR(status))
+ return false;
+
+ return status & PCI_ERR_UNC_INTN;
+}
+
static pci_ers_result_t xe_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
{
struct xe_device *xe = pdev_to_xe_device(pdev);
@@ -67,6 +90,9 @@ static pci_ers_result_t xe_pci_error_detected(struct pci_dev *pdev, pci_channel_
if (xe_survivability_mode_is_boot_enabled(xe) || xe_wedged(xe))
return PCI_ERS_RESULT_DISCONNECT;
+ if (is_aer_internal_error(pdev))
+ xe_ras_set_aer_internal_error(xe);
+
switch (state) {
case pci_channel_io_normal:
return PCI_ERS_RESULT_CAN_RECOVER;
diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
index 3aea4969af13..58a0b5fa676d 100644
--- a/drivers/gpu/drm/xe/xe_ras.c
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -1253,6 +1253,26 @@ u32 xe_ras_get_max_pages(struct xe_device *xe)
return xe->ras.state.max_pages;
}
+/**
+ * xe_ras_is_aer_internal_error() - Check if an uncorrectable internal error was reported via AER
+ * @xe: xe device instance
+ *
+ * Return: true if an uncorrectable internal error was reported via AER, false otherwise.
+ */
+bool xe_ras_is_aer_internal_error(struct xe_device *xe)
+{
+ return xe->ras.state.aer_internal_error;
+}
+
+/**
+ * xe_ras_set_aer_internal_error() - Set if an uncorrectable internal error is reported via AER
+ * @xe: xe device instance
+ */
+void xe_ras_set_aer_internal_error(struct xe_device *xe)
+{
+ xe->ras.state.aer_internal_error = true;
+}
+
/**
* xe_ras_init - Initialize Xe RAS
* @xe: xe device instance
diff --git a/drivers/gpu/drm/xe/xe_ras.h b/drivers/gpu/drm/xe/xe_ras.h
index c44fa172011f..f7b587ac84e3 100644
--- a/drivers/gpu/drm/xe/xe_ras.h
+++ b/drivers/gpu/drm/xe/xe_ras.h
@@ -25,5 +25,7 @@ bool xe_ras_get_disable_vram_page_offline(struct xe_device *xe);
u32 xe_ras_get_max_pages(struct xe_device *xe);
int xe_ras_get_counter_response(struct xe_device *xe, const struct xe_ras_error_class *counter,
struct xe_ras_get_counter_response *response);
+bool xe_ras_is_aer_internal_error(struct xe_device *xe);
+void xe_ras_set_aer_internal_error(struct xe_device *xe);
#endif
diff --git a/drivers/gpu/drm/xe/xe_ras_types.h b/drivers/gpu/drm/xe/xe_ras_types.h
index a86f9d2b8c92..0ff5803d495b 100644
--- a/drivers/gpu/drm/xe/xe_ras_types.h
+++ b/drivers/gpu/drm/xe/xe_ras_types.h
@@ -414,6 +414,8 @@ struct xe_ras_set_health_response {
* struct xe_ras_state - RAS device and firmware state
*/
struct xe_ras_state {
+ /** @aer_internal_error: true if an uncorrectable internal error was reported via AER */
+ bool aer_internal_error;
/** @disable_vram_page_offline: cached configfs policy, immutable after init */
bool disable_vram_page_offline;
/** @max_pages: Total number of pages that can be stored by firmware */
--
2.47.1
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH v3 6/7] drm/xe: Add support for wa_14028434957
2026-11-03 6:09 [PATCH v3 0/7] Handle non-fatal errors routed via IRQ Riana Tauro
` (4 preceding siblings ...)
2026-11-03 6:09 ` [PATCH v3 5/7] drm/xe/xe_ras: Add a flag for uncorrectable internal error Riana Tauro
@ 2026-11-03 6:09 ` Riana Tauro
2026-11-03 6:33 ` sashiko-bot
2026-11-04 10:38 ` Mallesh, Koujalagi
2026-11-03 6:09 ` [PATCH v3 7/7] drm/xe/xe_ras: Skip double-bit ECC page offlining on AER path Riana Tauro
` (3 subsequent siblings)
9 siblings, 2 replies; 23+ messages in thread
From: Riana Tauro @ 2026-11-03 6:09 UTC (permalink / raw)
To: intel-xe
Cc: riana.tauro, anshuman.gupta, rodrigo.vivi, aravind.iddamsetty,
raag.jadav, ravi.kishore.koppuravuri, mallesh.koujalagi,
tejas.upadhyay, Andi Shyti
Add support for wa_14028434957 on platform CRI.
Non-fatal device errors are reported via a direct IRQ, while fatal
device errors are downgraded to non-fatal uncorrectable internal
errors and reported via AER.
Add support to process and log non-fatal errors routed via the direct
IRQ path. Most non-fatal errors require no reset, except double-bit
ECC errors affecting a critical BO, for which the device is wedged
with a bus reset as the recovery action.
For uncorrectable internal errors reported via AER, request a
secondary bus reset to recover. To avoid a race between the two
paths, if non-fatal error processing is in progress when an
uncorrectable internal error occurs, flush and disable the worker
to prevent further processing, since a reset is
imminent.
Cc: Andi Shyti <andi.shyti@linux.intel.com>
Signed-off-by: Riana Tauro <riana.tauro@intel.com>
---
v2: use platform instead of graphics version (Gustavo)
combine patches (Tejas, Mallesh)
remove 1sec delayed worker (Andi)
---
drivers/gpu/drm/xe/xe_device_wa_oob.rules | 1 +
drivers/gpu/drm/xe/xe_hw_error.c | 31 ++++++++++++++++++++---
drivers/gpu/drm/xe/xe_pci_error.c | 12 ++++++++-
drivers/gpu/drm/xe/xe_ras.c | 21 +++++++++++++--
4 files changed, 58 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_device_wa_oob.rules b/drivers/gpu/drm/xe/xe_device_wa_oob.rules
index 356b4707dafe..3a8ef8abafc5 100644
--- a/drivers/gpu/drm/xe/xe_device_wa_oob.rules
+++ b/drivers/gpu/drm/xe/xe_device_wa_oob.rules
@@ -6,3 +6,4 @@
14026633728 PLATFORM(CRESCENTISLAND)
14026746987 PLATFORM(CRESCENTISLAND)
14026779378 PLATFORM(CRESCENTISLAND)
+14028434957 PLATFORM(CRESCENTISLAND)
diff --git a/drivers/gpu/drm/xe/xe_hw_error.c b/drivers/gpu/drm/xe/xe_hw_error.c
index 39ff1e8cc156..2ab49ffdf49f 100644
--- a/drivers/gpu/drm/xe/xe_hw_error.c
+++ b/drivers/gpu/drm/xe/xe_hw_error.c
@@ -5,6 +5,8 @@
#include <linux/bitmap.h>
+#include <generated/xe_device_wa_oob.h>
+
#include "regs/xe_gsc_regs.h"
#include "regs/xe_hw_error_regs.h"
#include "regs/xe_irq_regs.h"
@@ -15,7 +17,11 @@
#include "xe_hw_error.h"
#include "xe_mmio.h"
#include "xe_pm.h"
+#include "xe_ras.h"
#include "xe_survivability_mode.h"
+#include "xe_wa.h"
+#include "xe_wedge.h"
+
#define GT_HW_ERROR_MAX_ERR_BITS 16
#define HEC_UNCORR_FW_ERR_BITS 4
@@ -171,7 +177,24 @@ static void hw_error_work(struct work_struct *work)
struct xe_tile *tile = container_of(work, typeof(*tile), hw_error_work);
struct xe_device *xe = tile_to_xe(tile);
+ /* Skip hw error processing if device is already wedged */
+ if (xe_wedged(xe))
+ return;
+
guard(xe_pm_runtime)(xe);
+
+ if (xe->info.has_sysctrl && XE_DEVICE_WA(xe, 14028434957)) {
+ /*
+ * Skip handling if an uncorrectable internal error is reported as
+ * reset is imminent
+ */
+ if (xe_ras_is_aer_internal_error(xe))
+ return;
+
+ xe_ras_process_errors(xe);
+ return;
+ }
+
xe_survivability_mode_runtime_enable(xe);
}
@@ -433,12 +456,12 @@ static void hw_error_source_handler(struct xe_tile *tile, const enum hardware_er
return;
/*
- * Hardware errors are reported through System Controller on the platforms that
- * support it, and never routed as direct IRQ to SGUnit. So we should never be
- * here for those platforms.
+ * Non-fatal errors are routed as a direct IRQ on platforms that support
+ * system controller.
*/
if (xe->info.has_sysctrl) {
- drm_err_ratelimited(&xe->drm, HW_ERR "Invalid error routing\n");
+ drm_err_ratelimited(&xe->drm, HW_ERR "Non-fatal %s reported\n", severity_str);
+ schedule_work(&tile->hw_error_work);
return;
}
diff --git a/drivers/gpu/drm/xe/xe_pci_error.c b/drivers/gpu/drm/xe/xe_pci_error.c
index 4ade392b47be..c27fd22e28ac 100644
--- a/drivers/gpu/drm/xe/xe_pci_error.c
+++ b/drivers/gpu/drm/xe/xe_pci_error.c
@@ -5,14 +5,18 @@
#include <linux/pci.h>
+#include <generated/xe_device_wa_oob.h>
+
#include "xe_device.h"
#include "xe_gt.h"
+#include "xe_hw_error.h"
#include "xe_log.h"
#include "xe_pci.h"
#include "xe_pm.h"
#include "xe_printk.h"
#include "xe_ras.h"
#include "xe_survivability_mode.h"
+#include "xe_wa.h"
#include "xe_wedge.h"
static void prepare_device_for_reset(struct pci_dev *pdev)
@@ -90,8 +94,14 @@ static pci_ers_result_t xe_pci_error_detected(struct pci_dev *pdev, pci_channel_
if (xe_survivability_mode_is_boot_enabled(xe) || xe_wedged(xe))
return PCI_ERS_RESULT_DISCONNECT;
- if (is_aer_internal_error(pdev))
+ /*
+ * If non-fatal error processing is in progress when uncorrectable internal error occurs,
+ * flush and disable the worker to prevent further processing, as a reset is imminent.
+ */
+ if (XE_DEVICE_WA(xe, 14028434957) && is_aer_internal_error(pdev)) {
xe_ras_set_aer_internal_error(xe);
+ xe_hw_error_work_disable(xe);
+ }
switch (state) {
case pci_channel_io_normal:
diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
index 58a0b5fa676d..1809c3c893de 100644
--- a/drivers/gpu/drm/xe/xe_ras.c
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -5,6 +5,8 @@
#include <linux/bitfield.h>
+#include <generated/xe_device_wa_oob.h>
+
#include "xe_assert.h"
#include "xe_bo.h"
#include "xe_configfs.h"
@@ -23,6 +25,7 @@
#include "xe_sysctrl_mailbox.h"
#include "xe_sysctrl_mailbox_types.h"
#include "xe_ttm_vram_mgr.h"
+#include "xe_wa.h"
#include "xe_wedge.h"
/* Any non-null entry marks the page as offlined by firmware */
@@ -671,8 +674,15 @@ static u8 handle_device_memory_errors(struct xe_device *xe, struct xe_ras_error_
DEVICE_MEMORY, &arr->counter, sizeof(arr->counter),
"Double-bit ECC error detected at sw address 0x%llx\n",
info->sw_address);
- if (ret)
+ /*
+ * Double-bit ECC errors are non-fatal errors and are reported via IRQ.
+ * Wedge the device with a bus reset for errors that require SBR to recover.
+ * TODO: Trigger SBR using pci_reset_bus
+ */
+ if (ret) {
+ xe_wedge_declare(xe, DRM_WEDGE_RECOVERY_BUS_RESET);
return XE_RAS_RECOVERY_ACTION_RESET;
+ }
break;
default:
xe_log_comp(xe, cper_sev, DEVICE_MEMORY, &arr->counter, sizeof(arr->counter),
@@ -818,9 +828,16 @@ enum xe_ras_recovery_action xe_ras_process_errors(struct xe_device *xe)
return XE_RAS_RECOVERY_ACTION_RECOVERED;
BUILD_BUG_ON(BITS_PER_TYPE(sent) < XE_RAS_COMP_MAX);
- /* Default action */
+ /* Default action for PCIe bus errors */
final_action = XE_RAS_RECOVERY_ACTION_RECOVERED;
+ /*
+ * Device fatal errors are downgraded to non-fatal and reported as an uncorrectable
+ * internal error. Set the default action to reset.
+ */
+ if (XE_DEVICE_WA(xe, 14028434957) && xe_ras_is_aer_internal_error(xe))
+ final_action = XE_RAS_RECOVERY_ACTION_RESET;
+
xe_sysctrl_create_command(&command, XE_SYSCTRL_GROUP_GFSP, XE_SYSCTRL_CMD_GET_SOC_ERROR,
NULL, 0, &response, sizeof(response));
--
2.47.1
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH v3 7/7] drm/xe/xe_ras: Skip double-bit ECC page offlining on AER path
2026-11-03 6:09 [PATCH v3 0/7] Handle non-fatal errors routed via IRQ Riana Tauro
` (5 preceding siblings ...)
2026-11-03 6:09 ` [PATCH v3 6/7] drm/xe: Add support for wa_14028434957 Riana Tauro
@ 2026-11-03 6:09 ` Riana Tauro
2026-11-03 6:23 ` sashiko-bot
2026-11-03 7:32 ` ✓ CI.KUnit: success for Handle non-fatal errors routed via IRQ (rev3) Patchwork
` (2 subsequent siblings)
9 siblings, 1 reply; 23+ messages in thread
From: Riana Tauro @ 2026-11-03 6:09 UTC (permalink / raw)
To: intel-xe
Cc: riana.tauro, anshuman.gupta, rodrigo.vivi, aravind.iddamsetty,
raag.jadav, ravi.kishore.koppuravuri, mallesh.koujalagi,
tejas.upadhyay, Andi Shyti
Device fatal errors trigger AER, which can race with non-fatal
double-bit ECC errors reported via IRQ. If the AER PCI error handler
runs first, it receives all errors as a single response from the
system controller firmware, which can include the double-bit ECC errors.
Handling these on the AER path leads to unnecessary page offlining,
since an SBR clears the offlined pages on reload and firmware drops them
from its queue once read. Skip double-bit ECC handling when on the AER
path to avoid this.
Signed-off-by: Riana Tauro <riana.tauro@intel.com>
Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
Reviewed-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
---
drivers/gpu/drm/xe/xe_ras.c | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
index 1809c3c893de..32aa376555bd 100644
--- a/drivers/gpu/drm/xe/xe_ras.c
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -676,6 +676,23 @@ static u8 handle_device_memory_errors(struct xe_device *xe, struct xe_ras_error_
info->sw_address);
/*
* Double-bit ECC errors are non-fatal errors and are reported via IRQ.
+ * On a race between AER for device fatal errors and non-fatal double-bit ECC
+ * errors, if AER pci error handlers execute first it will get all errors as
+ * a single response from system controller, which can include the double-bit
+ * ECC errors. This leads to unnecessary offlining of pages, since an SBR clears
+ * them on reload and firmware drops them from its queue once read.
+ * Skip handling of double-bit ECC errors on the AER path to avoid this.
+ *
+ * TODO: Remove this check once AER handling is optimized to retain soft
+ * offlined pages.
+ */
+ if (xe_ras_is_aer_internal_error(xe)) {
+ xe_info(xe, "[RAS]: Skipping double-bit ECC error handling on AER path\n");
+ break;
+ }
+
+ ret = handle_page_offline(xe, info->sw_address, true);
+ /*
* Wedge the device with a bus reset for errors that require SBR to recover.
* TODO: Trigger SBR using pci_reset_bus
*/
--
2.47.1
^ permalink raw reply related [flat|nested] 23+ messages in thread
* Re: [PATCH v3 3/7] drm/xe/ras: Treat non-fatal PCIe errors as recovered
2026-11-03 6:09 ` [PATCH v3 3/7] drm/xe/ras: Treat non-fatal PCIe errors as recovered Riana Tauro
@ 2026-11-03 6:19 ` Mallesh, Koujalagi
0 siblings, 0 replies; 23+ messages in thread
From: Mallesh, Koujalagi @ 2026-11-03 6:19 UTC (permalink / raw)
To: Riana Tauro, intel-xe
Cc: anshuman.gupta, rodrigo.vivi, aravind.iddamsetty, raag.jadav,
ravi.kishore.koppuravuri, tejas.upadhyay
On 03-11-2026 11:39 am, Riana Tauro wrote:
> On systems lacking RAS capability, only PCIe errors are reported, via
> AER, not device errors. Non-fatal PCIe errors reported at the Upstream
> Switch Port (USP) have no impact on link or device state, so treat
> them as recovered without requiring a secondary bus reset (SBR).
>
> Fixes: 25913a062cd4 ("drm/xe/xe_ras: Add support for uncorrectable core-compute errors")
> Signed-off-by: Riana Tauro <riana.tauro@intel.com>
LGTM,
Reviewed-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
> ---
> drivers/gpu/drm/xe/xe_ras.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
> index 2c01c183d02b..cd753c82b0ff 100644
> --- a/drivers/gpu/drm/xe/xe_ras.c
> +++ b/drivers/gpu/drm/xe/xe_ras.c
> @@ -830,7 +830,7 @@ enum xe_ras_recovery_action xe_ras_process_errors(struct xe_device *xe)
> }
>
> if (!xe->info.has_sysctrl)
> - return XE_RAS_RECOVERY_ACTION_RESET;
> + return XE_RAS_RECOVERY_ACTION_RECOVERED;
>
> BUILD_BUG_ON(BITS_PER_TYPE(sent) < XE_RAS_COMP_MAX);
> /* Default action */
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH v3 7/7] drm/xe/xe_ras: Skip double-bit ECC page offlining on AER path
2026-11-03 6:09 ` [PATCH v3 7/7] drm/xe/xe_ras: Skip double-bit ECC page offlining on AER path Riana Tauro
@ 2026-11-03 6:23 ` sashiko-bot
0 siblings, 0 replies; 23+ messages in thread
From: sashiko-bot @ 2026-11-03 6:23 UTC (permalink / raw)
To: Riana Tauro, intel-xe
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] drm/xe/xe_ras: duplicate handle_page_offline() call on DB_ECC error path
--
commit 3c39adabce266f3b2fd96c271c13abe952fe58d0
Author: Riana Tauro <riana.tauro@intel.com>
drm/xe/xe_ras: Skip double-bit ECC page offlining on AER path
This commit skips double-bit ECC page offlining in
handle_device_memory_errors() when running on the AER path so pages are not
unnecessarily offlined and dropped from the firmware queue before a Secondary
Bus Reset clears them.
> diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
> index 1809c3c893dee..32aa376555bd5 100644
> --- a/drivers/gpu/drm/xe/xe_ras.c
> +++ b/drivers/gpu/drm/xe/xe_ras.c
> @@ -676,6 +676,23 @@ static u8 handle_device_memory_errors(struct xe_device *xe, struct xe_ras_error_
> info->sw_address);
> /*
> * Double-bit ECC errors are non-fatal errors and are reported via IRQ.
> + * On a race between AER for device fatal errors and non-fatal double-bit ECC
> + * errors, if AER pci error handlers execute first it will get all errors as
> + * a single response from system controller, which can include the double-bit
> + * ECC errors. This leads to unnecessary offlining of pages, since an SBR clears
> + * them on reload and firmware drops them from its queue once read.
> + * Skip handling of double-bit ECC errors on the AER path to avoid this.
> + *
> + * TODO: Remove this check once AER handling is optimized to retain soft
> + * offlined pages.
> + */
> + if (xe_ras_is_aer_internal_error(xe)) {
> + xe_info(xe, "[RAS]: Skipping double-bit ECC error handling on AER path\n");
> + break;
> + }
> +
> + ret = handle_page_offline(xe, info->sw_address, true);
[Severity: High]
Was the existing call to handle_page_offline() above xe_log_comp() in
handle_device_memory_errors() meant to be removed or moved here?
drivers/gpu/drm/xe/xe_ras.c:handle_device_memory_errors() {
...
case XE_RAS_MEMORY_DB_ECC:
ret = handle_page_offline(xe, info->sw_address, true);
xe_log_comp(xe, ret ? cper_sev : CPER_SEV_INFORMATIONAL,
DEVICE_MEMORY, &arr->counter, sizeof(arr->counter),
"Double-bit ECC error detected at sw address 0x%llx\n",
info->sw_address);
...
if (xe_ras_is_aer_internal_error(xe)) {
xe_info(xe, "[RAS]: Skipping double-bit ECC error handling on AER path\n");
break;
}
ret = handle_page_offline(xe, info->sw_address, true);
...
}
Because the earlier handle_page_offline() call is still present before the
xe_ras_is_aer_internal_error() check, the AER path still soft-offlines the
page and sends the page offline command to firmware before breaking out.
On the normal non-AER IRQ path, handle_page_offline() is now called twice in
a row for the same info->sw_address. When the first call soft-offlines a page
on its first error occurrence, the immediate second call sees -EEXIST from
xe_ttm_vram_handle_addr_fault():
drivers/gpu/drm/xe/xe_ras.c:handle_page_offline() {
...
case -EEXIST:
if (xa_load(&state->offlined_pages, page_address >> XE_PTE_SHIFT))
action = XE_RAS_PAGE_ACTION_REMOVE;
else
action = XE_RAS_PAGE_ACTION_OFFLINE;
...
}
Wouldn't this cause the second call to treat a single first-occurrence ECC
error as a second occurrence and request XE_RAS_PAGE_ACTION_OFFLINE (or fail
in send_page_offline_cmd() and wedge the device)?
Also, note that xe_log_comp() evaluates ret ? cper_sev :
CPER_SEV_INFORMATIONAL, so if the first handle_page_offline() call is
removed, xe_log_comp() would either need to be moved after
handle_page_offline() or updated so it does not use an uninitialized ret.
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261103060929.1586783-9-riana.tauro@intel.com?part=7
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH v3 2/7] drm/xe/hw_error: Initialize hw_error_work per tile
2026-11-03 6:09 ` [PATCH v3 2/7] drm/xe/hw_error: Initialize hw_error_work per tile Riana Tauro
@ 2026-11-03 6:23 ` sashiko-bot
2026-11-03 6:42 ` Tauro, Riana
2026-11-04 9:31 ` Mallesh, Koujalagi
1 sibling, 1 reply; 23+ messages in thread
From: sashiko-bot @ 2026-11-03 6:23 UTC (permalink / raw)
To: Riana Tauro, intel-xe
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] drm/xe/hw_error: missing xe_hw_error_work_disable() on probe error unwind
--
commit 07d05aa9e22e61afa48de05e4142a663fa2508dd
Author: Riana Tauro <riana.tauro@intel.com>
drm/xe/hw_error: Initialize hw_error_work per tile
This commit initializes tile->hw_error_work across all tiles in
xe_hw_error_init() and adds xe_hw_error_work_disable() in
xe_device_remove() to stop the hardware error work items on device
removal.
> diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
> index 07a7ab6ac0832..8f498e3e3e586 100644
> --- a/drivers/gpu/drm/xe/xe_device.c
> +++ b/drivers/gpu/drm/xe/xe_device.c
[ ... ]
> @@ -1118,6 +1119,8 @@ int xe_device_probe(struct xe_device *xe)
>
> void xe_device_remove(struct xe_device *xe)
> {
> + xe_hw_error_work_disable(xe);
> +
> xe_display_unregister(xe);
>
> drm_dev_unplug(&xe->drm);
[Severity: High]
As reported by Sashiko on v2 [1], what happens if xe_device_probe() fails
after xe_hw_error_init() has already run?
During probe, xe_device_probe() calls xe_irq_install(), which invokes
xe_hw_error_init(xe) before allocating or requesting IRQs:
drivers/gpu/drm/xe/xe_irq.c:xe_irq_install() {
xe_hw_error_init(xe);
xe_irq_reset(xe);
...
err = pci_alloc_irq_vectors(pdev, nvec, nvec, irq_flags);
if (err < 0) {
drm_err(&xe->drm, "Failed to allocate IRQ vectors: %d\n", err);
return err;
}
}
Inside xe_hw_error_init(), process_hw_errors() -> xe_hw_error_irq_handler()
can immediately schedule tile->hw_error_work, and once xe_irq_install()
enables interrupts, dg1_irq_handler() can also schedule tile->hw_error_work
while the rest of xe_device_probe() is executing.
However, in __xe_pci_probe(), xe_pci_remove() -> xe_device_remove() is
only called if xe_pm_init() fails after xe_device_probe() has already
succeeded:
drivers/gpu/drm/xe/xe_pci.c:__xe_pci_probe() {
err = xe_device_probe(xe);
if (err)
return err;
err = xe_pm_init(xe);
if (err)
goto err_driver_cleanup;
return 0;
err_driver_cleanup:
xe_pci_remove(pdev);
return err;
}
If xe_irq_install() fails after xe_hw_error_init(), or if any subsequent
step in xe_device_probe() fails (such as xe_gt_init(), xe_vram_memtest(),
or xe_heci_gsc_init()), xe_device_remove() is never called. Can
tile->hw_error_work remain pending or running while devres_release_all()
unmaps MMIO and frees struct xe_device, causing a use-after-free on probe
error unwind?
[1] https://lore.kernel.org/r/20261026060459.771448-13-riana.tauro@intel.com
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261103060929.1586783-9-riana.tauro@intel.com?part=2
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH v3 1/7] drm/xe/hw_error: Reuse CSC worker for generic error handling
2026-11-03 6:09 ` [PATCH v3 1/7] drm/xe/hw_error: Reuse CSC worker for generic error handling Riana Tauro
@ 2026-11-03 6:27 ` Mallesh, Koujalagi
0 siblings, 0 replies; 23+ messages in thread
From: Mallesh, Koujalagi @ 2026-11-03 6:27 UTC (permalink / raw)
To: Riana Tauro, intel-xe
Cc: anshuman.gupta, rodrigo.vivi, aravind.iddamsetty, raag.jadav,
ravi.kishore.koppuravuri, tejas.upadhyay
On 03-11-2026 11:39 am, Riana Tauro wrote:
> From: Raag Jadav <raag.jadav@intel.com>
>
> We have upcoming usecases which require defering work during error
> handling. Since we already have CSC worker in place, prepare it to
> be reused generically.
>
> Signed-off-by: Raag Jadav <raag.jadav@intel.com>
> Reviewed-by: Riana Tauro <riana.tauro@intel.com>
LGTM,
Reviewed-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
> ---
> v2: Remove delayed work
> ---
> drivers/gpu/drm/xe/xe_hw_error.c | 10 +++++-----
> drivers/gpu/drm/xe/xe_tile_types.h | 4 ++--
> 2 files changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_hw_error.c b/drivers/gpu/drm/xe/xe_hw_error.c
> index ac720710c8e8..a934b649575c 100644
> --- a/drivers/gpu/drm/xe/xe_hw_error.c
> +++ b/drivers/gpu/drm/xe/xe_hw_error.c
> @@ -166,9 +166,9 @@ static_assert(ARRAY_SIZE(pvc_master_local_nonfatal_err_reg) == XE_RAS_REG_SIZE);
> pvc_master_local_fatal_err_reg : \
> pvc_master_local_nonfatal_err_reg)
>
> -static void csc_hw_error_work(struct work_struct *work)
> +static void hw_error_work(struct work_struct *work)
> {
> - struct xe_tile *tile = container_of(work, typeof(*tile), csc_hw_error_work);
> + struct xe_tile *tile = container_of(work, typeof(*tile), hw_error_work);
> struct xe_device *xe = tile_to_xe(tile);
>
> guard(xe_pm_runtime)(xe);
> @@ -204,7 +204,7 @@ static void csc_hw_error_handler(struct xe_tile *tile, const enum hardware_error
> hec_uncorrected_fw_errors[err_bit], severity_str,
> err_bit);
>
> - schedule_work(&tile->csc_hw_error_work);
> + schedule_work(&tile->hw_error_work);
> }
> }
>
> @@ -513,7 +513,7 @@ void xe_hw_error_irq_handler(struct xe_tile *tile, const u32 master_ctl)
> enum hardware_error hw_err;
>
> if (xe_fault_csc_hw_error())
> - schedule_work(&tile->csc_hw_error_work);
> + schedule_work(&tile->hw_error_work);
>
> for (hw_err = 0; hw_err < HARDWARE_ERROR_MAX; hw_err++) {
> if (master_ctl & ERROR_IRQ(hw_err))
> @@ -551,7 +551,7 @@ void xe_hw_error_init(struct xe_device *xe)
> if (!IS_DGFX(xe) || IS_SRIOV_VF(xe))
> return;
>
> - INIT_WORK(&tile->csc_hw_error_work, csc_hw_error_work);
> + INIT_WORK(&tile->hw_error_work, hw_error_work);
>
> process_hw_errors(xe);
> }
> diff --git a/drivers/gpu/drm/xe/xe_tile_types.h b/drivers/gpu/drm/xe/xe_tile_types.h
> index e1368c04846a..3dc011f111a4 100644
> --- a/drivers/gpu/drm/xe/xe_tile_types.h
> +++ b/drivers/gpu/drm/xe/xe_tile_types.h
> @@ -118,8 +118,8 @@ struct xe_tile {
> /** @memirq: Memory Based Interrupts. */
> struct xe_memirq memirq;
>
> - /** @csc_hw_error_work: worker to report CSC HW errors */
> - struct work_struct csc_hw_error_work;
> + /** @hw_error_work: worker to handle HW errors */
> + struct work_struct hw_error_work;
>
> /** @pcode: tile's PCODE */
> struct {
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH v3 6/7] drm/xe: Add support for wa_14028434957
2026-11-03 6:09 ` [PATCH v3 6/7] drm/xe: Add support for wa_14028434957 Riana Tauro
@ 2026-11-03 6:33 ` sashiko-bot
2026-11-03 6:45 ` Tauro, Riana
2026-11-04 10:38 ` Mallesh, Koujalagi
1 sibling, 1 reply; 23+ messages in thread
From: sashiko-bot @ 2026-11-03 6:33 UTC (permalink / raw)
To: Riana Tauro, intel-xe
Thank you for your contribution! Sashiko AI review found 4 potential issue(s) to consider:
- [High] drm/xe: ignored recovery action in hw_error_work() and premature DB_ECC wedge
- [High] drm/xe: race between hw_error_work() and xe_pci_error_detected() on AER
- [High] drm/xe: use-after-free of hw_error_work on xe_device_probe() failure
- [Medium] drm/xe: hw_error_work not disabled during non-internal AER recovery and reset
--
commit 63f8e0a3987b6eb426b195e4d8f9b906ad24b22d
Author: Riana Tauro <riana.tauro@intel.com>
drm/xe: Add support for wa_14028434957
This commit adds support for wa_14028434957 on Crescent Island to process
non-fatal hardware errors routed via direct IRQ and uncorrectable internal
errors reported via PCIe AER.
> diff --git a/drivers/gpu/drm/xe/xe_hw_error.c b/drivers/gpu/drm/xe/xe_hw_error.c
> index aaa2437d40bfe..8f2fb641f6ce2 100644
> --- a/drivers/gpu/drm/xe/xe_hw_error.c
> +++ b/drivers/gpu/drm/xe/xe_hw_error.c
[ ... ]
> @@ -433,12 +456,12 @@ static void hw_error_source_handler(struct xe_tile *tile, const enum hardware_er
> return;
>
> /*
> - * Hardware errors are reported through System Controller on the platforms that
> - * support it, and never routed as direct IRQ to SGUnit. So we should never be
> - * here for those platforms.
> + * Non-fatal errors are routed as a direct IRQ on platforms that support
> + * system controller.
> */
> if (xe->info.has_sysctrl) {
> - drm_err_ratelimited(&xe->drm, HW_ERR "Invalid error routing\n");
> + drm_err_ratelimited(&xe->drm, HW_ERR "Non-fatal %s reported\n", severity_str);
> + schedule_work(&tile->hw_error_work);
> return;
> }
[Severity: High]
Can scheduling tile->hw_error_work here cause a use-after-free of struct
xe_device if xe_device_probe() fails later during initialization?
During probe, __xe_pci_probe() -> xe_device_probe() -> xe_irq_install() ->
xe_hw_error_init() initializes tile->hw_error_work and calls
process_hw_errors(), which invokes xe_hw_error_irq_handler() ->
hw_error_source_handler(). Hardware error interrupts can also fire once
xe_irq_postinstall() enables interrupts.
If a subsequent step in xe_device_probe() fails (such as xe_gt_init(),
xe_vram_memtest(), xe_heci_gsc_init(), or drm_dev_register()),
__xe_pci_probe() returns the error directly without calling
xe_device_remove():
drivers/gpu/drm/xe/xe_pci.c:__xe_pci_probe() {
...
err = xe_device_probe(xe);
if (err)
return err;
...
}
Because xe_hw_error_work_disable() is only called in xe_device_remove() and is
not registered via devm_add_action_or_reset() in xe_hw_error_init(), devres
teardown will run ras_fini(), unmap MMIO, and free struct xe_device while
tile->hw_error_work is still queued or running hw_error_work() ->
xe_ras_process_errors(xe).
Should xe_hw_error_init() register a devm action to disable hw_error_work on
probe failure?
> diff --git a/drivers/gpu/drm/xe/xe_pci_error.c b/drivers/gpu/drm/xe/xe_pci_error.c
> index 4ade392b47bef..c27fd22e28ac7 100644
> --- a/drivers/gpu/drm/xe/xe_pci_error.c
> +++ b/drivers/gpu/drm/xe/xe_pci_error.c
[ ... ]
> @@ -90,8 +94,14 @@ static pci_ers_result_t xe_pci_error_detected(struct pci_dev *pdev, pci_channel_
> if (xe_survivability_mode_is_boot_enabled(xe) || xe_wedged(xe))
> return PCI_ERS_RESULT_DISCONNECT;
>
> - if (is_aer_internal_error(pdev))
> + /*
> + * If non-fatal error processing is in progress when uncorrectable internal error occurs,
> + * flush and disable the worker to prevent further processing, as a reset is imminent.
> + */
> + if (XE_DEVICE_WA(xe, 14028434957) && is_aer_internal_error(pdev)) {
> xe_ras_set_aer_internal_error(xe);
> + xe_hw_error_work_disable(xe);
> + }
[Severity: High]
What happens if hw_error_work() is already past the
xe_ras_is_aer_internal_error(xe) check when xe_pci_error_detected() runs?
In drivers/gpu/drm/xe/xe_hw_error.c:hw_error_work():
if (xe->info.has_sysctrl && XE_DEVICE_WA(xe, 14028434957)) {
if (xe_ras_is_aer_internal_error(xe))
return;
xe_ras_process_errors(xe);
return;
}
If hw_error_work() passes xe_ras_is_aer_internal_error(xe) just before
xe_pci_error_detected() sets aer_internal_error and calls
xe_hw_error_work_disable(xe), disable_work_sync() waits for the in-progress
hw_error_work() to finish running xe_ras_process_errors(xe).
During that call, hw_error_work() drains all pending error records from the
shared System Controller firmware queue (including fatal CSC firmware errors
that enable Runtime Survivability Mode and wedge with
DRM_WEDGE_RECOVERY_VENDOR, or Punit errors that wedge with
DRM_WEDGE_RECOVERY_COLD_RESET) and discards the recovery action returned by
xe_ras_process_errors(xe).
When xe_hw_error_work_disable(xe) returns in xe_pci_error_detected(),
xe_wedged(xe) is not re-checked, so xe_pci_error_detected() returns
PCI_ERS_RESULT_CAN_RECOVER. Then xe_pci_error_mmio_enabled() calls
xe_ras_process_errors(xe) a second time on the now-empty firmware queue, gets
the default XE_RAS_RECOVERY_ACTION_RESET (instead of
XE_RAS_RECOVERY_ACTION_DISCONNECT), and triggers a Secondary Bus Reset and
re-probe that tears down Runtime Survivability Mode sysfs and clears
xe->wedged.flag in xe_pci_error_resume().
Conversely, if hw_error_work() wedges the device on a double-bit ECC error via
xe_wedge_declare(xe, DRM_WEDGE_RECOVERY_BUS_RESET) just before
xe_pci_error_detected() checks xe_wedged(xe), xe_pci_error_detected() returns
PCI_ERS_RESULT_DISCONNECT without flushing hw_error_work() or requesting the
bus reset.
[Severity: Medium]
As reported by Sashiko on v2 [1], can tile->hw_error_work also race with PCIe
AER recovery and device reset when is_aer_internal_error(pdev) is false?
In xe_pci_error_detected(), xe_hw_error_work_disable(xe) is only called when
XE_DEVICE_WA(xe, 14028434957) && is_aer_internal_error(pdev) is true.
If a non-fatal PCIe AER error occurs without PCI_ERR_UNC_INTN set on the
Upstream Switch Port (state == pci_channel_io_normal),
xe_pci_error_mmio_enabled() runs xe_ras_process_errors(xe) while
tile->hw_error_work may still be running xe_ras_process_errors(xe)
concurrently.
Similarly, when prepare_device_for_reset() runs (either for
pci_channel_io_frozen or when ras_action_to_pci_result() requests a reset), it
flushes gt->wedge.worker and calls pci_disable_device(pdev) without calling
xe_hw_error_work_disable(xe):
drivers/gpu/drm/xe/xe_pci_error.c:prepare_device_for_reset() {
...
for_each_gt(gt, xe, id) {
xe_gt_wedge_declare(gt);
flush_work(>->wedge.worker);
}
pci_disable_device(pdev);
}
If hw_error_work() already passed its initial xe_wedged(xe) check before
prepare_device_for_reset() set xe->wedged.flag, could it continue issuing
System Controller MMIO mailbox commands and page offlining while the PCI
device is disabled and undergoing Secondary Bus Reset?
> diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
> index 58a0b5fa676d3..1809c3c893dee 100644
> --- a/drivers/gpu/drm/xe/xe_ras.c
> +++ b/drivers/gpu/drm/xe/xe_ras.c
[ ... ]
> @@ -671,8 +674,15 @@ static u8 handle_device_memory_errors(struct xe_device *xe, struct xe_ras_error_
> DEVICE_MEMORY, &arr->counter, sizeof(arr->counter),
> "Double-bit ECC error detected at sw address 0x%llx\n",
> info->sw_address);
> - if (ret)
> + /*
> + * Double-bit ECC errors are non-fatal errors and are reported via IRQ.
> + * Wedge the device with a bus reset for errors that require SBR to recover.
> + * TODO: Trigger SBR using pci_reset_bus
> + */
> + if (ret) {
> + xe_wedge_declare(xe, DRM_WEDGE_RECOVERY_BUS_RESET);
> return XE_RAS_RECOVERY_ACTION_RESET;
> + }
> break;
[Severity: High]
As reported by Andi Shyti on v2 [2], hw_error_work() ignores the recovery
action returned by xe_ras_process_errors(xe), while handle_device_memory_errors()
wedges the device directly for XE_RAS_MEMORY_DB_ECC. Does placing
xe_wedge_declare(xe, DRM_WEDGE_RECOVERY_BUS_RESET) inside
handle_device_memory_errors() instead of handling the returned recovery action
in hw_error_work() cause regressions across the callers of
xe_ras_process_errors(xe)?
First, in drivers/gpu/drm/xe/xe_hw_error.c:hw_error_work():
if (xe->info.has_sysctrl && XE_DEVICE_WA(xe, 14028434957)) {
if (xe_ras_is_aer_internal_error(xe))
return;
xe_ras_process_errors(xe);
return;
}
Because the return value of xe_ras_process_errors(xe) is ignored here, any
other error path in xe_ras_process_errors(xe) that returns
XE_RAS_RECOVERY_ACTION_RESET (such as sysctrl mailbox failures or response
flooding jumping to err:, unknown memory error categories hitting default: in
handle_device_memory_errors(), GLOBAL_UNCORR_ERROR in
handle_core_compute_errors(), non-CSC/non-Punit SoC internal errors in
handle_soc_internal_errors(), or unknown RAS components) neither wedges nor
resets the device on the direct IRQ path.
Second, xe_ras_process_errors() loops over all errors in response.arr[] to
compute the highest severity action:
/* Process and log all errors and then trigger highest recovery action */
if (action > final_action)
final_action = action;
Because xe_wedge_declare() latches xe->wedged.flag on the first call, calling
xe_wedge_declare(xe, DRM_WEDGE_RECOVERY_BUS_RESET) immediately on a
XE_RAS_MEMORY_DB_ECC error prevents a subsequent higher-severity
XE_RAS_RECOVERY_ACTION_DISCONNECT error in the same batch (such as a Punit
error wedging with DRM_WEDGE_RECOVERY_COLD_RESET in punit_error_handler(), or
a CSC firmware error wedging with DRM_WEDGE_RECOVERY_VENDOR in
xe_survivability_mode_runtime_enable()) from recording its recovery method and
sending its uevent.
Third, xe_ras_init() calls xe_ras_process_errors(xe) during xe_device_probe()
(with aer_internal_error == false) before xe_gt_init() and before
drm_dev_register(). Even if page offlining is skipped when aer_internal_error
is true, a boot-time or warm-reset-retained XE_RAS_MEMORY_DB_ECC error during
xe_ras_init() that fails handle_page_offline() will call
xe_wedge_declare(xe, DRM_WEDGE_RECOVERY_BUS_RESET) before drm_dev_register(),
setting xe->wedged.flag = 1 and causing GuC CT communication in xe_gt_init()
to fail with -ENOTRECOVERABLE.
Finally, if handle_device_memory_errors() is reached from
xe_pci_error_mmio_enabled() during PCIe AER recovery,
ras_action_to_pci_result() -> prepare_device_for_reset() intentionally sets
xe->wedged.flag without sending a wedged uevent or setting
xe->needs_flr_on_fini because the PCIe AER core performs the slot reset.
Calling xe_wedge_declare() inside handle_device_memory_errors() sends an
unintended WEDGED=bus-reset uevent and sets xe->needs_flr_on_fini = true.
Should handle_device_memory_errors() simply return
XE_RAS_RECOVERY_ACTION_RESET and let hw_error_work() check the final_action
returned by xe_ras_process_errors(xe) and call
xe_wedge_declare(xe, DRM_WEDGE_RECOVERY_BUS_RESET) when final_action ==
XE_RAS_RECOVERY_ACTION_RESET?
[1] https://lore.kernel.org/r/20261026060459.771448-15-riana.tauro@intel.com
[2] https://lore.kernel.org/r/auIedl6plynJE3ML@zenone.zhora.eu
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261103060929.1586783-9-riana.tauro@intel.com?part=6
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH v3 2/7] drm/xe/hw_error: Initialize hw_error_work per tile
2026-11-03 6:23 ` sashiko-bot
@ 2026-11-03 6:42 ` Tauro, Riana
0 siblings, 0 replies; 23+ messages in thread
From: Tauro, Riana @ 2026-11-03 6:42 UTC (permalink / raw)
To: sashiko-reviews, intel-xe
On 03-11-2026 11:53, sashiko-bot@kernel.org wrote:
> Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
> - [High] drm/xe/hw_error: missing xe_hw_error_work_disable() on probe error unwind
> --
>
> commit 07d05aa9e22e61afa48de05e4142a663fa2508dd
> Author: Riana Tauro <riana.tauro@intel.com>
>
> drm/xe/hw_error: Initialize hw_error_work per tile
>
> This commit initializes tile->hw_error_work across all tiles in
> xe_hw_error_init() and adds xe_hw_error_work_disable() in
> xe_device_remove() to stop the hardware error work items on device
> removal.
>
>> diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
>> index 07a7ab6ac0832..8f498e3e3e586 100644
>> --- a/drivers/gpu/drm/xe/xe_device.c
>> +++ b/drivers/gpu/drm/xe/xe_device.c
> [ ... ]
>> @@ -1118,6 +1119,8 @@ int xe_device_probe(struct xe_device *xe)
>>
>> void xe_device_remove(struct xe_device *xe)
>> {
>> + xe_hw_error_work_disable(xe);
>> +
>> xe_display_unregister(xe);
>>
>> drm_dev_unplug(&xe->drm);
> [Severity: High]
> As reported by Sashiko on v2 [1], what happens if xe_device_probe() fails
> after xe_hw_error_init() has already run?
>
> During probe, xe_device_probe() calls xe_irq_install(), which invokes
> xe_hw_error_init(xe) before allocating or requesting IRQs:
>
> drivers/gpu/drm/xe/xe_irq.c:xe_irq_install() {
> xe_hw_error_init(xe);
>
> xe_irq_reset(xe);
> ...
> err = pci_alloc_irq_vectors(pdev, nvec, nvec, irq_flags);
> if (err < 0) {
> drm_err(&xe->drm, "Failed to allocate IRQ vectors: %d\n", err);
> return err;
> }
> }
>
> Inside xe_hw_error_init(), process_hw_errors() -> xe_hw_error_irq_handler()
> can immediately schedule tile->hw_error_work, and once xe_irq_install()
> enables interrupts, dg1_irq_handler() can also schedule tile->hw_error_work
> while the rest of xe_device_probe() is executing.
>
> However, in __xe_pci_probe(), xe_pci_remove() -> xe_device_remove() is
> only called if xe_pm_init() fails after xe_device_probe() has already
> succeeded:
>
> drivers/gpu/drm/xe/xe_pci.c:__xe_pci_probe() {
> err = xe_device_probe(xe);
> if (err)
> return err;
>
> err = xe_pm_init(xe);
> if (err)
> goto err_driver_cleanup;
>
> return 0;
>
> err_driver_cleanup:
> xe_pci_remove(pdev);
> return err;
> }
>
> If xe_irq_install() fails after xe_hw_error_init(), or if any subsequent
> step in xe_device_probe() fails (such as xe_gt_init(), xe_vram_memtest(),
> or xe_heci_gsc_init()), xe_device_remove() is never called. Can
> tile->hw_error_work remain pending or running while devres_release_all()
> unmaps MMIO and frees struct xe_device, causing a use-after-free on probe
> error unwind?
Cannot add devres node inside another devres. That is the reason this
was moved to xe_device_remove.
Will fix the survivability mode sysfs creation and move it back to devm
in a different series.
Thanks
Riana
>
> [1] https://lore.kernel.org/r/20261026060459.771448-13-riana.tauro@intel.com
>
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH v3 6/7] drm/xe: Add support for wa_14028434957
2026-11-03 6:33 ` sashiko-bot
@ 2026-11-03 6:45 ` Tauro, Riana
0 siblings, 0 replies; 23+ messages in thread
From: Tauro, Riana @ 2026-11-03 6:45 UTC (permalink / raw)
To: sashiko-reviews, intel-xe
On 03-11-2026 12:03, sashiko-bot@kernel.org wrote:
> Thank you for your contribution! Sashiko AI review found 4 potential issue(s) to consider:
> - [High] drm/xe: ignored recovery action in hw_error_work() and premature DB_ECC wedge
> - [High] drm/xe: race between hw_error_work() and xe_pci_error_detected() on AER
> - [High] drm/xe: use-after-free of hw_error_work on xe_device_probe() failure
> - [Medium] drm/xe: hw_error_work not disabled during non-internal AER recovery and reset
> --
>
> commit 63f8e0a3987b6eb426b195e4d8f9b906ad24b22d
> Author: Riana Tauro <riana.tauro@intel.com>
>
> drm/xe: Add support for wa_14028434957
>
> This commit adds support for wa_14028434957 on Crescent Island to process
> non-fatal hardware errors routed via direct IRQ and uncorrectable internal
> errors reported via PCIe AER.
>
>> diff --git a/drivers/gpu/drm/xe/xe_hw_error.c b/drivers/gpu/drm/xe/xe_hw_error.c
>> index aaa2437d40bfe..8f2fb641f6ce2 100644
>> --- a/drivers/gpu/drm/xe/xe_hw_error.c
>> +++ b/drivers/gpu/drm/xe/xe_hw_error.c
> [ ... ]
>> @@ -433,12 +456,12 @@ static void hw_error_source_handler(struct xe_tile *tile, const enum hardware_er
>> return;
>>
>> /*
>> - * Hardware errors are reported through System Controller on the platforms that
>> - * support it, and never routed as direct IRQ to SGUnit. So we should never be
>> - * here for those platforms.
>> + * Non-fatal errors are routed as a direct IRQ on platforms that support
>> + * system controller.
>> */
>> if (xe->info.has_sysctrl) {
>> - drm_err_ratelimited(&xe->drm, HW_ERR "Invalid error routing\n");
>> + drm_err_ratelimited(&xe->drm, HW_ERR "Non-fatal %s reported\n", severity_str);
>> + schedule_work(&tile->hw_error_work);
>> return;
>> }
> [Severity: High]
> Can scheduling tile->hw_error_work here cause a use-after-free of struct
> xe_device if xe_device_probe() fails later during initialization?
>
> During probe, __xe_pci_probe() -> xe_device_probe() -> xe_irq_install() ->
> xe_hw_error_init() initializes tile->hw_error_work and calls
> process_hw_errors(), which invokes xe_hw_error_irq_handler() ->
> hw_error_source_handler(). Hardware error interrupts can also fire once
> xe_irq_postinstall() enables interrupts.
>
> If a subsequent step in xe_device_probe() fails (such as xe_gt_init(),
> xe_vram_memtest(), xe_heci_gsc_init(), or drm_dev_register()),
> __xe_pci_probe() returns the error directly without calling
> xe_device_remove():
>
> drivers/gpu/drm/xe/xe_pci.c:__xe_pci_probe() {
> ...
> err = xe_device_probe(xe);
> if (err)
> return err;
> ...
> }
>
> Because xe_hw_error_work_disable() is only called in xe_device_remove() and is
> not registered via devm_add_action_or_reset() in xe_hw_error_init(), devres
> teardown will run ras_fini(), unmap MMIO, and free struct xe_device while
> tile->hw_error_work is still queued or running hw_error_work() ->
> xe_ras_process_errors(xe).
>
> Should xe_hw_error_init() register a devm action to disable hw_error_work on
> probe failure?
Same as patch 2.
>> diff --git a/drivers/gpu/drm/xe/xe_pci_error.c b/drivers/gpu/drm/xe/xe_pci_error.c
>> index 4ade392b47bef..c27fd22e28ac7 100644
>> --- a/drivers/gpu/drm/xe/xe_pci_error.c
>> +++ b/drivers/gpu/drm/xe/xe_pci_error.c
> [ ... ]
>> @@ -90,8 +94,14 @@ static pci_ers_result_t xe_pci_error_detected(struct pci_dev *pdev, pci_channel_
>> if (xe_survivability_mode_is_boot_enabled(xe) || xe_wedged(xe))
>> return PCI_ERS_RESULT_DISCONNECT;
>>
>> - if (is_aer_internal_error(pdev))
>> + /*
>> + * If non-fatal error processing is in progress when uncorrectable internal error occurs,
>> + * flush and disable the worker to prevent further processing, as a reset is imminent.
>> + */
>> + if (XE_DEVICE_WA(xe, 14028434957) && is_aer_internal_error(pdev)) {
>> xe_ras_set_aer_internal_error(xe);
>> + xe_hw_error_work_disable(xe);
>> + }
> [Severity: High]
> What happens if hw_error_work() is already past the
> xe_ras_is_aer_internal_error(xe) check when xe_pci_error_detected() runs?
>
> In drivers/gpu/drm/xe/xe_hw_error.c:hw_error_work():
>
> if (xe->info.has_sysctrl && XE_DEVICE_WA(xe, 14028434957)) {
> if (xe_ras_is_aer_internal_error(xe))
> return;
>
> xe_ras_process_errors(xe);
> return;
> }
>
> If hw_error_work() passes xe_ras_is_aer_internal_error(xe) just before
> xe_pci_error_detected() sets aer_internal_error and calls
> xe_hw_error_work_disable(xe), disable_work_sync() waits for the in-progress
> hw_error_work() to finish running xe_ras_process_errors(xe).
>
> During that call, hw_error_work() drains all pending error records from the
> shared System Controller firmware queue (including fatal CSC firmware errors
> that enable Runtime Survivability Mode and wedge with
> DRM_WEDGE_RECOVERY_VENDOR, or Punit errors that wedge with
> DRM_WEDGE_RECOVERY_COLD_RESET) and discards the recovery action returned by
> xe_ras_process_errors(xe).
Missed this. Yeah this should be above the wedged check. Will fix this
new rev.
>
> When xe_hw_error_work_disable(xe) returns in xe_pci_error_detected(),
> xe_wedged(xe) is not re-checked, so xe_pci_error_detected() returns
> PCI_ERS_RESULT_CAN_RECOVER. Then xe_pci_error_mmio_enabled() calls
> xe_ras_process_errors(xe) a second time on the now-empty firmware queue, gets
> the default XE_RAS_RECOVERY_ACTION_RESET (instead of
> XE_RAS_RECOVERY_ACTION_DISCONNECT), and triggers a Secondary Bus Reset and
> re-probe that tears down Runtime Survivability Mode sysfs and clears
> xe->wedged.flag in xe_pci_error_resume().
>
> Conversely, if hw_error_work() wedges the device on a double-bit ECC error via
> xe_wedge_declare(xe, DRM_WEDGE_RECOVERY_BUS_RESET) just before
> xe_pci_error_detected() checks xe_wedged(xe), xe_pci_error_detected() returns
> PCI_ERS_RESULT_DISCONNECT without flushing hw_error_work() or requesting the
> bus reset.
>
> [Severity: Medium]
> As reported by Sashiko on v2 [1], can tile->hw_error_work also race with PCIe
> AER recovery and device reset when is_aer_internal_error(pdev) is false?
All internal errors require a reset. For frozen errors, device will be
wedged
>
> In xe_pci_error_detected(), xe_hw_error_work_disable(xe) is only called when
> XE_DEVICE_WA(xe, 14028434957) && is_aer_internal_error(pdev) is true.
>
> If a non-fatal PCIe AER error occurs without PCI_ERR_UNC_INTN set on the
> Upstream Switch Port (state == pci_channel_io_normal),
> xe_pci_error_mmio_enabled() runs xe_ras_process_errors(xe) while
> tile->hw_error_work may still be running xe_ras_process_errors(xe)
> concurrently.
>
> Similarly, when prepare_device_for_reset() runs (either for
> pci_channel_io_frozen or when ras_action_to_pci_result() requests a reset), it
> flushes gt->wedge.worker and calls pci_disable_device(pdev) without calling
> xe_hw_error_work_disable(xe):
>
> drivers/gpu/drm/xe/xe_pci_error.c:prepare_device_for_reset() {
> ...
> for_each_gt(gt, xe, id) {
> xe_gt_wedge_declare(gt);
> flush_work(>->wedge.worker);
> }
>
> pci_disable_device(pdev);
> }
>
> If hw_error_work() already passed its initial xe_wedged(xe) check before
> prepare_device_for_reset() set xe->wedged.flag, could it continue issuing
> System Controller MMIO mailbox commands and page offlining while the PCI
> device is disabled and undergoing Secondary Bus Reset?
>
>> diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
>> index 58a0b5fa676d3..1809c3c893dee 100644
>> --- a/drivers/gpu/drm/xe/xe_ras.c
>> +++ b/drivers/gpu/drm/xe/xe_ras.c
> [ ... ]
>> @@ -671,8 +674,15 @@ static u8 handle_device_memory_errors(struct xe_device *xe, struct xe_ras_error_
>> DEVICE_MEMORY, &arr->counter, sizeof(arr->counter),
>> "Double-bit ECC error detected at sw address 0x%llx\n",
>> info->sw_address);
>> - if (ret)
>> + /*
>> + * Double-bit ECC errors are non-fatal errors and are reported via IRQ.
>> + * Wedge the device with a bus reset for errors that require SBR to recover.
>> + * TODO: Trigger SBR using pci_reset_bus
>> + */
>> + if (ret) {
>> + xe_wedge_declare(xe, DRM_WEDGE_RECOVERY_BUS_RESET);
>> return XE_RAS_RECOVERY_ACTION_RESET;
>> + }
>> break;
> [Severity: High]
> As reported by Andi Shyti on v2 [2], hw_error_work() ignores the recovery
> action returned by xe_ras_process_errors(xe), while handle_device_memory_errors()
> wedges the device directly for XE_RAS_MEMORY_DB_ECC. Does placing
> xe_wedge_declare(xe, DRM_WEDGE_RECOVERY_BUS_RESET) inside
> handle_device_memory_errors() instead of handling the returned recovery action
> in hw_error_work() cause regressions across the callers of
> xe_ras_process_errors(xe)?
Intentional change.
Thanks
Riana
>
> First, in drivers/gpu/drm/xe/xe_hw_error.c:hw_error_work():
>
> if (xe->info.has_sysctrl && XE_DEVICE_WA(xe, 14028434957)) {
> if (xe_ras_is_aer_internal_error(xe))
> return;
>
> xe_ras_process_errors(xe);
> return;
> }
>
> Because the return value of xe_ras_process_errors(xe) is ignored here, any
> other error path in xe_ras_process_errors(xe) that returns
> XE_RAS_RECOVERY_ACTION_RESET (such as sysctrl mailbox failures or response
> flooding jumping to err:, unknown memory error categories hitting default: in
> handle_device_memory_errors(), GLOBAL_UNCORR_ERROR in
> handle_core_compute_errors(), non-CSC/non-Punit SoC internal errors in
> handle_soc_internal_errors(), or unknown RAS components) neither wedges nor
> resets the device on the direct IRQ path.
>
> Second, xe_ras_process_errors() loops over all errors in response.arr[] to
> compute the highest severity action:
>
> /* Process and log all errors and then trigger highest recovery action */
> if (action > final_action)
> final_action = action;
>
> Because xe_wedge_declare() latches xe->wedged.flag on the first call, calling
> xe_wedge_declare(xe, DRM_WEDGE_RECOVERY_BUS_RESET) immediately on a
> XE_RAS_MEMORY_DB_ECC error prevents a subsequent higher-severity
> XE_RAS_RECOVERY_ACTION_DISCONNECT error in the same batch (such as a Punit
> error wedging with DRM_WEDGE_RECOVERY_COLD_RESET in punit_error_handler(), or
> a CSC firmware error wedging with DRM_WEDGE_RECOVERY_VENDOR in
> xe_survivability_mode_runtime_enable()) from recording its recovery method and
> sending its uevent.
>
> Third, xe_ras_init() calls xe_ras_process_errors(xe) during xe_device_probe()
> (with aer_internal_error == false) before xe_gt_init() and before
> drm_dev_register(). Even if page offlining is skipped when aer_internal_error
> is true, a boot-time or warm-reset-retained XE_RAS_MEMORY_DB_ECC error during
> xe_ras_init() that fails handle_page_offline() will call
> xe_wedge_declare(xe, DRM_WEDGE_RECOVERY_BUS_RESET) before drm_dev_register(),
> setting xe->wedged.flag = 1 and causing GuC CT communication in xe_gt_init()
> to fail with -ENOTRECOVERABLE.
>
> Finally, if handle_device_memory_errors() is reached from
> xe_pci_error_mmio_enabled() during PCIe AER recovery,
> ras_action_to_pci_result() -> prepare_device_for_reset() intentionally sets
> xe->wedged.flag without sending a wedged uevent or setting
> xe->needs_flr_on_fini because the PCIe AER core performs the slot reset.
> Calling xe_wedge_declare() inside handle_device_memory_errors() sends an
> unintended WEDGED=bus-reset uevent and sets xe->needs_flr_on_fini = true.
>
> Should handle_device_memory_errors() simply return
> XE_RAS_RECOVERY_ACTION_RESET and let hw_error_work() check the final_action
> returned by xe_ras_process_errors(xe) and call
> xe_wedge_declare(xe, DRM_WEDGE_RECOVERY_BUS_RESET) when final_action ==
> XE_RAS_RECOVERY_ACTION_RESET?
>
> [1] https://lore.kernel.org/r/20261026060459.771448-15-riana.tauro@intel.com
> [2] https://lore.kernel.org/r/auIedl6plynJE3ML@zenone.zhora.eu
>
^ permalink raw reply [flat|nested] 23+ messages in thread
* ✓ CI.KUnit: success for Handle non-fatal errors routed via IRQ (rev3)
2026-11-03 6:09 [PATCH v3 0/7] Handle non-fatal errors routed via IRQ Riana Tauro
` (6 preceding siblings ...)
2026-11-03 6:09 ` [PATCH v3 7/7] drm/xe/xe_ras: Skip double-bit ECC page offlining on AER path Riana Tauro
@ 2026-11-03 7:32 ` Patchwork
2026-11-03 8:05 ` ✓ Xe.CI.BAT: " Patchwork
2026-11-03 13:34 ` ✓ Xe.CI.FULL: " Patchwork
9 siblings, 0 replies; 23+ messages in thread
From: Patchwork @ 2026-11-03 7:32 UTC (permalink / raw)
To: Tauro, Riana; +Cc: intel-xe
== Series Details ==
Series: Handle non-fatal errors routed via IRQ (rev3)
URL : https://patchwork.freedesktop.org/series/173001/
State : success
== Summary ==
+ trap cleanup EXIT
+ kunitconfigs=('/kernel/drivers/gpu/tests/.kunitconfig' '/kernel/drivers/gpu/drm/xe/.kunitconfig' '/kernel/drivers/gpu/drm/tests/.kunitconfig' '/kernel/drivers/gpu/drm/ttm/tests/.kunitconfig' '/kernel/drivers/dma-buf/.kunitconfig')
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/tests/.kunitconfig
[07:30:19] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[07:30:24] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[07:30:44] Starting KUnit Kernel (1/1)...
[07:30:44] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[07:30:44] ================= gpu_buddy (14 subtests) ==================
[07:30:44] [PASSED] gpu_test_buddy_alloc_limit
[07:30:44] [PASSED] gpu_test_buddy_alloc_optimistic
[07:30:44] [PASSED] gpu_test_buddy_alloc_pessimistic
[07:30:44] [PASSED] gpu_test_buddy_alloc_pathological
[07:30:44] [PASSED] gpu_test_buddy_alloc_contiguous
[07:30:44] [PASSED] gpu_test_buddy_alloc_clear
[07:30:44] [PASSED] gpu_test_buddy_alloc_range
[07:30:45] [PASSED] gpu_test_buddy_alloc_range_bias
[07:30:46] [PASSED] gpu_test_buddy_fragmentation_performance
[07:30:46] [PASSED] gpu_test_buddy_dirty_tracker_performance
[07:30:46] [PASSED] gpu_test_buddy_alloc_exceeds_max_order
[07:30:46] [PASSED] gpu_test_buddy_offset_aligned_allocation
[07:30:46] [PASSED] gpu_test_buddy_subtree_offset_alignment_stress
[07:30:46] [PASSED] gpu_test_buddy_addr_to_block
[07:30:46] ==================== [PASSED] gpu_buddy ====================
[07:30:46] ============================================================
[07:30:46] Testing complete. Ran 14 tests: passed: 14
[07:30:46] Elapsed time: 27.263s total, 5.087s configuring, 20.309s building, 1.826s running
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/xe/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[07:30:46] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[07:30:49] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[07:31:26] Starting KUnit Kernel (1/1)...
[07:31:26] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[07:31:27] ================== guc_buf (11 subtests) ===================
[07:31:27] [PASSED] test_smallest
[07:31:27] [PASSED] test_largest
[07:31:27] [PASSED] test_granular
[07:31:27] [PASSED] test_unique
[07:31:27] [PASSED] test_overlap
[07:31:27] [PASSED] test_reusable
[07:31:27] [PASSED] test_too_big
[07:31:27] [PASSED] test_flush
[07:31:27] [PASSED] test_lookup
[07:31:27] [PASSED] test_data
[07:31:27] [PASSED] test_class
[07:31:27] ===================== [PASSED] guc_buf =====================
[07:31:27] =================== guc_dbm (7 subtests) ===================
[07:31:27] [PASSED] test_empty
[07:31:27] [PASSED] test_default
[07:31:27] ======================== test_size ========================
[07:31:27] [PASSED] 4
[07:31:27] [PASSED] 8
[07:31:27] [PASSED] 32
[07:31:27] [PASSED] 256
[07:31:27] ==================== [PASSED] test_size ====================
[07:31:27] ======================= test_reuse ========================
[07:31:27] [PASSED] 4
[07:31:27] [PASSED] 8
[07:31:27] [PASSED] 32
[07:31:27] [PASSED] 256
[07:31:27] =================== [PASSED] test_reuse ====================
[07:31:27] =================== test_range_overlap ====================
[07:31:27] [PASSED] 4
[07:31:27] [PASSED] 8
[07:31:27] [PASSED] 32
[07:31:27] [PASSED] 256
[07:31:27] =============== [PASSED] test_range_overlap ================
[07:31:27] =================== test_range_compact ====================
[07:31:27] [PASSED] 4
[07:31:27] [PASSED] 8
[07:31:27] [PASSED] 32
[07:31:27] [PASSED] 256
[07:31:27] =============== [PASSED] test_range_compact ================
[07:31:27] ==================== test_range_spare =====================
[07:31:27] [PASSED] 4
[07:31:27] [PASSED] 8
[07:31:27] [PASSED] 32
[07:31:27] [PASSED] 256
[07:31:27] ================ [PASSED] test_range_spare =================
[07:31:27] ===================== [PASSED] guc_dbm =====================
[07:31:27] ================== guc_idm (22 subtests) ===================
[07:31:27] [PASSED] bad_init
[07:31:27] [PASSED] no_init
[07:31:27] [PASSED] init_fini
[07:31:27] [PASSED] check_init_small
[07:31:27] [PASSED] check_init_shared
[07:31:27] [PASSED] check_used
[07:31:27] [PASSED] check_quota
[07:31:27] [PASSED] check_all
[07:31:27] [PASSED] check_limits
[07:31:27] [PASSED] check_overlap
[07:31:27] [PASSED] check_overlap_alloc
[07:31:27] [PASSED] check_overlap_release
[07:31:27] [PASSED] check_overlap_partial_init
[07:31:27] [PASSED] check_overlap_partial_shared_range_blocking
[07:31:27] [PASSED] check_used_usable
[07:31:27] [PASSED] check_used_shareable
[07:31:27] [PASSED] check_used_mixed
[07:31:27] [PASSED] check_release_usable_range
[07:31:27] [PASSED] check_release_shareable_range
[07:31:27] [PASSED] check_split_boundaries
[07:31:27] [PASSED] check_shareable_spare
[07:31:27] [PASSED] check_shareable_spare_fragmented_tail
[07:31:27] ===================== [PASSED] guc_idm =====================
[07:31:27] ============== guc_klv_helpers (13 subtests) ===============
[07:31:27] [PASSED] test_count
[07:31:27] [PASSED] test_encode_u32
[07:31:27] [PASSED] test_encode_u64
[07:31:27] [PASSED] test_encode_string
[07:31:27] [PASSED] test_encode_object_raw
[07:31:27] [PASSED] test_encode_object_klv
[07:31:27] [PASSED] test_encode_object_nested
[07:31:27] [PASSED] test_encode_object_basic
[07:31:27] ===================== test_decode_u16 =====================
[07:31:27] [PASSED] empty
[07:31:27] [PASSED] valid
[07:31:27] [PASSED] max
[07:31:27] [PASSED] big
[07:31:27] [PASSED] long
[07:31:27] ================= [PASSED] test_decode_u16 =================
[07:31:27] ===================== test_decode_u32 =====================
[07:31:27] [PASSED] empty
[07:31:27] [PASSED] valid
[07:31:27] [PASSED] max
[07:31:27] [PASSED] long
[07:31:27] ================= [PASSED] test_decode_u32 =================
[07:31:27] ===================== test_decode_u64 =====================
[07:31:27] [PASSED] empty
[07:31:27] [PASSED] short
[07:31:27] [PASSED] valid
[07:31:27] [PASSED] max
[07:31:27] [PASSED] long
[07:31:27] ================= [PASSED] test_decode_u64 =================
[07:31:27] ===================== test_decode_str =====================
[07:31:27] [PASSED] empty
[07:31:27] [PASSED] one
[07:31:27] [PASSED] one_trash
[07:31:27] [PASSED] two
[07:31:27] [PASSED] two_trash
[07:31:27] [PASSED] three
[07:31:27] [PASSED] dword
[07:31:27] [PASSED] four
[07:31:27] [PASSED] five
[07:31:27] [PASSED] six
[07:31:27] [PASSED] seven
[07:31:27] [PASSED] qword
[07:31:27] ================= [PASSED] test_decode_str =================
[07:31:27] [PASSED] test_print
[07:31:27] ================= [PASSED] guc_klv_helpers =================
[07:31:27] =================== xe_log (4 subtests) ====================
[07:31:27] [PASSED] demo_cper
[07:31:27] [PASSED] demo_dmesg
[07:31:27] ======================= test_dmesg ========================
[07:31:27] [PASSED] test_fatal
[07:31:27] [PASSED] test_fatal_tile
[07:31:27] [PASSED] test_fatal_gt
[07:31:27] [PASSED] test_fatal_comp
[07:31:27] [PASSED] test_fatal_comp_tile
[07:31:27] [PASSED] test_fatal_comp_gt
[07:31:27] [PASSED] test_fatal_all
[07:31:27] [PASSED] test_recoverable
[07:31:27] [PASSED] test_recoverable_tile
[07:31:27] [PASSED] test_recoverable_gt
[07:31:27] [PASSED] test_recoverable_comp
[07:31:27] [PASSED] test_recoverable_comp_tile
[07:31:27] [PASSED] test_recoverable_comp_gt
[07:31:27] [PASSED] test_recoverable_all
[07:31:27] [PASSED] test_info
[07:31:27] [PASSED] test_info_tile
[07:31:27] [PASSED] test_info_gt
[07:31:27] [PASSED] test_info_err
[07:31:27] [PASSED] test_info_comp
[07:31:27] [PASSED] test_info_comp_tile
[07:31:27] [PASSED] test_info_comp_gt
[07:31:27] [PASSED] test_info_all
[07:31:27] [PASSED] test_hw_fatal
[07:31:27] [PASSED] test_hw_recoverable
[07:31:27] [PASSED] test_hw_corrected
[07:31:27] [PASSED] test_hw_informational
[07:31:27] =================== [PASSED] test_dmesg ====================
[07:31:27] ====================== test_invalid =======================
[07:31:27] [SKIPPED] no-component no-location no-warn (requires CONFIG_DRM_XE_DEBUG)
[07:31:27] [SKIPPED] reserved location (requires CONFIG_DRM_XE_DEBUG)
[07:31:27] [SKIPPED] unknown location (requires CONFIG_DRM_XE_DEBUG)
[07:31:27] [SKIPPED] nonzero-device-id location (requires CONFIG_DRM_XE_DEBUG)
[07:31:27] [SKIPPED] invalid-tile-id location (requires CONFIG_DRM_XE_DEBUG)
[07:31:27] [SKIPPED] invalid-gt-id location (requires CONFIG_DRM_XE_DEBUG)
[07:31:27] [SKIPPED] unknown component class (requires CONFIG_DRM_XE_DEBUG)
[07:31:27] [SKIPPED] unknown system component (requires CONFIG_DRM_XE_DEBUG)
[07:31:27] [SKIPPED] unknown hardware component (requires CONFIG_DRM_XE_DEBUG)
[07:31:27] [SKIPPED] unknown component and location (requires CONFIG_DRM_XE_DEBUG)
[07:31:27] ================== [SKIPPED] test_invalid ==================
[07:31:27] ===================== [PASSED] xe_log ======================
[07:31:27] ================== no_relay (3 subtests) ===================
[07:31:27] [PASSED] xe_drops_guc2pf_if_not_ready
[07:31:27] [PASSED] xe_drops_guc2vf_if_not_ready
[07:31:27] [PASSED] xe_rejects_send_if_not_ready
[07:31:27] ==================== [PASSED] no_relay =====================
[07:31:27] ================== pf_relay (14 subtests) ==================
[07:31:27] [PASSED] pf_rejects_guc2pf_too_short
[07:31:27] [PASSED] pf_rejects_guc2pf_too_long
[07:31:27] [PASSED] pf_rejects_guc2pf_no_payload
[07:31:27] [PASSED] pf_fails_no_payload
[07:31:27] [PASSED] pf_fails_bad_origin
[07:31:27] [PASSED] pf_fails_bad_type
[07:31:27] [PASSED] pf_txn_reports_error
[07:31:27] [PASSED] pf_txn_sends_pf2guc
[07:31:27] [PASSED] pf_sends_pf2guc
[07:31:27] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[07:31:27] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[07:31:27] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[07:31:27] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[07:31:27] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[07:31:27] ==================== [PASSED] pf_relay =====================
[07:31:27] ================== vf_relay (3 subtests) ===================
[07:31:27] [PASSED] vf_rejects_guc2vf_too_short
[07:31:27] [PASSED] vf_rejects_guc2vf_too_long
[07:31:27] [PASSED] vf_rejects_guc2vf_no_payload
[07:31:27] ==================== [PASSED] vf_relay =====================
[07:31:27] ================ pf_gt_config (9 subtests) =================
[07:31:27] [PASSED] fair_contexts_1vf
[07:31:27] [PASSED] fair_doorbells_1vf
[07:31:27] [PASSED] fair_ggtt_1vf
[07:31:27] ====================== fair_vram_1vf ======================
[07:31:27] [PASSED] 3.50 GiB
[07:31:27] [PASSED] 11.5 GiB
[07:31:27] [PASSED] 15.5 GiB
[07:31:27] [PASSED] 31.5 GiB
[07:31:27] [PASSED] 63.5 GiB
[07:31:27] [PASSED] 1.91 GiB
[07:31:27] ================== [PASSED] fair_vram_1vf ==================
[07:31:27] ================ fair_vram_1vf_admin_only =================
[07:31:27] [PASSED] 3.50 GiB
[07:31:27] [PASSED] 11.5 GiB
[07:31:27] [PASSED] 15.5 GiB
[07:31:27] [PASSED] 31.5 GiB
[07:31:27] [PASSED] 63.5 GiB
[07:31:27] [PASSED] 1.91 GiB
[07:31:27] ============ [PASSED] fair_vram_1vf_admin_only =============
[07:31:27] ====================== fair_contexts ======================
[07:31:27] [PASSED] 1 VF
[07:31:27] [PASSED] 2 VFs
[07:31:27] [PASSED] 3 VFs
[07:31:27] [PASSED] 4 VFs
[07:31:27] [PASSED] 5 VFs
[07:31:27] [PASSED] 6 VFs
[07:31:27] [PASSED] 7 VFs
[07:31:27] [PASSED] 8 VFs
[07:31:27] [PASSED] 9 VFs
[07:31:27] [PASSED] 10 VFs
[07:31:27] [PASSED] 11 VFs
[07:31:27] [PASSED] 12 VFs
[07:31:27] [PASSED] 13 VFs
[07:31:27] [PASSED] 14 VFs
[07:31:27] [PASSED] 15 VFs
[07:31:27] [PASSED] 16 VFs
[07:31:27] [PASSED] 17 VFs
[07:31:27] [PASSED] 18 VFs
[07:31:27] [PASSED] 19 VFs
[07:31:27] [PASSED] 20 VFs
[07:31:27] [PASSED] 21 VFs
[07:31:27] [PASSED] 22 VFs
[07:31:27] [PASSED] 23 VFs
[07:31:27] [PASSED] 24 VFs
[07:31:27] [PASSED] 25 VFs
[07:31:27] [PASSED] 26 VFs
[07:31:27] [PASSED] 27 VFs
[07:31:27] [PASSED] 28 VFs
[07:31:27] [PASSED] 29 VFs
[07:31:27] [PASSED] 30 VFs
[07:31:27] [PASSED] 31 VFs
[07:31:27] [PASSED] 32 VFs
[07:31:27] [PASSED] 33 VFs
[07:31:27] [PASSED] 34 VFs
[07:31:27] [PASSED] 35 VFs
[07:31:27] [PASSED] 36 VFs
[07:31:27] [PASSED] 37 VFs
[07:31:27] [PASSED] 38 VFs
[07:31:27] [PASSED] 39 VFs
[07:31:27] [PASSED] 40 VFs
[07:31:27] [PASSED] 41 VFs
[07:31:27] [PASSED] 42 VFs
[07:31:27] [PASSED] 43 VFs
[07:31:27] [PASSED] 44 VFs
[07:31:27] [PASSED] 45 VFs
[07:31:27] [PASSED] 46 VFs
[07:31:27] [PASSED] 47 VFs
[07:31:27] [PASSED] 48 VFs
[07:31:27] [PASSED] 49 VFs
[07:31:27] [PASSED] 50 VFs
[07:31:27] [PASSED] 51 VFs
[07:31:27] [PASSED] 52 VFs
[07:31:27] [PASSED] 53 VFs
[07:31:27] [PASSED] 54 VFs
[07:31:27] [PASSED] 55 VFs
[07:31:27] [PASSED] 56 VFs
[07:31:27] [PASSED] 57 VFs
[07:31:27] [PASSED] 58 VFs
[07:31:27] [PASSED] 59 VFs
[07:31:27] [PASSED] 60 VFs
[07:31:27] [PASSED] 61 VFs
[07:31:27] [PASSED] 62 VFs
[07:31:27] [PASSED] 63 VFs
[07:31:27] ================== [PASSED] fair_contexts ==================
[07:31:27] ===================== fair_doorbells ======================
[07:31:27] [PASSED] 1 VF
[07:31:27] [PASSED] 2 VFs
[07:31:27] [PASSED] 3 VFs
[07:31:27] [PASSED] 4 VFs
[07:31:27] [PASSED] 5 VFs
[07:31:27] [PASSED] 6 VFs
[07:31:27] [PASSED] 7 VFs
[07:31:27] [PASSED] 8 VFs
[07:31:27] [PASSED] 9 VFs
[07:31:27] [PASSED] 10 VFs
[07:31:27] [PASSED] 11 VFs
[07:31:27] [PASSED] 12 VFs
[07:31:27] [PASSED] 13 VFs
[07:31:27] [PASSED] 14 VFs
[07:31:27] [PASSED] 15 VFs
[07:31:27] [PASSED] 16 VFs
[07:31:27] [PASSED] 17 VFs
[07:31:27] [PASSED] 18 VFs
[07:31:27] [PASSED] 19 VFs
[07:31:27] [PASSED] 20 VFs
[07:31:27] [PASSED] 21 VFs
[07:31:27] [PASSED] 22 VFs
[07:31:27] [PASSED] 23 VFs
[07:31:27] [PASSED] 24 VFs
[07:31:27] [PASSED] 25 VFs
[07:31:27] [PASSED] 26 VFs
[07:31:27] [PASSED] 27 VFs
[07:31:27] [PASSED] 28 VFs
[07:31:27] [PASSED] 29 VFs
[07:31:27] [PASSED] 30 VFs
[07:31:27] [PASSED] 31 VFs
[07:31:27] [PASSED] 32 VFs
[07:31:27] [PASSED] 33 VFs
[07:31:27] [PASSED] 34 VFs
[07:31:27] [PASSED] 35 VFs
[07:31:27] [PASSED] 36 VFs
[07:31:27] [PASSED] 37 VFs
[07:31:27] [PASSED] 38 VFs
[07:31:27] [PASSED] 39 VFs
[07:31:27] [PASSED] 40 VFs
[07:31:27] [PASSED] 41 VFs
[07:31:27] [PASSED] 42 VFs
[07:31:27] [PASSED] 43 VFs
[07:31:27] [PASSED] 44 VFs
[07:31:27] [PASSED] 45 VFs
[07:31:27] [PASSED] 46 VFs
[07:31:27] [PASSED] 47 VFs
[07:31:27] [PASSED] 48 VFs
[07:31:27] [PASSED] 49 VFs
[07:31:27] [PASSED] 50 VFs
[07:31:27] [PASSED] 51 VFs
[07:31:27] [PASSED] 52 VFs
[07:31:27] [PASSED] 53 VFs
[07:31:27] [PASSED] 54 VFs
[07:31:27] [PASSED] 55 VFs
[07:31:27] [PASSED] 56 VFs
[07:31:27] [PASSED] 57 VFs
[07:31:27] [PASSED] 58 VFs
[07:31:27] [PASSED] 59 VFs
[07:31:27] [PASSED] 60 VFs
[07:31:27] [PASSED] 61 VFs
[07:31:27] [PASSED] 62 VFs
[07:31:27] [PASSED] 63 VFs
[07:31:27] ================= [PASSED] fair_doorbells ==================
[07:31:27] ======================== fair_ggtt ========================
[07:31:27] [PASSED] 1 VF
[07:31:27] [PASSED] 2 VFs
[07:31:27] [PASSED] 3 VFs
[07:31:27] [PASSED] 4 VFs
[07:31:27] [PASSED] 5 VFs
[07:31:27] [PASSED] 6 VFs
[07:31:27] [PASSED] 7 VFs
[07:31:27] [PASSED] 8 VFs
[07:31:27] [PASSED] 9 VFs
[07:31:27] [PASSED] 10 VFs
[07:31:27] [PASSED] 11 VFs
[07:31:27] [PASSED] 12 VFs
[07:31:27] [PASSED] 13 VFs
[07:31:27] [PASSED] 14 VFs
[07:31:27] [PASSED] 15 VFs
[07:31:27] [PASSED] 16 VFs
[07:31:27] [PASSED] 17 VFs
[07:31:27] [PASSED] 18 VFs
[07:31:27] [PASSED] 19 VFs
[07:31:27] [PASSED] 20 VFs
[07:31:27] [PASSED] 21 VFs
[07:31:27] [PASSED] 22 VFs
[07:31:27] [PASSED] 23 VFs
[07:31:27] [PASSED] 24 VFs
[07:31:27] [PASSED] 25 VFs
[07:31:27] [PASSED] 26 VFs
[07:31:27] [PASSED] 27 VFs
[07:31:27] [PASSED] 28 VFs
[07:31:27] [PASSED] 29 VFs
[07:31:27] [PASSED] 30 VFs
[07:31:27] [PASSED] 31 VFs
[07:31:27] [PASSED] 32 VFs
[07:31:27] [PASSED] 33 VFs
[07:31:27] [PASSED] 34 VFs
[07:31:27] [PASSED] 35 VFs
[07:31:27] [PASSED] 36 VFs
[07:31:27] [PASSED] 37 VFs
[07:31:27] [PASSED] 38 VFs
[07:31:27] [PASSED] 39 VFs
[07:31:27] [PASSED] 40 VFs
[07:31:27] [PASSED] 41 VFs
[07:31:27] [PASSED] 42 VFs
[07:31:27] [PASSED] 43 VFs
[07:31:27] [PASSED] 44 VFs
[07:31:27] [PASSED] 45 VFs
[07:31:27] [PASSED] 46 VFs
[07:31:27] [PASSED] 47 VFs
[07:31:27] [PASSED] 48 VFs
[07:31:27] [PASSED] 49 VFs
[07:31:27] [PASSED] 50 VFs
[07:31:27] [PASSED] 51 VFs
[07:31:27] [PASSED] 52 VFs
[07:31:27] [PASSED] 53 VFs
[07:31:27] [PASSED] 54 VFs
[07:31:27] [PASSED] 55 VFs
[07:31:27] [PASSED] 56 VFs
[07:31:27] [PASSED] 57 VFs
[07:31:27] [PASSED] 58 VFs
[07:31:27] [PASSED] 59 VFs
[07:31:27] [PASSED] 60 VFs
[07:31:27] [PASSED] 61 VFs
[07:31:27] [PASSED] 62 VFs
[07:31:27] [PASSED] 63 VFs
[07:31:27] ==================== [PASSED] fair_ggtt ====================
[07:31:27] ======================== fair_vram ========================
[07:31:27] [PASSED] 1 VF
[07:31:27] [PASSED] 2 VFs
[07:31:27] [PASSED] 3 VFs
[07:31:27] [PASSED] 4 VFs
[07:31:27] [PASSED] 5 VFs
[07:31:27] [PASSED] 6 VFs
[07:31:27] [PASSED] 7 VFs
[07:31:27] [PASSED] 8 VFs
[07:31:27] [PASSED] 9 VFs
[07:31:27] [PASSED] 10 VFs
[07:31:27] [PASSED] 11 VFs
[07:31:27] [PASSED] 12 VFs
[07:31:27] [PASSED] 13 VFs
[07:31:27] [PASSED] 14 VFs
[07:31:27] [PASSED] 15 VFs
[07:31:27] [PASSED] 16 VFs
[07:31:27] [PASSED] 17 VFs
[07:31:27] [PASSED] 18 VFs
[07:31:27] [PASSED] 19 VFs
[07:31:27] [PASSED] 20 VFs
[07:31:27] [PASSED] 21 VFs
[07:31:27] [PASSED] 22 VFs
[07:31:27] [PASSED] 23 VFs
[07:31:27] [PASSED] 24 VFs
[07:31:27] [PASSED] 25 VFs
[07:31:27] [PASSED] 26 VFs
[07:31:27] [PASSED] 27 VFs
[07:31:27] [PASSED] 28 VFs
[07:31:27] [PASSED] 29 VFs
[07:31:27] [PASSED] 30 VFs
[07:31:27] [PASSED] 31 VFs
[07:31:27] [PASSED] 32 VFs
[07:31:27] [PASSED] 33 VFs
[07:31:27] [PASSED] 34 VFs
[07:31:27] [PASSED] 35 VFs
[07:31:27] [PASSED] 36 VFs
[07:31:27] [PASSED] 37 VFs
[07:31:27] [PASSED] 38 VFs
[07:31:27] [PASSED] 39 VFs
[07:31:27] [PASSED] 40 VFs
[07:31:27] [PASSED] 41 VFs
[07:31:27] [PASSED] 42 VFs
[07:31:27] [PASSED] 43 VFs
[07:31:27] [PASSED] 44 VFs
[07:31:27] [PASSED] 45 VFs
[07:31:27] [PASSED] 46 VFs
[07:31:27] [PASSED] 47 VFs
[07:31:27] [PASSED] 48 VFs
[07:31:27] [PASSED] 49 VFs
[07:31:27] [PASSED] 50 VFs
[07:31:27] [PASSED] 51 VFs
[07:31:27] [PASSED] 52 VFs
[07:31:27] [PASSED] 53 VFs
[07:31:27] [PASSED] 54 VFs
[07:31:27] [PASSED] 55 VFs
[07:31:27] [PASSED] 56 VFs
[07:31:27] [PASSED] 57 VFs
[07:31:27] [PASSED] 58 VFs
[07:31:27] [PASSED] 59 VFs
[07:31:27] [PASSED] 60 VFs
[07:31:27] [PASSED] 61 VFs
[07:31:27] [PASSED] 62 VFs
[07:31:27] [PASSED] 63 VFs
[07:31:27] ==================== [PASSED] fair_vram ====================
[07:31:27] ================== [PASSED] pf_gt_config ===================
[07:31:27] ===================== lmtt (1 subtest) =====================
[07:31:27] ======================== test_ops =========================
[07:31:27] [PASSED] 2-level
[07:31:27] [PASSED] multi-level
[07:31:27] ==================== [PASSED] test_ops =====================
[07:31:27] ====================== [PASSED] lmtt =======================
[07:31:27] ================= sriov_packet (1 subtest) =================
[07:31:27] [PASSED] test_descriptor_init
[07:31:27] ================== [PASSED] sriov_packet ===================
[07:31:27] ================= pf_service (11 subtests) =================
[07:31:27] [PASSED] pf_negotiate_any
[07:31:27] [PASSED] pf_negotiate_base_match
[07:31:27] [PASSED] pf_negotiate_base_newer
[07:31:27] [PASSED] pf_negotiate_base_next
[07:31:27] [SKIPPED] pf_negotiate_base_older (no older minor)
[07:31:27] [PASSED] pf_negotiate_base_prev
[07:31:27] [PASSED] pf_negotiate_latest_match
[07:31:27] [PASSED] pf_negotiate_latest_newer
[07:31:27] [PASSED] pf_negotiate_latest_next
[07:31:27] [SKIPPED] pf_negotiate_latest_older (no older minor)
[07:31:27] [SKIPPED] pf_negotiate_latest_prev (no prev major)
[07:31:27] =================== [PASSED] pf_service ====================
[07:31:27] ================= xe_guc_g2g (2 subtests) ==================
[07:31:27] ============== xe_live_guc_g2g_kunit_default ==============
[07:31:27] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[07:31:27] ============== xe_live_guc_g2g_kunit_allmem ===============
[07:31:27] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[07:31:27] =================== [SKIPPED] xe_guc_g2g ===================
[07:31:27] =================== xe_mocs (2 subtests) ===================
[07:31:27] ================ xe_live_mocs_kernel_kunit ================
[07:31:27] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[07:31:27] ================ xe_live_mocs_reset_kunit =================
[07:31:27] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[07:31:27] ==================== [SKIPPED] xe_mocs =====================
[07:31:27] ================= xe_migrate (3 subtests) ==================
[07:31:27] ================= xe_migrate_sanity_kunit =================
[07:31:27] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[07:31:27] ================== xe_validate_ccs_kunit ==================
[07:31:27] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[07:31:27] ============= xe_migrate_access_memory_kunit ==============
[07:31:27] ========= [SKIPPED] xe_migrate_access_memory_kunit =========
[07:31:27] =================== [SKIPPED] xe_migrate ===================
[07:31:27] ================== xe_dma_buf (1 subtest) ==================
[07:31:27] ==================== xe_dma_buf_kunit =====================
[07:31:27] ================ [SKIPPED] xe_dma_buf_kunit ================
[07:31:27] =================== [SKIPPED] xe_dma_buf ===================
[07:31:27] ================= xe_bo_shrink (1 subtest) =================
[07:31:27] =================== xe_bo_shrink_kunit ====================
[07:31:27] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[07:31:27] ================== [SKIPPED] xe_bo_shrink ==================
[07:31:27] ==================== xe_bo (2 subtests) ====================
[07:31:27] ================== xe_ccs_migrate_kunit ===================
[07:31:27] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[07:31:27] ==================== xe_bo_evict_kunit ====================
[07:31:27] =============== [SKIPPED] xe_bo_evict_kunit ================
[07:31:27] ===================== [SKIPPED] xe_bo ======================
[07:31:27] =================== xe_any (9 subtests) ====================
[07:31:27] [PASSED] test_to_xe
[07:31:27] [PASSED] test_to_dev
[07:31:27] [PASSED] test_to_pdev
[07:31:27] [PASSED] test_to_drm
[07:31:27] [PASSED] test_if_pdev
[07:31:27] [PASSED] test_if_xe
[07:31:27] [PASSED] test_if_tile
[07:31:27] [PASSED] test_if_gt
[07:31:27] [PASSED] test_to_id
[07:31:27] ===================== [PASSED] xe_any ======================
[07:31:27] ==================== args (13 subtests) ====================
[07:31:27] [PASSED] count_args_test
[07:31:27] [PASSED] call_args_example
[07:31:27] [PASSED] call_args_test
[07:31:27] [PASSED] drop_first_arg_example
[07:31:27] [PASSED] drop_first_arg_test
[07:31:27] [PASSED] first_arg_example
[07:31:27] [PASSED] first_arg_test
[07:31:27] [PASSED] last_arg_example
[07:31:27] [PASSED] last_arg_test
[07:31:27] [PASSED] pick_arg_example
[07:31:27] [PASSED] if_args_example
[07:31:27] [PASSED] if_args_test
[07:31:27] [PASSED] sep_comma_example
[07:31:27] ====================== [PASSED] args =======================
[07:31:27] =================== xe_pci (3 subtests) ====================
[07:31:27] ==================== check_graphics_ip ====================
[07:31:27] [PASSED] 12.00 Xe_LP
[07:31:27] [PASSED] 12.10 Xe_LP+
[07:31:27] [PASSED] 12.55 Xe_HPG
[07:31:27] [PASSED] 12.60 Xe_HPC
[07:31:27] [PASSED] 12.70 Xe_LPG
[07:31:27] [PASSED] 12.71 Xe_LPG
[07:31:27] [PASSED] 12.74 Xe_LPG+
[07:31:27] [PASSED] 20.01 Xe2_HPG
[07:31:27] [PASSED] 20.02 Xe2_HPG
[07:31:27] [PASSED] 20.04 Xe2_LPG
[07:31:27] [PASSED] 30.00 Xe3_LPG
[07:31:27] [PASSED] 30.01 Xe3_LPG
[07:31:27] [PASSED] 30.03 Xe3_LPG
[07:31:27] [PASSED] 30.04 Xe3_LPG
[07:31:27] [PASSED] 30.05 Xe3_LPG
[07:31:27] [PASSED] 35.10 Xe3p_LPG
[07:31:27] [PASSED] 35.11 Xe3p_XPC
[07:31:27] ================ [PASSED] check_graphics_ip ================
[07:31:27] ===================== check_media_ip ======================
[07:31:27] [PASSED] 12.00 Xe_M
[07:31:27] [PASSED] 12.55 Xe_HPM
[07:31:27] [PASSED] 13.00 Xe_LPM+
[07:31:27] [PASSED] 13.01 Xe2_HPM
[07:31:27] [PASSED] 20.00 Xe2_LPM
[07:31:27] [PASSED] 30.00 Xe3_LPM
[07:31:27] [PASSED] 30.02 Xe3_LPM
[07:31:27] [PASSED] 35.00 Xe3p_LPM
[07:31:27] [PASSED] 35.03 Xe3p_HPM
[07:31:27] ================= [PASSED] check_media_ip ==================
[07:31:27] =================== check_platform_desc ===================
[07:31:27] [PASSED] 0x9A60 (TIGERLAKE)
[07:31:27] [PASSED] 0x9A68 (TIGERLAKE)
[07:31:27] [PASSED] 0x9A70 (TIGERLAKE)
[07:31:27] [PASSED] 0x9A40 (TIGERLAKE)
[07:31:27] [PASSED] 0x9A49 (TIGERLAKE)
[07:31:27] [PASSED] 0x9A59 (TIGERLAKE)
[07:31:27] [PASSED] 0x9A78 (TIGERLAKE)
[07:31:27] [PASSED] 0x9AC0 (TIGERLAKE)
[07:31:27] [PASSED] 0x9AC9 (TIGERLAKE)
[07:31:27] [PASSED] 0x9AD9 (TIGERLAKE)
[07:31:27] [PASSED] 0x9AF8 (TIGERLAKE)
[07:31:27] [PASSED] 0x4C80 (ROCKETLAKE)
[07:31:27] [PASSED] 0x4C8A (ROCKETLAKE)
[07:31:27] [PASSED] 0x4C8B (ROCKETLAKE)
[07:31:27] [PASSED] 0x4C8C (ROCKETLAKE)
[07:31:27] [PASSED] 0x4C90 (ROCKETLAKE)
[07:31:27] [PASSED] 0x4C9A (ROCKETLAKE)
[07:31:27] [PASSED] 0x4680 (ALDERLAKE_S)
[07:31:27] [PASSED] 0x4682 (ALDERLAKE_S)
[07:31:27] [PASSED] 0x4688 (ALDERLAKE_S)
[07:31:27] [PASSED] 0x468A (ALDERLAKE_S)
[07:31:27] [PASSED] 0x468B (ALDERLAKE_S)
[07:31:27] [PASSED] 0x4690 (ALDERLAKE_S)
[07:31:27] [PASSED] 0x4692 (ALDERLAKE_S)
[07:31:27] [PASSED] 0x4693 (ALDERLAKE_S)
[07:31:27] [PASSED] 0x46A0 (ALDERLAKE_P)
[07:31:27] [PASSED] 0x46A1 (ALDERLAKE_P)
[07:31:27] [PASSED] 0x46A2 (ALDERLAKE_P)
[07:31:27] [PASSED] 0x46A3 (ALDERLAKE_P)
[07:31:27] [PASSED] 0x46A6 (ALDERLAKE_P)
[07:31:27] [PASSED] 0x46A8 (ALDERLAKE_P)
[07:31:27] [PASSED] 0x46AA (ALDERLAKE_P)
[07:31:27] [PASSED] 0x462A (ALDERLAKE_P)
[07:31:27] [PASSED] 0x4626 (ALDERLAKE_P)
[07:31:27] [PASSED] 0x4628 (ALDERLAKE_P)
[07:31:27] [PASSED] 0x46B0 (ALDERLAKE_P)
[07:31:27] [PASSED] 0x46B1 (ALDERLAKE_P)
[07:31:27] [PASSED] 0x46B2 (ALDERLAKE_P)
[07:31:27] [PASSED] 0x46B3 (ALDERLAKE_P)
[07:31:27] [PASSED] 0x46C0 (ALDERLAKE_P)
[07:31:27] [PASSED] 0x46C1 (ALDERLAKE_P)
[07:31:27] [PASSED] 0x46C2 (ALDERLAKE_P)
[07:31:27] [PASSED] 0x46C3 (ALDERLAKE_P)
[07:31:27] [PASSED] 0x46D0 (ALDERLAKE_N)
[07:31:27] [PASSED] 0x46D1 (ALDERLAKE_N)
[07:31:27] [PASSED] 0x46D2 (ALDERLAKE_N)
[07:31:27] [PASSED] 0x46D3 (ALDERLAKE_N)
[07:31:27] [PASSED] 0x46D4 (ALDERLAKE_N)
[07:31:27] [PASSED] 0xA721 (ALDERLAKE_P)
[07:31:27] [PASSED] 0xA7A1 (ALDERLAKE_P)
[07:31:27] [PASSED] 0xA7A9 (ALDERLAKE_P)
[07:31:27] [PASSED] 0xA7AC (ALDERLAKE_P)
[07:31:27] [PASSED] 0xA7AD (ALDERLAKE_P)
[07:31:27] [PASSED] 0xA720 (ALDERLAKE_P)
[07:31:27] [PASSED] 0xA7A0 (ALDERLAKE_P)
[07:31:27] [PASSED] 0xA7A8 (ALDERLAKE_P)
[07:31:27] [PASSED] 0xA7AA (ALDERLAKE_P)
[07:31:27] [PASSED] 0xA7AB (ALDERLAKE_P)
[07:31:27] [PASSED] 0xA780 (ALDERLAKE_S)
[07:31:27] [PASSED] 0xA781 (ALDERLAKE_S)
[07:31:27] [PASSED] 0xA782 (ALDERLAKE_S)
[07:31:27] [PASSED] 0xA783 (ALDERLAKE_S)
[07:31:27] [PASSED] 0xA788 (ALDERLAKE_S)
[07:31:27] [PASSED] 0xA789 (ALDERLAKE_S)
[07:31:27] [PASSED] 0xA78A (ALDERLAKE_S)
[07:31:27] [PASSED] 0xA78B (ALDERLAKE_S)
[07:31:27] [PASSED] 0x4905 (DG1)
[07:31:27] [PASSED] 0x4906 (DG1)
[07:31:27] [PASSED] 0x4907 (DG1)
[07:31:27] [PASSED] 0x4908 (DG1)
[07:31:27] [PASSED] 0x4909 (DG1)
[07:31:27] [PASSED] 0x56C0 (DG2)
[07:31:27] [PASSED] 0x56C2 (DG2)
[07:31:27] [PASSED] 0x56C1 (DG2)
[07:31:27] [PASSED] 0x7D51 (METEORLAKE)
[07:31:27] [PASSED] 0x7DD1 (METEORLAKE)
[07:31:27] [PASSED] 0x7D41 (METEORLAKE)
[07:31:27] [PASSED] 0x7D67 (METEORLAKE)
[07:31:27] [PASSED] 0xB640 (METEORLAKE)
[07:31:27] [PASSED] 0x56A0 (DG2)
[07:31:27] [PASSED] 0x56A1 (DG2)
[07:31:27] [PASSED] 0x56A2 (DG2)
[07:31:27] [PASSED] 0x56BE (DG2)
[07:31:27] [PASSED] 0x56BF (DG2)
[07:31:27] [PASSED] 0x5690 (DG2)
[07:31:27] [PASSED] 0x5691 (DG2)
[07:31:27] [PASSED] 0x5692 (DG2)
[07:31:27] [PASSED] 0x56A5 (DG2)
[07:31:27] [PASSED] 0x56A6 (DG2)
[07:31:27] [PASSED] 0x56B0 (DG2)
[07:31:27] [PASSED] 0x56B1 (DG2)
[07:31:27] [PASSED] 0x56BA (DG2)
[07:31:27] [PASSED] 0x56BB (DG2)
[07:31:27] [PASSED] 0x56BC (DG2)
[07:31:27] [PASSED] 0x56BD (DG2)
[07:31:27] [PASSED] 0x5693 (DG2)
[07:31:27] [PASSED] 0x5694 (DG2)
[07:31:27] [PASSED] 0x5695 (DG2)
[07:31:27] [PASSED] 0x56A3 (DG2)
[07:31:27] [PASSED] 0x56A4 (DG2)
[07:31:27] [PASSED] 0x56B2 (DG2)
[07:31:27] [PASSED] 0x56B3 (DG2)
[07:31:27] [PASSED] 0x5696 (DG2)
[07:31:27] [PASSED] 0x5697 (DG2)
[07:31:27] [PASSED] 0xB69 (PVC)
[07:31:27] [PASSED] 0xB6E (PVC)
[07:31:27] [PASSED] 0xBD4 (PVC)
[07:31:27] [PASSED] 0xBD5 (PVC)
[07:31:27] [PASSED] 0xBD6 (PVC)
[07:31:27] [PASSED] 0xBD7 (PVC)
[07:31:27] [PASSED] 0xBD8 (PVC)
[07:31:27] [PASSED] 0xBD9 (PVC)
[07:31:27] [PASSED] 0xBDA (PVC)
[07:31:27] [PASSED] 0xBDB (PVC)
[07:31:27] [PASSED] 0xBE0 (PVC)
[07:31:27] [PASSED] 0xBE1 (PVC)
[07:31:27] [PASSED] 0xBE5 (PVC)
[07:31:27] [PASSED] 0x7D40 (METEORLAKE)
[07:31:27] [PASSED] 0x7D45 (METEORLAKE)
[07:31:27] [PASSED] 0x7D55 (METEORLAKE)
[07:31:27] [PASSED] 0x7D60 (METEORLAKE)
[07:31:27] [PASSED] 0x7DD5 (METEORLAKE)
[07:31:27] [PASSED] 0x6420 (LUNARLAKE)
[07:31:27] [PASSED] 0x64A0 (LUNARLAKE)
[07:31:27] [PASSED] 0x64B0 (LUNARLAKE)
[07:31:27] [PASSED] 0xE202 (BATTLEMAGE)
[07:31:27] [PASSED] 0xE209 (BATTLEMAGE)
[07:31:27] [PASSED] 0xE20B (BATTLEMAGE)
[07:31:27] [PASSED] 0xE20C (BATTLEMAGE)
[07:31:27] [PASSED] 0xE20D (BATTLEMAGE)
[07:31:27] [PASSED] 0xE210 (BATTLEMAGE)
[07:31:27] [PASSED] 0xE211 (BATTLEMAGE)
[07:31:27] [PASSED] 0xE212 (BATTLEMAGE)
[07:31:27] [PASSED] 0xE216 (BATTLEMAGE)
[07:31:27] [PASSED] 0xE220 (BATTLEMAGE)
[07:31:27] [PASSED] 0xE221 (BATTLEMAGE)
[07:31:27] [PASSED] 0xE222 (BATTLEMAGE)
[07:31:27] [PASSED] 0xE223 (BATTLEMAGE)
[07:31:27] [PASSED] 0xB080 (PANTHERLAKE)
[07:31:27] [PASSED] 0xB081 (PANTHERLAKE)
[07:31:27] [PASSED] 0xB082 (PANTHERLAKE)
[07:31:27] [PASSED] 0xB083 (PANTHERLAKE)
[07:31:27] [PASSED] 0xB084 (PANTHERLAKE)
[07:31:27] [PASSED] 0xB085 (PANTHERLAKE)
[07:31:27] [PASSED] 0xB086 (PANTHERLAKE)
[07:31:27] [PASSED] 0xB087 (PANTHERLAKE)
[07:31:27] [PASSED] 0xB08F (PANTHERLAKE)
[07:31:27] [PASSED] 0xB090 (PANTHERLAKE)
[07:31:27] [PASSED] 0xB0A0 (PANTHERLAKE)
[07:31:27] [PASSED] 0xB0A1 (PANTHERLAKE)
[07:31:27] [PASSED] 0xB0B0 (PANTHERLAKE)
[07:31:27] [PASSED] 0xFD80 (PANTHERLAKE)
[07:31:27] [PASSED] 0xFD81 (PANTHERLAKE)
[07:31:27] [PASSED] 0xD740 (NOVALAKE_S)
[07:31:27] [PASSED] 0xD741 (NOVALAKE_S)
[07:31:27] [PASSED] 0xD742 (NOVALAKE_S)
[07:31:27] [PASSED] 0xD743 (NOVALAKE_S)
[07:31:27] [PASSED] 0xD745 (NOVALAKE_S)
[07:31:27] [PASSED] 0xD74A (NOVALAKE_S)
[07:31:27] [PASSED] 0xD74B (NOVALAKE_S)
[07:31:27] [PASSED] 0x674C (CRESCENTISLAND)
[07:31:27] [PASSED] 0x674D (CRESCENTISLAND)
[07:31:27] [PASSED] 0x674E (CRESCENTISLAND)
[07:31:27] [PASSED] 0x674F (CRESCENTISLAND)
[07:31:27] [PASSED] 0x6750 (CRESCENTISLAND)
[07:31:27] [PASSED] 0x6751 (CRESCENTISLAND)
[07:31:27] [PASSED] 0x6752 (CRESCENTISLAND)
[07:31:27] [PASSED] 0xD750 (NOVALAKE_P)
[07:31:27] [PASSED] 0xD751 (NOVALAKE_P)
[07:31:27] [PASSED] 0xD752 (NOVALAKE_P)
[07:31:27] [PASSED] 0xD753 (NOVALAKE_P)
[07:31:27] [PASSED] 0xD754 (NOVALAKE_P)
[07:31:27] [PASSED] 0xD755 (NOVALAKE_P)
[07:31:27] [PASSED] 0xD756 (NOVALAKE_P)
[07:31:27] [PASSED] 0xD757 (NOVALAKE_P)
[07:31:27] [PASSED] 0xD75F (NOVALAKE_P)
[07:31:27] =============== [PASSED] check_platform_desc ===============
[07:31:27] ===================== [PASSED] xe_pci ======================
[07:31:27] ============= xe_rtp_tables_test (5 subtests) ==============
[07:31:27] ================== xe_rtp_table_gt_test ===================
[07:31:27] [PASSED] gt_was/14011060649
[07:31:27] [PASSED] gt_was/14011059788
[07:31:27] [PASSED] gt_was/14015795083
[07:31:27] [PASSED] gt_was/16021867713
[07:31:27] [PASSED] gt_was/14019449301
[07:31:27] [PASSED] gt_was/16028005424
[07:31:27] [PASSED] gt_was/14026578760
[07:31:27] [PASSED] gt_was/1409420604
[07:31:27] [PASSED] gt_was/1408615072
[07:31:27] [PASSED] gt_was/22010523718
[07:31:27] [PASSED] gt_was/14011006942
[07:31:27] [PASSED] gt_was/14014830051
[07:31:27] [PASSED] gt_was/18018781329
[07:31:27] [PASSED] gt_was/1509235366
[07:31:27] [PASSED] gt_was/18018781329
[07:31:27] [PASSED] gt_was/16016694945
[07:31:27] [PASSED] gt_was/14018575942
[07:31:27] [PASSED] gt_was/22016670082
[07:31:27] [PASSED] gt_was/22016670082
[07:31:27] [PASSED] gt_was/14017421178
[07:31:27] [PASSED] gt_was/16025250150
[07:31:27] [PASSED] gt_was/14021871409
[07:31:27] [PASSED] gt_was/16021865536
[07:31:27] [PASSED] gt_was/14021486841
[07:31:27] [PASSED] gt_was/14025160223
[07:31:27] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[07:31:27] [PASSED] gt_was/14025635424
[07:31:27] [PASSED] gt_was/16028005424
[07:31:27] ============== [PASSED] xe_rtp_table_gt_test ===============
[07:31:27] ================== xe_rtp_table_gt_test ===================
[07:31:27] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[07:31:27] [PASSED] gt_tunings/Tuning: 32B Access Enable
[07:31:27] [PASSED] gt_tunings/Tuning: L3 cache
[07:31:27] [PASSED] gt_tunings/Tuning: L3 cache - media
[07:31:27] [PASSED] gt_tunings/Tuning: Compression Overfetch
[07:31:27] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[07:31:27] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[07:31:27] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[07:31:27] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[07:31:27] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[07:31:27] [PASSED] gt_tunings/Tuning: Stateless compression control
[07:31:27] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[07:31:27] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[07:31:27] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[07:31:27] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[07:31:27] [PASSED] gt_tunings/Tuning: Force All Non-Compressible Memory Reads to be 256B Overfetches
[07:31:27] ============== [PASSED] xe_rtp_table_gt_test ===============
[07:31:27] ================== xe_rtp_table_oob_test ==================
[07:31:27] [PASSED] oob_was/1607983814
[07:31:27] [PASSED] oob_was/16010904313
[07:31:27] [PASSED] oob_was/18022495364
[07:31:27] [PASSED] oob_was/22012773006
[07:31:27] [PASSED] oob_was/14014475959
[07:31:27] [PASSED] oob_was/22011391025
[07:31:27] [PASSED] oob_was/22012727170
[07:31:27] [PASSED] oob_was/22012727685
[07:31:27] [PASSED] oob_was/22016596838
[07:31:27] [PASSED] oob_was/18020744125
[07:31:27] [PASSED] oob_was/1409600907
[07:31:27] [PASSED] oob_was/22014953428
[07:31:27] [PASSED] oob_was/16017236439
[07:31:27] [PASSED] oob_was/14019821291
[07:31:27] [PASSED] oob_was/14015076503
[07:31:27] [PASSED] oob_was/22016122933
[07:31:27] [PASSED] oob_was/14018913170
[07:31:27] [PASSED] oob_was/14018094691
[07:31:27] [PASSED] oob_was/18024947630
[07:31:27] [PASSED] oob_was/16022287689
[07:31:27] [PASSED] oob_was/13011645652
[07:31:27] [PASSED] oob_was/14022293748
[07:31:27] [PASSED] oob_was/22019794406
[07:31:27] [PASSED] oob_was/22019338487
[07:31:27] [PASSED] oob_was/16023588340
[07:31:27] [PASSED] oob_was/14019789679
[07:31:27] [PASSED] oob_was/14022866841
[07:31:27] [PASSED] oob_was/16021333562
[07:31:27] [PASSED] oob_was/14016712196
[07:31:27] [PASSED] oob_was/14015568240
[07:31:27] [PASSED] oob_was/18013179988
[07:31:27] [PASSED] oob_was/1508761755
[07:31:27] [PASSED] oob_was/16023105232
[07:31:27] [PASSED] oob_was/16026508708
[07:31:27] [PASSED] oob_was/14020001231
[07:31:27] [PASSED] oob_was/16023683509
[07:31:27] [PASSED] oob_was/14025515070
[07:31:27] [PASSED] oob_was/15015404425_disable
[07:31:27] [PASSED] oob_was/16026007364
[07:31:27] [PASSED] oob_was/14020316580
[07:31:27] [PASSED] oob_was/14025883347
[07:31:27] [PASSED] oob_was/16029380221
[07:31:27] [PASSED] oob_was/22022079272
[07:31:27] [PASSED] oob_was/16029897822
[07:31:27] [PASSED] oob_was/14026539277
[07:31:27] [PASSED] oob_was/14027054324
[07:31:27] [PASSED] oob_was/14025941587
[07:31:27] [PASSED] oob_was/16030224309
[07:31:27] [PASSED] oob_was/14028709524
[07:31:27] ============== [PASSED] xe_rtp_table_oob_test ==============
[07:31:27] ================ xe_rtp_table_dev_oob_test ================
[07:31:27] [PASSED] device_oob_was/22010954014
[07:31:27] [PASSED] device_oob_was/15015404425
[07:31:27] [PASSED] device_oob_was/22019338487_display
[07:31:27] [PASSED] device_oob_was/14022085890
[07:31:27] [PASSED] device_oob_was/14026633728
[07:31:27] [PASSED] device_oob_was/14026746987
[07:31:27] [PASSED] device_oob_was/14026779378
[07:31:27] [PASSED] device_oob_was/14028434957
[07:31:27] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[07:31:27] ========== xe_rtp_table_missing_upper_bound_test ==========
[07:31:27] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865
[07:31:27] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037
[07:31:27] [PASSED] register_whitelist/1806527549
[07:31:27] [PASSED] register_whitelist/allow_read_ctx_timestamp
[07:31:27] [PASSED] register_whitelist/allow_read_queue_timestamp
[07:31:27] [PASSED] register_whitelist/16014440446
[07:31:27] [PASSED] register_whitelist/16017236439
[07:31:27] [PASSED] register_whitelist/16020183090
[07:31:27] [PASSED] register_whitelist/14024997852
[07:31:27] [PASSED] register_whitelist/14024997852
[07:31:27] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ======
[07:31:27] =============== [PASSED] xe_rtp_tables_test ================
[07:31:27] =================== xe_rtp (3 subtests) ====================
[07:31:27] =================== xe_rtp_rules_tests ====================
[07:31:27] [PASSED] no
[07:31:27] [PASSED] yes
[07:31:27] [PASSED] no-and-no
[07:31:27] [PASSED] no-and-yes
[07:31:27] [PASSED] yes-and-no
[07:31:27] [PASSED] yes-and-yes
[07:31:27] [PASSED] no-or-no
[07:31:27] [PASSED] no-or-yes
[07:31:27] [PASSED] yes-or-no
[07:31:27] [PASSED] yes-or-yes
[07:31:27] [PASSED] no-yes-or-yes-no
[07:31:27] [PASSED] no-yes-or-yes-yes
[07:31:27] [PASSED] yes-yes-or-no-yes
[07:31:27] [PASSED] yes-yes-or-yes-yes
[07:31:27] [PASSED] no-no-or-yes-or-no
[07:31:27] [PASSED] or
[07:31:27] [PASSED] or-yes
[07:31:27] [PASSED] or-no
[07:31:27] [PASSED] yes-or
[07:31:27] [PASSED] no-or
[07:31:27] [PASSED] no-or-or-yes
[07:31:27] [PASSED] yes-or-or-no
[07:31:27] [PASSED] no-or-or-no
[07:31:27] [PASSED] missing-context-engine-class
[07:31:27] [PASSED] missing-context-engine-class-or-yes
[07:31:27] [PASSED] missing-context-engine-class-or-or-yes
[07:31:27] =============== [PASSED] xe_rtp_rules_tests ================
[07:31:27] =============== xe_rtp_process_to_sr_tests ================
[07:31:27] [PASSED] coalesce-same-reg
[07:31:27] [PASSED] coalesce-same-reg-literal-and-func
[07:31:27] [PASSED] no-match-no-add
[07:31:27] [PASSED] two-regs-two-entries
[07:31:27] [PASSED] clr-one-set-other
[07:31:27] [PASSED] set-field
[07:31:27] [PASSED] conflict-duplicate
[07:31:27] [PASSED] conflict-not-disjoint
[07:31:27] [PASSED] conflict-not-disjoint-literal-and-func
[07:31:27] [PASSED] conflict-reg-type
[07:31:27] [PASSED] bad-mcr-reg-forced-to-regular
[07:31:27] [PASSED] bad-regular-reg-forced-to-mcr
[07:31:27] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[07:31:27] ================== xe_rtp_process_tests ===================
[07:31:27] [PASSED] active1
[07:31:27] [PASSED] active2
[07:31:27] [PASSED] active-inactive
[07:31:27] [PASSED] inactive-active
[07:31:27] [PASSED] inactive-active-inactive
[07:31:27] [PASSED] inactive-inactive-inactive
[07:31:27] ============== [PASSED] xe_rtp_process_tests ===============
[07:31:27] ===================== [PASSED] xe_rtp ======================
[07:31:27] ==================== xe_wa (1 subtest) =====================
[07:31:27] ======================== xe_wa_gt =========================
[07:31:27] [PASSED] TIGERLAKE B0
[07:31:27] [PASSED] DG1 A0
[07:31:27] [PASSED] DG1 B0
[07:31:27] [PASSED] ALDERLAKE_S A0
[07:31:27] [PASSED] ALDERLAKE_S B0
[07:31:27] [PASSED] ALDERLAKE_S C0
[07:31:27] [PASSED] ALDERLAKE_S D0
[07:31:27] [PASSED] ALDERLAKE_P A0
[07:31:27] [PASSED] ALDERLAKE_P B0
[07:31:27] [PASSED] ALDERLAKE_P C0
[07:31:27] [PASSED] ALDERLAKE_S RPLS D0
[07:31:27] [PASSED] ALDERLAKE_P RPLU E0
[07:31:27] [PASSED] DG2 G10 C0
[07:31:27] [PASSED] DG2 G11 B1
[07:31:27] [PASSED] DG2 G12 A1
[07:31:27] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[07:31:27] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[07:31:27] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[07:31:27] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[07:31:27] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[07:31:27] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[07:31:27] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[07:31:27] ==================== [PASSED] xe_wa_gt =====================
[07:31:27] ====================== [PASSED] xe_wa ======================
[07:31:27] ============================================================
[07:31:27] Testing complete. Ran 841 tests: passed: 812, skipped: 29
[07:31:27] Elapsed time: 40.720s total, 2.475s configuring, 37.529s building, 0.707s running
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[07:31:27] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[07:31:30] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[07:31:55] Starting KUnit Kernel (1/1)...
[07:31:55] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[07:31:55] ============ drm_test_pick_cmdline (2 subtests) ============
[07:31:55] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[07:31:55] =============== drm_test_pick_cmdline_named ===============
[07:31:55] [PASSED] NTSC
[07:31:55] [PASSED] NTSC-J
[07:31:55] [PASSED] PAL
[07:31:55] [PASSED] PAL-M
[07:31:55] =========== [PASSED] drm_test_pick_cmdline_named ===========
[07:31:55] ============== [PASSED] drm_test_pick_cmdline ==============
[07:31:55] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[07:31:55] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[07:31:55] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[07:31:55] =========== drm_validate_clone_mode (2 subtests) ===========
[07:31:55] ============== drm_test_check_in_clone_mode ===============
[07:31:55] [PASSED] in_clone_mode
[07:31:55] [PASSED] not_in_clone_mode
[07:31:55] ========== [PASSED] drm_test_check_in_clone_mode ===========
[07:31:55] =============== drm_test_check_valid_clones ===============
[07:31:55] [PASSED] not_in_clone_mode
[07:31:55] [PASSED] valid_clone
[07:31:55] [PASSED] invalid_clone
[07:31:55] =========== [PASSED] drm_test_check_valid_clones ===========
[07:31:55] ============= [PASSED] drm_validate_clone_mode =============
[07:31:55] ============= drm_validate_modeset (1 subtest) =============
[07:31:55] [PASSED] drm_test_check_connector_changed_modeset
[07:31:55] ============== [PASSED] drm_validate_modeset ===============
[07:31:55] ====== drm_test_bridge_get_current_state (1 subtest) =======
[07:31:55] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[07:31:55] ======== [PASSED] drm_test_bridge_get_current_state ========
[07:31:55] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[07:31:55] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[07:31:55] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[07:31:55] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[07:31:55] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[07:31:55] ============== drm_bridge_alloc (2 subtests) ===============
[07:31:55] [PASSED] drm_test_drm_bridge_alloc_basic
[07:31:55] [PASSED] drm_test_drm_bridge_alloc_get_put
[07:31:55] ================ [PASSED] drm_bridge_alloc =================
[07:31:55] ============= drm_bridge_bus_fmt (5 subtests) ==============
[07:31:55] [PASSED] drm_test_bridge_rgb_yuv_rgb
[07:31:55] [PASSED] drm_test_bridge_must_convert_to_yuv444
[07:31:55] [PASSED] drm_test_bridge_hdmi_auto_rgb
[07:31:55] [PASSED] drm_test_bridge_auto_first
[07:31:55] [PASSED] drm_test_bridge_rgb_yuv_no_path
[07:31:55] =============== [PASSED] drm_bridge_bus_fmt ================
[07:31:55] ============= drm_cmdline_parser (40 subtests) =============
[07:31:55] [PASSED] drm_test_cmdline_force_d_only
[07:31:55] [PASSED] drm_test_cmdline_force_D_only_dvi
[07:31:55] [PASSED] drm_test_cmdline_force_D_only_hdmi
[07:31:55] [PASSED] drm_test_cmdline_force_D_only_not_digital
[07:31:55] [PASSED] drm_test_cmdline_force_e_only
[07:31:55] [PASSED] drm_test_cmdline_res
[07:31:55] [PASSED] drm_test_cmdline_res_vesa
[07:31:55] [PASSED] drm_test_cmdline_res_vesa_rblank
[07:31:55] [PASSED] drm_test_cmdline_res_rblank
[07:31:55] [PASSED] drm_test_cmdline_res_bpp
[07:31:55] [PASSED] drm_test_cmdline_res_refresh
[07:31:55] [PASSED] drm_test_cmdline_res_bpp_refresh
[07:31:55] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[07:31:55] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[07:31:55] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[07:31:55] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[07:31:55] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[07:31:55] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[07:31:55] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[07:31:55] [PASSED] drm_test_cmdline_res_margins_force_on
[07:31:55] [PASSED] drm_test_cmdline_res_vesa_margins
[07:31:55] [PASSED] drm_test_cmdline_name
[07:31:55] [PASSED] drm_test_cmdline_name_bpp
[07:31:55] [PASSED] drm_test_cmdline_name_option
[07:31:55] [PASSED] drm_test_cmdline_name_bpp_option
[07:31:55] [PASSED] drm_test_cmdline_rotate_0
[07:31:55] [PASSED] drm_test_cmdline_rotate_90
[07:31:55] [PASSED] drm_test_cmdline_rotate_180
[07:31:55] [PASSED] drm_test_cmdline_rotate_270
[07:31:55] [PASSED] drm_test_cmdline_hmirror
[07:31:55] [PASSED] drm_test_cmdline_vmirror
[07:31:55] [PASSED] drm_test_cmdline_margin_options
[07:31:55] [PASSED] drm_test_cmdline_multiple_options
[07:31:55] [PASSED] drm_test_cmdline_bpp_extra_and_option
[07:31:55] [PASSED] drm_test_cmdline_extra_and_option
[07:31:55] [PASSED] drm_test_cmdline_freestanding_options
[07:31:55] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[07:31:55] [PASSED] drm_test_cmdline_panel_orientation
[07:31:55] ================ drm_test_cmdline_invalid =================
[07:31:55] [PASSED] margin_only
[07:31:55] [PASSED] interlace_only
[07:31:55] [PASSED] res_missing_x
[07:31:55] [PASSED] res_missing_y
[07:31:55] [PASSED] res_bad_y
[07:31:55] [PASSED] res_missing_y_bpp
[07:31:55] [PASSED] res_bad_bpp
[07:31:55] [PASSED] res_bad_refresh
[07:31:55] [PASSED] res_bpp_refresh_force_on_off
[07:31:55] [PASSED] res_invalid_mode
[07:31:55] [PASSED] res_bpp_wrong_place_mode
[07:31:55] [PASSED] name_bpp_refresh
[07:31:55] [PASSED] name_refresh
[07:31:55] [PASSED] name_refresh_wrong_mode
[07:31:55] [PASSED] name_refresh_invalid_mode
[07:31:55] [PASSED] rotate_multiple
[07:31:55] [PASSED] rotate_invalid_val
[07:31:55] [PASSED] rotate_truncated
[07:31:55] [PASSED] invalid_option
[07:31:55] [PASSED] invalid_tv_option
[07:31:55] [PASSED] truncated_tv_option
[07:31:55] ============ [PASSED] drm_test_cmdline_invalid =============
[07:31:55] =============== drm_test_cmdline_tv_options ===============
[07:31:55] [PASSED] NTSC
[07:31:55] [PASSED] NTSC_443
[07:31:55] [PASSED] NTSC_J
[07:31:55] [PASSED] PAL
[07:31:55] [PASSED] PAL_M
[07:31:55] [PASSED] PAL_N
[07:31:55] [PASSED] SECAM
[07:31:55] [PASSED] MONO_525
[07:31:55] [PASSED] MONO_625
[07:31:55] =========== [PASSED] drm_test_cmdline_tv_options ===========
[07:31:55] =============== [PASSED] drm_cmdline_parser ================
[07:31:55] ========== drmm_connector_hdmi_init (20 subtests) ==========
[07:31:55] [PASSED] drm_test_connector_hdmi_init_valid
[07:31:55] [PASSED] drm_test_connector_hdmi_init_bpc_8
[07:31:55] [PASSED] drm_test_connector_hdmi_init_bpc_10
[07:31:55] [PASSED] drm_test_connector_hdmi_init_bpc_12
[07:31:55] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[07:31:55] [PASSED] drm_test_connector_hdmi_init_bpc_null
[07:31:55] [PASSED] drm_test_connector_hdmi_init_formats_empty
[07:31:55] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[07:31:55] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[07:31:55] [PASSED] supported_formats=0x9 yuv420_allowed=1
[07:31:55] [PASSED] supported_formats=0x9 yuv420_allowed=0
[07:31:55] [PASSED] supported_formats=0x5 yuv420_allowed=1
[07:31:55] [PASSED] supported_formats=0x5 yuv420_allowed=0
[07:31:55] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[07:31:55] [PASSED] drm_test_connector_hdmi_init_null_ddc
[07:31:55] [PASSED] drm_test_connector_hdmi_init_null_product
[07:31:55] [PASSED] drm_test_connector_hdmi_init_null_vendor
[07:31:55] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[07:31:55] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[07:31:55] [PASSED] drm_test_connector_hdmi_init_product_valid
[07:31:55] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[07:31:55] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[07:31:55] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[07:31:55] ========= drm_test_connector_hdmi_init_type_valid =========
[07:31:55] [PASSED] HDMI-A
[07:31:55] [PASSED] HDMI-B
[07:31:55] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[07:31:55] ======== drm_test_connector_hdmi_init_type_invalid ========
[07:31:55] [PASSED] Unknown
[07:31:55] [PASSED] VGA
[07:31:55] [PASSED] DVI-I
[07:31:55] [PASSED] DVI-D
[07:31:55] [PASSED] DVI-A
[07:31:55] [PASSED] Composite
[07:31:55] [PASSED] SVIDEO
[07:31:55] [PASSED] LVDS
[07:31:55] [PASSED] Component
[07:31:55] [PASSED] DIN
[07:31:55] [PASSED] DP
[07:31:55] [PASSED] TV
[07:31:55] [PASSED] eDP
[07:31:55] [PASSED] Virtual
[07:31:55] [PASSED] DSI
[07:31:55] [PASSED] DPI
[07:31:55] [PASSED] Writeback
[07:31:55] [PASSED] SPI
[07:31:55] [PASSED] USB
[07:31:55] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[07:31:55] ============ [PASSED] drmm_connector_hdmi_init =============
[07:31:55] ============= drmm_connector_init (3 subtests) =============
[07:31:55] [PASSED] drm_test_drmm_connector_init
[07:31:55] [PASSED] drm_test_drmm_connector_init_null_ddc
[07:31:55] ========= drm_test_drmm_connector_init_type_valid =========
[07:31:55] [PASSED] Unknown
[07:31:55] [PASSED] VGA
[07:31:55] [PASSED] DVI-I
[07:31:55] [PASSED] DVI-D
[07:31:55] [PASSED] DVI-A
[07:31:55] [PASSED] Composite
[07:31:55] [PASSED] SVIDEO
[07:31:55] [PASSED] LVDS
[07:31:55] [PASSED] Component
[07:31:55] [PASSED] DIN
[07:31:55] [PASSED] DP
[07:31:55] [PASSED] HDMI-A
[07:31:55] [PASSED] HDMI-B
[07:31:55] [PASSED] TV
[07:31:55] [PASSED] eDP
[07:31:55] [PASSED] Virtual
[07:31:55] [PASSED] DSI
[07:31:55] [PASSED] DPI
[07:31:55] [PASSED] Writeback
[07:31:55] [PASSED] SPI
[07:31:55] [PASSED] USB
[07:31:55] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[07:31:55] =============== [PASSED] drmm_connector_init ===============
[07:31:55] ========= drm_connector_dynamic_init (6 subtests) ==========
[07:31:55] [PASSED] drm_test_drm_connector_dynamic_init
[07:31:55] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[07:31:55] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[07:31:55] [PASSED] drm_test_drm_connector_dynamic_init_properties
[07:31:55] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[07:31:55] [PASSED] Unknown
[07:31:55] [PASSED] VGA
[07:31:55] [PASSED] DVI-I
[07:31:55] [PASSED] DVI-D
[07:31:55] [PASSED] DVI-A
[07:31:55] [PASSED] Composite
[07:31:55] [PASSED] SVIDEO
[07:31:55] [PASSED] LVDS
[07:31:55] [PASSED] Component
[07:31:55] [PASSED] DIN
[07:31:55] [PASSED] DP
[07:31:55] [PASSED] HDMI-A
[07:31:55] [PASSED] HDMI-B
[07:31:55] [PASSED] TV
[07:31:55] [PASSED] eDP
[07:31:55] [PASSED] Virtual
[07:31:55] [PASSED] DSI
[07:31:55] [PASSED] DPI
[07:31:55] [PASSED] Writeback
[07:31:55] [PASSED] SPI
[07:31:55] [PASSED] USB
[07:31:55] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[07:31:55] ======== drm_test_drm_connector_dynamic_init_name =========
[07:31:55] [PASSED] Unknown
[07:31:55] [PASSED] VGA
[07:31:55] [PASSED] DVI-I
[07:31:55] [PASSED] DVI-D
[07:31:55] [PASSED] DVI-A
[07:31:55] [PASSED] Composite
[07:31:55] [PASSED] SVIDEO
[07:31:55] [PASSED] LVDS
[07:31:55] [PASSED] Component
[07:31:55] [PASSED] DIN
[07:31:55] [PASSED] DP
[07:31:55] [PASSED] HDMI-A
[07:31:55] [PASSED] HDMI-B
[07:31:55] [PASSED] TV
[07:31:55] [PASSED] eDP
[07:31:55] [PASSED] Virtual
[07:31:55] [PASSED] DSI
[07:31:55] [PASSED] DPI
[07:31:55] [PASSED] Writeback
[07:31:55] [PASSED] SPI
[07:31:55] [PASSED] USB
[07:31:55] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[07:31:55] =========== [PASSED] drm_connector_dynamic_init ============
[07:31:55] ==== drm_connector_dynamic_register_early (4 subtests) =====
[07:31:55] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[07:31:55] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[07:31:55] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[07:31:55] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[07:31:55] ====== [PASSED] drm_connector_dynamic_register_early =======
[07:31:55] ======= drm_connector_dynamic_register (7 subtests) ========
[07:31:55] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[07:31:55] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[07:31:55] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[07:31:55] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[07:31:55] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[07:31:55] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[07:31:55] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[07:31:55] ========= [PASSED] drm_connector_dynamic_register ==========
[07:31:55] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[07:31:55] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[07:31:55] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[07:31:55] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[07:31:55] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[07:31:55] ========== drm_test_get_tv_mode_from_name_valid ===========
[07:31:55] [PASSED] NTSC
[07:31:55] [PASSED] NTSC-443
[07:31:55] [PASSED] NTSC-J
[07:31:55] [PASSED] PAL
[07:31:55] [PASSED] PAL-M
[07:31:55] [PASSED] PAL-N
[07:31:55] [PASSED] SECAM
[07:31:55] [PASSED] Mono
[07:31:55] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[07:31:55] [PASSED] drm_test_get_tv_mode_from_name_truncated
[07:31:55] ============ [PASSED] drm_get_tv_mode_from_name ============
[07:31:55] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[07:31:55] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[07:31:55] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[07:31:55] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[07:31:55] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[07:31:55] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[07:31:55] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[07:31:55] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[07:31:55] [PASSED] VIC 96
[07:31:55] [PASSED] VIC 97
[07:31:55] [PASSED] VIC 101
[07:31:55] [PASSED] VIC 102
[07:31:55] [PASSED] VIC 106
[07:31:55] [PASSED] VIC 107
[07:31:55] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[07:31:55] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[07:31:55] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[07:31:55] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[07:31:55] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[07:31:55] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[07:31:55] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[07:31:55] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[07:31:55] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[07:31:55] [PASSED] Automatic
[07:31:55] [PASSED] Full
[07:31:55] [PASSED] Limited 16:235
[07:31:55] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[07:31:55] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[07:31:55] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[07:31:55] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[07:31:55] === drm_test_drm_hdmi_connector_get_output_format_name ====
[07:31:55] [PASSED] RGB
[07:31:55] [PASSED] YUV 4:2:0
[07:31:55] [PASSED] YUV 4:2:2
[07:31:55] [PASSED] YUV 4:4:4
[07:31:55] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[07:31:55] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[07:31:55] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[07:31:55] ============= drm_damage_helper (21 subtests) ==============
[07:31:55] [PASSED] drm_test_damage_iter_no_damage
[07:31:55] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[07:31:55] [PASSED] drm_test_damage_iter_no_damage_src_moved
[07:31:55] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[07:31:55] [PASSED] drm_test_damage_iter_no_damage_not_visible
[07:31:55] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[07:31:55] [PASSED] drm_test_damage_iter_no_damage_no_fb
[07:31:55] [PASSED] drm_test_damage_iter_simple_damage
[07:31:55] [PASSED] drm_test_damage_iter_single_damage
[07:31:55] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[07:31:55] [PASSED] drm_test_damage_iter_single_damage_outside_src
[07:31:55] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[07:31:55] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[07:31:55] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[07:31:55] [PASSED] drm_test_damage_iter_single_damage_src_moved
[07:31:55] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[07:31:55] [PASSED] drm_test_damage_iter_damage
[07:31:55] [PASSED] drm_test_damage_iter_damage_one_intersect
[07:31:55] [PASSED] drm_test_damage_iter_damage_one_outside
[07:31:55] [PASSED] drm_test_damage_iter_damage_src_moved
[07:31:55] [PASSED] drm_test_damage_iter_damage_not_visible
[07:31:55] ================ [PASSED] drm_damage_helper ================
[07:31:55] ============== drm_dp_mst_helper (3 subtests) ==============
[07:31:55] ============== drm_test_dp_mst_calc_pbn_mode ==============
[07:31:55] [PASSED] Clock 154000 BPP 30 DSC disabled
[07:31:55] [PASSED] Clock 234000 BPP 30 DSC disabled
[07:31:55] [PASSED] Clock 297000 BPP 24 DSC disabled
[07:31:55] [PASSED] Clock 332880 BPP 24 DSC enabled
[07:31:55] [PASSED] Clock 324540 BPP 24 DSC enabled
[07:31:55] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[07:31:55] ============== drm_test_dp_mst_calc_pbn_div ===============
[07:31:55] [PASSED] Link rate 2000000 lane count 4
[07:31:55] [PASSED] Link rate 2000000 lane count 2
[07:31:55] [PASSED] Link rate 2000000 lane count 1
[07:31:55] [PASSED] Link rate 1350000 lane count 4
[07:31:55] [PASSED] Link rate 1350000 lane count 2
[07:31:55] [PASSED] Link rate 1350000 lane count 1
[07:31:55] [PASSED] Link rate 1000000 lane count 4
[07:31:55] [PASSED] Link rate 1000000 lane count 2
[07:31:55] [PASSED] Link rate 1000000 lane count 1
[07:31:55] [PASSED] Link rate 810000 lane count 4
[07:31:55] [PASSED] Link rate 810000 lane count 2
[07:31:55] [PASSED] Link rate 810000 lane count 1
[07:31:55] [PASSED] Link rate 540000 lane count 4
[07:31:55] [PASSED] Link rate 540000 lane count 2
[07:31:55] [PASSED] Link rate 540000 lane count 1
[07:31:55] [PASSED] Link rate 270000 lane count 4
[07:31:55] [PASSED] Link rate 270000 lane count 2
[07:31:55] [PASSED] Link rate 270000 lane count 1
[07:31:55] [PASSED] Link rate 162000 lane count 4
[07:31:55] [PASSED] Link rate 162000 lane count 2
[07:31:55] [PASSED] Link rate 162000 lane count 1
[07:31:55] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[07:31:55] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[07:31:55] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[07:31:55] [PASSED] DP_POWER_UP_PHY with port number
[07:31:55] [PASSED] DP_POWER_DOWN_PHY with port number
[07:31:55] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[07:31:55] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[07:31:55] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[07:31:55] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[07:31:55] [PASSED] DP_QUERY_PAYLOAD with port number
[07:31:55] [PASSED] DP_QUERY_PAYLOAD with VCPI
[07:31:55] [PASSED] DP_REMOTE_DPCD_READ with port number
[07:31:55] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[07:31:55] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[07:31:55] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[07:31:55] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[07:31:55] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[07:31:55] [PASSED] DP_REMOTE_I2C_READ with port number
[07:31:55] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[07:31:55] [PASSED] DP_REMOTE_I2C_READ with transactions array
[07:31:55] [PASSED] DP_REMOTE_I2C_WRITE with port number
[07:31:55] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[07:31:55] [PASSED] DP_REMOTE_I2C_WRITE with data array
[07:31:55] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[07:31:55] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[07:31:55] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[07:31:55] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[07:31:55] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[07:31:55] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[07:31:55] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[07:31:55] ================ [PASSED] drm_dp_mst_helper ================
[07:31:55] ================== drm_exec (7 subtests) ===================
[07:31:55] [PASSED] sanitycheck
[07:31:55] [PASSED] test_lock
[07:31:55] [PASSED] test_lock_unlock
[07:31:55] [PASSED] test_duplicates
[07:31:55] [PASSED] test_prepare
[07:31:55] [PASSED] test_prepare_array
[07:31:55] [PASSED] test_multiple_loops
[07:31:55] ==================== [PASSED] drm_exec =====================
[07:31:55] =========== drm_format_helper_test (17 subtests) ===========
[07:31:55] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[07:31:55] [PASSED] single_pixel_source_buffer
[07:31:55] [PASSED] single_pixel_clip_rectangle
[07:31:55] [PASSED] well_known_colors
[07:31:55] [PASSED] destination_pitch
[07:31:55] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[07:31:55] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[07:31:55] [PASSED] single_pixel_source_buffer
[07:31:55] [PASSED] single_pixel_clip_rectangle
[07:31:55] [PASSED] well_known_colors
[07:31:55] [PASSED] destination_pitch
[07:31:55] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[07:31:55] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[07:31:55] [PASSED] single_pixel_source_buffer
[07:31:55] [PASSED] single_pixel_clip_rectangle
[07:31:55] [PASSED] well_known_colors
[07:31:55] [PASSED] destination_pitch
[07:31:55] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[07:31:55] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[07:31:55] [PASSED] single_pixel_source_buffer
[07:31:55] [PASSED] single_pixel_clip_rectangle
[07:31:55] [PASSED] well_known_colors
[07:31:55] [PASSED] destination_pitch
[07:31:55] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[07:31:55] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[07:31:55] [PASSED] single_pixel_source_buffer
[07:31:55] [PASSED] single_pixel_clip_rectangle
[07:31:55] [PASSED] well_known_colors
[07:31:55] [PASSED] destination_pitch
[07:31:55] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[07:31:55] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[07:31:55] [PASSED] single_pixel_source_buffer
[07:31:55] [PASSED] single_pixel_clip_rectangle
[07:31:55] [PASSED] well_known_colors
[07:31:55] [PASSED] destination_pitch
[07:31:55] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[07:31:55] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[07:31:55] [PASSED] single_pixel_source_buffer
[07:31:55] [PASSED] single_pixel_clip_rectangle
[07:31:55] [PASSED] well_known_colors
[07:31:55] [PASSED] destination_pitch
[07:31:55] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[07:31:55] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[07:31:55] [PASSED] single_pixel_source_buffer
[07:31:55] [PASSED] single_pixel_clip_rectangle
[07:31:55] [PASSED] well_known_colors
[07:31:55] [PASSED] destination_pitch
[07:31:55] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[07:31:55] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[07:31:55] [PASSED] single_pixel_source_buffer
[07:31:55] [PASSED] single_pixel_clip_rectangle
[07:31:55] [PASSED] well_known_colors
[07:31:55] [PASSED] destination_pitch
[07:31:55] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[07:31:55] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[07:31:55] [PASSED] single_pixel_source_buffer
[07:31:55] [PASSED] single_pixel_clip_rectangle
[07:31:55] [PASSED] well_known_colors
[07:31:55] [PASSED] destination_pitch
[07:31:55] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[07:31:55] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[07:31:55] [PASSED] single_pixel_source_buffer
[07:31:55] [PASSED] single_pixel_clip_rectangle
[07:31:55] [PASSED] well_known_colors
[07:31:55] [PASSED] destination_pitch
[07:31:55] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[07:31:55] ============== drm_test_fb_xrgb8888_to_mono ===============
[07:31:55] [PASSED] single_pixel_source_buffer
[07:31:55] [PASSED] single_pixel_clip_rectangle
[07:31:55] [PASSED] well_known_colors
[07:31:55] [PASSED] destination_pitch
[07:31:55] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[07:31:55] ==================== drm_test_fb_swab =====================
[07:31:55] [PASSED] single_pixel_source_buffer
[07:31:55] [PASSED] single_pixel_clip_rectangle
[07:31:55] [PASSED] well_known_colors
[07:31:55] [PASSED] destination_pitch
[07:31:55] ================ [PASSED] drm_test_fb_swab =================
[07:31:55] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[07:31:55] [PASSED] single_pixel_source_buffer
[07:31:55] [PASSED] single_pixel_clip_rectangle
[07:31:55] [PASSED] well_known_colors
[07:31:55] [PASSED] destination_pitch
[07:31:55] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[07:31:55] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[07:31:55] [PASSED] single_pixel_source_buffer
[07:31:55] [PASSED] single_pixel_clip_rectangle
[07:31:55] [PASSED] well_known_colors
[07:31:55] [PASSED] destination_pitch
[07:31:55] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[07:31:55] ================= drm_test_fb_clip_offset =================
[07:31:55] [PASSED] pass through
[07:31:55] [PASSED] horizontal offset
[07:31:55] [PASSED] vertical offset
[07:31:55] [PASSED] horizontal and vertical offset
[07:31:55] [PASSED] horizontal offset (custom pitch)
[07:31:55] [PASSED] vertical offset (custom pitch)
[07:31:55] [PASSED] horizontal and vertical offset (custom pitch)
[07:31:55] ============= [PASSED] drm_test_fb_clip_offset =============
[07:31:55] =================== drm_test_fb_memcpy ====================
[07:31:55] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[07:31:55] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[07:31:55] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[07:31:55] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[07:31:55] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[07:31:55] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[07:31:55] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[07:31:55] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[07:31:55] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[07:31:55] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[07:31:55] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[07:31:55] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[07:31:55] =============== [PASSED] drm_test_fb_memcpy ================
[07:31:55] ============= [PASSED] drm_format_helper_test ==============
[07:31:55] ================= drm_format (18 subtests) =================
[07:31:55] [PASSED] drm_test_format_block_width_invalid
[07:31:55] [PASSED] drm_test_format_block_width_one_plane
[07:31:55] [PASSED] drm_test_format_block_width_two_plane
[07:31:55] [PASSED] drm_test_format_block_width_three_plane
[07:31:55] [PASSED] drm_test_format_block_width_tiled
[07:31:55] [PASSED] drm_test_format_block_height_invalid
[07:31:55] [PASSED] drm_test_format_block_height_one_plane
[07:31:55] [PASSED] drm_test_format_block_height_two_plane
[07:31:55] [PASSED] drm_test_format_block_height_three_plane
[07:31:55] [PASSED] drm_test_format_block_height_tiled
[07:31:55] [PASSED] drm_test_format_min_pitch_invalid
[07:31:55] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[07:31:55] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[07:31:55] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[07:31:55] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[07:31:55] [PASSED] drm_test_format_min_pitch_two_plane
[07:31:55] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[07:31:55] [PASSED] drm_test_format_min_pitch_tiled
[07:31:55] =================== [PASSED] drm_format ====================
[07:31:55] ============== drm_framebuffer (10 subtests) ===============
[07:31:55] ========== drm_test_framebuffer_check_src_coords ==========
[07:31:55] [PASSED] Success: source fits into fb
[07:31:55] [PASSED] Fail: overflowing fb with x-axis coordinate
[07:31:55] [PASSED] Fail: overflowing fb with y-axis coordinate
[07:31:55] [PASSED] Fail: overflowing fb with source width
[07:31:55] [PASSED] Fail: overflowing fb with source height
[07:31:55] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[07:31:55] [PASSED] drm_test_framebuffer_cleanup
[07:31:55] =============== drm_test_framebuffer_create ===============
[07:31:55] [PASSED] ABGR8888 normal sizes
[07:31:55] [PASSED] ABGR8888 max sizes
[07:31:55] [PASSED] ABGR8888 pitch greater than min required
[07:31:55] [PASSED] ABGR8888 pitch less than min required
[07:31:55] [PASSED] ABGR8888 Invalid width
[07:31:55] [PASSED] ABGR8888 Invalid buffer handle
[07:31:55] [PASSED] No pixel format
[07:31:55] [PASSED] ABGR8888 Width 0
[07:31:55] [PASSED] ABGR8888 Height 0
[07:31:55] [PASSED] ABGR8888 Out of bound height * pitch combination
[07:31:55] [PASSED] ABGR8888 Large buffer offset
[07:31:55] [PASSED] ABGR8888 Buffer offset for inexistent plane
[07:31:55] [PASSED] ABGR8888 Invalid flag
[07:31:55] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[07:31:55] [PASSED] ABGR8888 Valid buffer modifier
[07:31:55] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[07:31:55] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[07:31:55] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[07:31:55] [PASSED] NV12 Normal sizes
[07:31:55] [PASSED] NV12 Max sizes
[07:31:55] [PASSED] NV12 Invalid pitch
[07:31:55] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[07:31:55] [PASSED] NV12 different modifier per-plane
[07:31:55] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[07:31:55] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[07:31:55] [PASSED] NV12 Modifier for inexistent plane
[07:31:55] [PASSED] NV12 Handle for inexistent plane
[07:31:55] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[07:31:55] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[07:31:55] [PASSED] YVU420 Normal sizes
[07:31:55] [PASSED] YVU420 Max sizes
[07:31:55] [PASSED] YVU420 Invalid pitch
[07:31:55] [PASSED] YVU420 Different pitches
[07:31:55] [PASSED] YVU420 Different buffer offsets/pitches
[07:31:55] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[07:31:55] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[07:31:55] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[07:31:55] [PASSED] YVU420 Valid modifier
[07:31:55] [PASSED] YVU420 Different modifiers per plane
[07:31:55] [PASSED] YVU420 Modifier for inexistent plane
[07:31:55] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[07:31:55] [PASSED] X0L2 Normal sizes
[07:31:55] [PASSED] X0L2 Max sizes
[07:31:55] [PASSED] X0L2 Invalid pitch
[07:31:55] [PASSED] X0L2 Pitch greater than minimum required
[07:31:55] [PASSED] X0L2 Handle for inexistent plane
[07:31:55] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[07:31:55] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[07:31:55] [PASSED] X0L2 Valid modifier
[07:31:55] [PASSED] X0L2 Modifier for inexistent plane
[07:31:55] =========== [PASSED] drm_test_framebuffer_create ===========
[07:31:55] [PASSED] drm_test_framebuffer_free
[07:31:55] [PASSED] drm_test_framebuffer_init
[07:31:55] [PASSED] drm_test_framebuffer_init_bad_format
[07:31:55] [PASSED] drm_test_framebuffer_init_dev_mismatch
[07:31:55] [PASSED] drm_test_framebuffer_lookup
[07:31:55] [PASSED] drm_test_framebuffer_lookup_inexistent
[07:31:55] [PASSED] drm_test_framebuffer_modifiers_not_supported
[07:31:55] ================= [PASSED] drm_framebuffer =================
[07:31:55] ================ drm_gem_shmem (8 subtests) ================
[07:31:55] [PASSED] drm_gem_shmem_test_obj_create
[07:31:55] [PASSED] drm_gem_shmem_test_obj_create_private
[07:31:55] [PASSED] drm_gem_shmem_test_pin_pages
[07:31:55] [PASSED] drm_gem_shmem_test_vmap
[07:31:55] [PASSED] drm_gem_shmem_test_get_sg_table
[07:31:55] [PASSED] drm_gem_shmem_test_get_pages_sgt
[07:31:55] [PASSED] drm_gem_shmem_test_madvise
[07:31:55] [PASSED] drm_gem_shmem_test_purge
[07:31:55] ================== [PASSED] drm_gem_shmem ==================
[07:31:55] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[07:31:55] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[07:31:55] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[07:31:55] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[07:31:55] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[07:31:55] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[07:31:55] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[07:31:55] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[07:31:55] [PASSED] Automatic
[07:31:55] [PASSED] Full
[07:31:55] [PASSED] Limited 16:235
[07:31:55] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[07:31:55] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[07:31:55] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[07:31:55] [PASSED] drm_test_check_disable_connector
[07:31:55] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[07:31:55] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[07:31:55] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[07:31:55] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[07:31:55] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[07:31:55] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[07:31:55] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[07:31:55] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[07:31:55] [PASSED] drm_test_check_output_bpc_dvi
[07:31:55] [PASSED] drm_test_check_output_bpc_format_vic_1
[07:31:55] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[07:31:55] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[07:31:55] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[07:31:55] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[07:31:55] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[07:31:55] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[07:31:55] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[07:31:55] ============ drm_test_check_hdmi_color_format =============
[07:31:55] [PASSED] AUTO -> RGB
[07:31:55] [PASSED] YCBCR422 -> YUV422
[07:31:55] [PASSED] YCBCR420 -> YUV420
[07:31:55] [PASSED] YCBCR444 -> YUV444
[07:31:55] [PASSED] RGB -> RGB
[07:31:55] ======== [PASSED] drm_test_check_hdmi_color_format =========
[07:31:55] ======== drm_test_check_hdmi_color_format_420_only ========
[07:31:55] [PASSED] RGB should fail
[07:31:55] [PASSED] YUV444 should fail
[07:31:55] [PASSED] YUV422 should fail
[07:31:55] [PASSED] YUV420 should work
[07:31:55] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[07:31:55] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[07:31:55] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[07:31:55] [PASSED] drm_test_check_broadcast_rgb_value
[07:31:55] [PASSED] drm_test_check_bpc_8_value
[07:31:55] [PASSED] drm_test_check_bpc_10_value
[07:31:55] [PASSED] drm_test_check_bpc_12_value
[07:31:55] [PASSED] drm_test_check_format_value
[07:31:55] [PASSED] drm_test_check_tmds_char_value
[07:31:55] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[07:31:55] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[07:31:55] [PASSED] drm_test_check_mode_valid
[07:31:55] [PASSED] drm_test_check_mode_valid_reject
[07:31:55] [PASSED] drm_test_check_mode_valid_reject_rate
[07:31:55] [PASSED] drm_test_check_mode_valid_reject_max_clock
[07:31:55] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[07:31:55] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[07:31:55] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[07:31:55] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[07:31:55] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[07:31:55] [PASSED] drm_test_check_infoframes
[07:31:55] [PASSED] drm_test_check_reject_avi_infoframe
[07:31:55] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[07:31:55] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[07:31:55] [PASSED] drm_test_check_reject_audio_infoframe
[07:31:55] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[07:31:55] ================= drm_managed (2 subtests) =================
[07:31:55] [PASSED] drm_test_managed_release_action
[07:31:55] [PASSED] drm_test_managed_run_action
[07:31:55] =================== [PASSED] drm_managed ===================
[07:31:55] =================== drm_mm (6 subtests) ====================
[07:31:55] [PASSED] drm_test_mm_init
[07:31:55] [PASSED] drm_test_mm_debug
[07:31:55] [PASSED] drm_test_mm_align32
[07:31:55] [PASSED] drm_test_mm_align64
[07:31:55] [PASSED] drm_test_mm_lowest
[07:31:55] [PASSED] drm_test_mm_highest
[07:31:55] ===================== [PASSED] drm_mm ======================
[07:31:55] ============= drm_modes_analog_tv (5 subtests) =============
[07:31:55] [PASSED] drm_test_modes_analog_tv_mono_576i
[07:31:55] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[07:31:55] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[07:31:55] [PASSED] drm_test_modes_analog_tv_pal_576i
[07:31:55] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[07:31:55] =============== [PASSED] drm_modes_analog_tv ===============
[07:31:55] ============== drm_panic_helper (3 subtests) ===============
[07:31:55] ============= drm_test_panic_screen_user_map ==============
[07:31:55] [PASSED] Panic screen user, mode: 1024 x 768 XR24 little-endian (0x34325258)
[07:31:55] [PASSED] Panic screen user, mode: 494 x 494 XR24 little-endian (0x34325258)
[07:31:55] [PASSED] Panic screen user, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[07:31:55] [PASSED] Panic screen user, mode: 1024 x 768 RG16 little-endian (0x36314752)
[07:31:55] [PASSED] Panic screen user, mode: 1024 x 768 RG24 little-endian (0x34324752)
[07:31:55] [PASSED] Panic screen kmsg, mode: 1024 x 768 XR24 little-endian (0x34325258)
[07:31:55] [PASSED] Panic screen kmsg, mode: 494 x 494 XR24 little-endian (0x34325258)
[07:31:55] [PASSED] Panic screen kmsg, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[07:31:55] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG16 little-endian (0x36314752)
[07:31:55] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG24 little-endian (0x34324752)
[07:31:55] ========= [PASSED] drm_test_panic_screen_user_map ==========
[07:31:55] ============= drm_test_panic_screen_user_page =============
[07:31:55] [PASSED] Panic screen user, mode: 1024 x 768 XR24 little-endian (0x34325258)
[07:31:55] [PASSED] Panic screen user, mode: 494 x 494 XR24 little-endian (0x34325258)
[07:31:55] [PASSED] Panic screen user, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[07:31:55] [PASSED] Panic screen user, mode: 1024 x 768 RG16 little-endian (0x36314752)
[07:31:55] [PASSED] Panic screen user, mode: 1024 x 768 RG24 little-endian (0x34324752)
[07:31:55] [PASSED] Panic screen kmsg, mode: 1024 x 768 XR24 little-endian (0x34325258)
[07:31:55] [PASSED] Panic screen kmsg, mode: 494 x 494 XR24 little-endian (0x34325258)
[07:31:55] [PASSED] Panic screen kmsg, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[07:31:55] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG16 little-endian (0x36314752)
[07:31:55] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG24 little-endian (0x34324752)
[07:31:55] ========= [PASSED] drm_test_panic_screen_user_page =========
[07:31:55] ========== drm_test_panic_screen_user_set_pixel ===========
[07:31:55] [PASSED] Panic screen user, mode: 1024 x 768 XR24 little-endian (0x34325258)
[07:31:55] [PASSED] Panic screen user, mode: 494 x 494 XR24 little-endian (0x34325258)
[07:31:55] [PASSED] Panic screen user, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[07:31:55] [PASSED] Panic screen user, mode: 1024 x 768 RG16 little-endian (0x36314752)
[07:31:55] [PASSED] Panic screen user, mode: 1024 x 768 RG24 little-endian (0x34324752)
[07:31:55] [PASSED] Panic screen kmsg, mode: 1024 x 768 XR24 little-endian (0x34325258)
[07:31:55] [PASSED] Panic screen kmsg, mode: 494 x 494 XR24 little-endian (0x34325258)
[07:31:55] [PASSED] Panic screen kmsg, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[07:31:55] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG16 little-endian (0x36314752)
[07:31:55] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG24 little-endian (0x34324752)
[07:31:55] ====== [PASSED] drm_test_panic_screen_user_set_pixel =======
[07:31:55] ================ [PASSED] drm_panic_helper =================
[07:31:55] ============== drm_plane_helper (2 subtests) ===============
[07:31:55] =============== drm_test_check_plane_state ================
[07:31:55] [PASSED] clipping_simple
[07:31:55] [PASSED] clipping_rotate_reflect
[07:31:55] [PASSED] positioning_simple
[07:31:55] [PASSED] upscaling
[07:31:55] [PASSED] downscaling
[07:31:55] [PASSED] rounding1
[07:31:55] [PASSED] rounding2
[07:31:55] [PASSED] rounding3
[07:31:55] [PASSED] rounding4
[07:31:55] =========== [PASSED] drm_test_check_plane_state ============
[07:31:55] =========== drm_test_check_invalid_plane_state ============
[07:31:55] [PASSED] positioning_invalid
[07:31:55] [PASSED] upscaling_invalid
[07:31:55] [PASSED] downscaling_invalid
[07:31:55] ======= [PASSED] drm_test_check_invalid_plane_state ========
[07:31:55] ================ [PASSED] drm_plane_helper =================
[07:31:55] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[07:31:55] ====== drm_test_connector_helper_tv_get_modes_check =======
[07:31:55] [PASSED] None
[07:31:55] [PASSED] PAL
[07:31:55] [PASSED] NTSC
[07:31:55] [PASSED] Both, NTSC Default
[07:31:55] [PASSED] Both, PAL Default
[07:31:55] [PASSED] Both, NTSC Default, with PAL on command-line
[07:31:55] [PASSED] Both, PAL Default, with NTSC on command-line
[07:31:55] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[07:31:55] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[07:31:55] ================== drm_rect (9 subtests) ===================
[07:31:55] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[07:31:55] [PASSED] drm_test_rect_clip_scaled_not_clipped
[07:31:55] [PASSED] drm_test_rect_clip_scaled_clipped
[07:31:55] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[07:31:55] ================= drm_test_rect_intersect =================
[07:31:55] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[07:31:55] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[07:31:55] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[07:31:55] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[07:31:55] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[07:31:55] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[07:31:55] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[07:31:55] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[07:31:55] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[07:31:55] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[07:31:55] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[07:31:55] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[07:31:55] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[07:31:55] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[07:31:55] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[07:31:55] ============= [PASSED] drm_test_rect_intersect =============
[07:31:55] ================ drm_test_rect_calc_hscale ================
[07:31:55] [PASSED] normal use
[07:31:55] [PASSED] out of max range
[07:31:55] [PASSED] out of min range
[07:31:55] [PASSED] zero dst
[07:31:55] [PASSED] negative src
[07:31:55] [PASSED] negative dst
[07:31:55] ============ [PASSED] drm_test_rect_calc_hscale ============
[07:31:55] ================ drm_test_rect_calc_vscale ================
[07:31:55] [PASSED] normal use
[07:31:55] [PASSED] out of max range
[07:31:55] [PASSED] out of min range
[07:31:55] [PASSED] zero dst
[07:31:55] [PASSED] negative src
[07:31:55] [PASSED] negative dst
[07:31:55] ============ [PASSED] drm_test_rect_calc_vscale ============
[07:31:55] ================== drm_test_rect_rotate ===================
[07:31:55] [PASSED] reflect-x
[07:31:55] [PASSED] reflect-y
[07:31:55] [PASSED] rotate-0
[07:31:55] [PASSED] rotate-90
[07:31:55] [PASSED] rotate-180
[07:31:55] [PASSED] rotate-270
[07:31:55] ============== [PASSED] drm_test_rect_rotate ===============
[07:31:55] ================ drm_test_rect_rotate_inv =================
[07:31:55] [PASSED] reflect-x
[07:31:55] [PASSED] reflect-y
[07:31:55] [PASSED] rotate-0
[07:31:55] [PASSED] rotate-90
[07:31:55] [PASSED] rotate-180
[07:31:55] [PASSED] rotate-270
[07:31:55] ============ [PASSED] drm_test_rect_rotate_inv =============
[07:31:55] ==================== [PASSED] drm_rect =====================
[07:31:55] ============ drm_sysfb_modeset_test (1 subtest) ============
[07:31:55] ============ drm_test_sysfb_build_fourcc_list =============
[07:31:55] [PASSED] no native formats
[07:31:55] [PASSED] XRGB8888 as native format
[07:31:55] [PASSED] remove duplicates
[07:31:55] [PASSED] convert alpha formats
[07:31:55] [PASSED] random formats
[07:31:55] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[07:31:55] ============= [PASSED] drm_sysfb_modeset_test ==============
[07:31:55] ================== drm_fixp (2 subtests) ===================
[07:31:55] [PASSED] drm_test_int2fixp
[07:31:55] [PASSED] drm_test_sm2fixp
[07:31:55] ==================== [PASSED] drm_fixp =====================
[07:31:55] ============================================================
[07:31:55] Testing complete. Ran 667 tests: passed: 667
[07:31:55] Elapsed time: 28.065s total, 2.516s configuring, 25.133s building, 0.407s running
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[07:31:55] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[07:31:58] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[07:32:08] Starting KUnit Kernel (1/1)...
[07:32:08] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[07:32:08] ================= ttm_device (5 subtests) ==================
[07:32:08] [PASSED] ttm_device_init_basic
[07:32:08] [PASSED] ttm_device_init_multiple
[07:32:08] [PASSED] ttm_device_fini_basic
[07:32:08] [PASSED] ttm_device_init_no_vma_man
[07:32:08] ================== ttm_device_init_pools ==================
[07:32:08] [PASSED] No DMA allocations, no DMA32 required
[07:32:08] [PASSED] DMA allocations, DMA32 required
[07:32:08] [PASSED] No DMA allocations, DMA32 required
[07:32:08] [PASSED] DMA allocations, no DMA32 required
[07:32:08] ============== [PASSED] ttm_device_init_pools ==============
[07:32:08] =================== [PASSED] ttm_device ====================
[07:32:08] ================== ttm_pool (8 subtests) ===================
[07:32:08] ================== ttm_pool_alloc_basic ===================
[07:32:08] [PASSED] One page
[07:32:08] [PASSED] More than one page
[07:32:08] [PASSED] Above the allocation limit
[07:32:08] [PASSED] One page, with coherent DMA mappings enabled
[07:32:08] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[07:32:08] ============== [PASSED] ttm_pool_alloc_basic ===============
[07:32:08] ============== ttm_pool_alloc_basic_dma_addr ==============
[07:32:08] [PASSED] One page
[07:32:08] [PASSED] More than one page
[07:32:08] [PASSED] Above the allocation limit
[07:32:08] [PASSED] One page, with coherent DMA mappings enabled
[07:32:08] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[07:32:08] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[07:32:08] [PASSED] ttm_pool_alloc_order_caching_match
[07:32:08] [PASSED] ttm_pool_alloc_caching_mismatch
[07:32:08] [PASSED] ttm_pool_alloc_order_mismatch
[07:32:08] [PASSED] ttm_pool_free_dma_alloc
[07:32:08] [PASSED] ttm_pool_free_no_dma_alloc
[07:32:08] [PASSED] ttm_pool_fini_basic
[07:32:08] ==================== [PASSED] ttm_pool =====================
[07:32:08] ================ ttm_resource (8 subtests) =================
[07:32:08] ================= ttm_resource_init_basic =================
[07:32:08] [PASSED] Init resource in TTM_PL_SYSTEM
[07:32:08] [PASSED] Init resource in TTM_PL_VRAM
[07:32:08] [PASSED] Init resource in a private placement
[07:32:08] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[07:32:08] ============= [PASSED] ttm_resource_init_basic =============
[07:32:08] [PASSED] ttm_resource_init_pinned
[07:32:08] [PASSED] ttm_resource_fini_basic
[07:32:08] [PASSED] ttm_resource_manager_init_basic
[07:32:08] [PASSED] ttm_resource_manager_usage_basic
[07:32:08] [PASSED] ttm_resource_manager_set_used_basic
[07:32:08] [PASSED] ttm_sys_man_alloc_basic
[07:32:08] [PASSED] ttm_sys_man_free_basic
[07:32:08] ================== [PASSED] ttm_resource ===================
[07:32:08] =================== ttm_tt (15 subtests) ===================
[07:32:08] ==================== ttm_tt_init_basic ====================
[07:32:08] [PASSED] Page-aligned size
[07:32:08] [PASSED] Extra pages requested
[07:32:08] ================ [PASSED] ttm_tt_init_basic ================
[07:32:08] [PASSED] ttm_tt_init_misaligned
[07:32:08] [PASSED] ttm_tt_fini_basic
[07:32:08] [PASSED] ttm_tt_fini_sg
[07:32:08] [PASSED] ttm_tt_fini_shmem
[07:32:08] [PASSED] ttm_tt_create_basic
[07:32:08] [PASSED] ttm_tt_create_invalid_bo_type
[07:32:08] [PASSED] ttm_tt_create_ttm_exists
[07:32:08] [PASSED] ttm_tt_create_failed
[07:32:08] [PASSED] ttm_tt_destroy_basic
[07:32:08] [PASSED] ttm_tt_populate_null_ttm
[07:32:08] [PASSED] ttm_tt_populate_populated_ttm
[07:32:08] [PASSED] ttm_tt_unpopulate_basic
[07:32:08] [PASSED] ttm_tt_unpopulate_empty_ttm
[07:32:08] [PASSED] ttm_tt_swapin_basic
[07:32:08] ===================== [PASSED] ttm_tt ======================
[07:32:08] =================== ttm_bo (14 subtests) ===================
[07:32:08] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[07:32:08] [PASSED] Cannot be interrupted and sleeps
[07:32:08] [PASSED] Cannot be interrupted, locks straight away
[07:32:08] [PASSED] Can be interrupted, sleeps
[07:32:08] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[07:32:08] [PASSED] ttm_bo_reserve_locked_no_sleep
[07:32:08] [PASSED] ttm_bo_reserve_no_wait_ticket
[07:32:08] [PASSED] ttm_bo_reserve_double_resv
[07:32:08] [PASSED] ttm_bo_reserve_interrupted
[07:32:08] [PASSED] ttm_bo_reserve_deadlock
[07:32:08] [PASSED] ttm_bo_unreserve_basic
[07:32:08] [PASSED] ttm_bo_unreserve_pinned
[07:32:08] [PASSED] ttm_bo_unreserve_bulk
[07:32:08] [PASSED] ttm_bo_fini_basic
[07:32:08] [PASSED] ttm_bo_fini_shared_resv
[07:32:08] [PASSED] ttm_bo_pin_basic
[07:32:08] [PASSED] ttm_bo_pin_unpin_resource
[07:32:08] [PASSED] ttm_bo_multiple_pin_one_unpin
[07:32:08] ===================== [PASSED] ttm_bo ======================
[07:32:08] ============== ttm_bo_validate (22 subtests) ===============
[07:32:08] ============== ttm_bo_init_reserved_sys_man ===============
[07:32:08] [PASSED] Buffer object for userspace
[07:32:08] [PASSED] Kernel buffer object
[07:32:08] [PASSED] Shared buffer object
[07:32:08] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[07:32:08] ============== ttm_bo_init_reserved_mock_man ==============
[07:32:08] [PASSED] Buffer object for userspace
[07:32:08] [PASSED] Kernel buffer object
[07:32:08] [PASSED] Shared buffer object
[07:32:08] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[07:32:08] [PASSED] ttm_bo_init_reserved_resv
[07:32:08] ================== ttm_bo_validate_basic ==================
[07:32:08] [PASSED] Buffer object for userspace
[07:32:08] [PASSED] Kernel buffer object
[07:32:08] [PASSED] Shared buffer object
[07:32:08] ============== [PASSED] ttm_bo_validate_basic ==============
[07:32:08] [PASSED] ttm_bo_validate_invalid_placement
[07:32:08] ============= ttm_bo_validate_same_placement ==============
[07:32:08] [PASSED] System manager
[07:32:08] [PASSED] VRAM manager
[07:32:08] ========= [PASSED] ttm_bo_validate_same_placement ==========
[07:32:08] [PASSED] ttm_bo_validate_failed_alloc
[07:32:08] [PASSED] ttm_bo_validate_pinned
[07:32:08] [PASSED] ttm_bo_validate_busy_placement
[07:32:08] ================ ttm_bo_validate_multihop =================
[07:32:08] [PASSED] Buffer object for userspace
[07:32:08] [PASSED] Kernel buffer object
[07:32:08] [PASSED] Shared buffer object
[07:32:08] ============ [PASSED] ttm_bo_validate_multihop =============
[07:32:08] ========== ttm_bo_validate_no_placement_signaled ==========
[07:32:08] [PASSED] Buffer object in system domain, no page vector
[07:32:08] [PASSED] Buffer object in system domain with an existing page vector
[07:32:08] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[07:32:08] ======== ttm_bo_validate_no_placement_not_signaled ========
[07:32:08] [PASSED] Buffer object for userspace
[07:32:08] [PASSED] Kernel buffer object
[07:32:08] [PASSED] Shared buffer object
[07:32:08] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[07:32:08] [PASSED] ttm_bo_validate_move_fence_signaled
[07:32:08] ========= ttm_bo_validate_move_fence_not_signaled =========
[07:32:08] [PASSED] Waits for GPU
[07:32:08] [PASSED] Tries to lock straight away
[07:32:08] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[07:32:08] [PASSED] ttm_bo_validate_swapout
[07:32:08] [PASSED] ttm_bo_validate_happy_evict
[07:32:08] [PASSED] ttm_bo_validate_all_pinned_evict
[07:32:08] [PASSED] ttm_bo_validate_allowed_only_evict
[07:32:08] [PASSED] ttm_bo_validate_deleted_evict
[07:32:08] [PASSED] ttm_bo_validate_busy_domain_evict
[07:32:08] [PASSED] ttm_bo_validate_evict_gutting
[07:32:08] [PASSED] ttm_bo_validate_recrusive_evict
[07:32:08] ================= [PASSED] ttm_bo_validate =================
[07:32:08] ============================================================
[07:32:08] Testing complete. Ran 102 tests: passed: 102
[07:32:08] Elapsed time: 12.685s total, 2.483s configuring, 9.937s building, 0.229s running
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/dma-buf/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/dma-buf/.kunitconfig
[07:32:08] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[07:32:11] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[07:32:20] Starting KUnit Kernel (1/1)...
[07:32:20] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[07:32:20] =============== dma-buf-fence (12 subtests) ================
[07:32:20] [PASSED] test_sanitycheck
[07:32:20] [PASSED] test_signaling
[07:32:20] [PASSED] test_add_callback
[07:32:20] [PASSED] test_late_add_callback
[07:32:20] [PASSED] test_rm_callback
[07:32:20] [PASSED] test_late_rm_callback
[07:32:20] [PASSED] test_status
[07:32:20] [PASSED] test_error
[07:32:20] [PASSED] test_wait
[07:32:20] [PASSED] test_wait_timeout
[07:32:20] [PASSED] test_stub
[07:32:20] [SKIPPED] test_race_signal_callback (requires at least 2 CPUs)
[07:32:20] ================== [PASSED] dma-buf-fence ==================
[07:32:20] ============ dma-buf-fence-chain (11 subtests) =============
[07:32:20] [PASSED] test_sanitycheck
[07:32:20] [PASSED] test_find_seqno
[07:32:20] [PASSED] test_find_signaled
[07:32:20] [PASSED] test_find_out_of_order
[07:32:25] [PASSED] test_find_gap
[07:32:25] [PASSED] test_find_race
[07:32:25] [PASSED] test_signal_forward
[07:32:25] [PASSED] test_signal_backward
[07:32:25] [PASSED] test_wait_forward
[07:32:25] [PASSED] test_wait_backward
[07:32:25] [PASSED] test_wait_random
[07:32:25] =============== [PASSED] dma-buf-fence-chain ===============
[07:32:25] ============ dma-buf-fence-unwrap (11 subtests) ============
[07:32:25] [PASSED] test_sanitycheck
[07:32:25] [PASSED] test_unwrap_array
[07:32:25] [PASSED] test_unwrap_chain
[07:32:25] [PASSED] test_unwrap_chain_array
[07:32:25] [PASSED] test_unwrap_merge
[07:32:25] [PASSED] test_unwrap_merge_duplicate
[07:32:25] [PASSED] test_unwrap_merge_seqno
[07:32:25] [PASSED] test_unwrap_merge_order
[07:32:25] [PASSED] test_unwrap_merge_complex
[07:32:25] [PASSED] test_unwrap_merge_complex_seqno
[07:32:25] [PASSED] test_dedup_empty
[07:32:25] ============== [PASSED] dma-buf-fence-unwrap ===============
[07:32:25] ================ dma-buf-resv (5 subtests) =================
[07:32:25] [PASSED] test_sanitycheck
[07:32:25] ===================== test_signaling ======================
[07:32:25] [PASSED] kernel
[07:32:25] [PASSED] write
[07:32:25] [PASSED] read
[07:32:25] [PASSED] bookkeep
[07:32:25] ================= [PASSED] test_signaling ==================
[07:32:25] ====================== test_for_each ======================
[07:32:25] [PASSED] kernel
[07:32:25] [PASSED] write
[07:32:25] [PASSED] read
[07:32:25] [PASSED] bookkeep
[07:32:25] ================== [PASSED] test_for_each ==================
[07:32:25] ================= test_for_each_unlocked ==================
[07:32:25] [PASSED] kernel
[07:32:25] [PASSED] write
[07:32:25] [PASSED] read
[07:32:25] [PASSED] bookkeep
[07:32:25] ============= [PASSED] test_for_each_unlocked ==============
[07:32:25] ===================== test_get_fences =====================
[07:32:25] [PASSED] kernel
[07:32:25] [PASSED] write
[07:32:25] [PASSED] read
[07:32:25] [PASSED] bookkeep
[07:32:25] ================= [PASSED] test_get_fences =================
[07:32:25] ================== [PASSED] dma-buf-resv ===================
[07:32:25] ============================================================
[07:32:25] Testing complete. Ran 51 tests: passed: 50, skipped: 1
[07:32:25] Elapsed time: 16.644s total, 2.498s configuring, 8.824s building, 5.287s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 23+ messages in thread
* ✓ Xe.CI.BAT: success for Handle non-fatal errors routed via IRQ (rev3)
2026-11-03 6:09 [PATCH v3 0/7] Handle non-fatal errors routed via IRQ Riana Tauro
` (7 preceding siblings ...)
2026-11-03 7:32 ` ✓ CI.KUnit: success for Handle non-fatal errors routed via IRQ (rev3) Patchwork
@ 2026-11-03 8:05 ` Patchwork
2026-11-03 13:34 ` ✓ Xe.CI.FULL: " Patchwork
9 siblings, 0 replies; 23+ messages in thread
From: Patchwork @ 2026-11-03 8:05 UTC (permalink / raw)
To: Tauro, Riana; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 4838 bytes --]
== Series Details ==
Series: Handle non-fatal errors routed via IRQ (rev3)
URL : https://patchwork.freedesktop.org/series/173001/
State : success
== Summary ==
CI Bug Log - changes from xe-6049-0f5e7199aaceed05aa49dad4c97df2677e32f779_BAT -> xe-pw-173001v3_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (14 -> 15)
------------------------------
Additional (1): bat-bmg-2
Known issues
------------
Here are the changes found in xe-pw-173001v3_BAT that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@fbdev@write:
- bat-bmg-2: NOTRUN -> [SKIP][1] ([Intel XE#2134]) +4 other tests skip
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/bat-bmg-2/igt@fbdev@write.html
* igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- bat-bmg-2: NOTRUN -> [SKIP][2] ([Intel XE#2233])
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/bat-bmg-2/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
* igt@kms_cursor_legacy@basic-flip-after-cursor-legacy:
- bat-bmg-2: NOTRUN -> [SKIP][3] ([Intel XE#2489] / [Intel XE#3419]) +13 other tests skip
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/bat-bmg-2/igt@kms_cursor_legacy@basic-flip-after-cursor-legacy.html
* igt@kms_flip@basic-flip-vs-modeset:
- bat-bmg-2: NOTRUN -> [SKIP][4] ([Intel XE#2482]) +3 other tests skip
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/bat-bmg-2/igt@kms_flip@basic-flip-vs-modeset.html
* igt@kms_frontbuffer_tracking@basic:
- bat-bmg-2: NOTRUN -> [SKIP][5] ([Intel XE#2434] / [Intel XE#2548] / [Intel XE#6314])
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/bat-bmg-2/igt@kms_frontbuffer_tracking@basic.html
* igt@kms_psr@psr-sprite-plane-onoff:
- bat-bmg-2: NOTRUN -> [SKIP][6] ([Intel XE#2234] / [Intel XE#2850]) +2 other tests skip
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/bat-bmg-2/igt@kms_psr@psr-sprite-plane-onoff.html
* igt@xe_exec_multi_queue@priority:
- bat-bmg-2: NOTRUN -> [SKIP][7] ([Intel XE#8364]) +13 other tests skip
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/bat-bmg-2/igt@xe_exec_multi_queue@priority.html
* igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit:
- bat-bmg-2: NOTRUN -> [SKIP][8] ([Intel XE#2229])
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/bat-bmg-2/igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit.html
* igt@xe_pat@pat-index-xehpc:
- bat-bmg-2: NOTRUN -> [SKIP][9] ([Intel XE#1420] / [Intel XE#7590])
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/bat-bmg-2/igt@xe_pat@pat-index-xehpc.html
* igt@xe_pat@pat-index-xelp:
- bat-bmg-2: NOTRUN -> [SKIP][10] ([Intel XE#2245] / [Intel XE#7590])
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/bat-bmg-2/igt@xe_pat@pat-index-xelp.html
* igt@xe_pat@pat-index-xelpg:
- bat-bmg-2: NOTRUN -> [SKIP][11] ([Intel XE#2236] / [Intel XE#7590])
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/bat-bmg-2/igt@xe_pat@pat-index-xelpg.html
[Intel XE#1420]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1420
[Intel XE#2134]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2134
[Intel XE#2229]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2229
[Intel XE#2233]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2233
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2236]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2236
[Intel XE#2245]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2245
[Intel XE#2434]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2434
[Intel XE#2482]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2482
[Intel XE#2489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2489
[Intel XE#2548]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2548
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#3419]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3419
[Intel XE#6314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6314
[Intel XE#7590]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7590
[Intel XE#8364]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8364
Build changes
-------------
* Linux: xe-6049-0f5e7199aaceed05aa49dad4c97df2677e32f779 -> xe-pw-173001v3
IGT_9175: 9175
xe-6049-0f5e7199aaceed05aa49dad4c97df2677e32f779: 0f5e7199aaceed05aa49dad4c97df2677e32f779
xe-pw-173001v3: 173001v3
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/index.html
[-- Attachment #2: Type: text/html, Size: 5750 bytes --]
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH v3 5/7] drm/xe/xe_ras: Add a flag for uncorrectable internal error
2026-11-03 6:09 ` [PATCH v3 5/7] drm/xe/xe_ras: Add a flag for uncorrectable internal error Riana Tauro
@ 2026-11-03 8:19 ` Mallesh, Koujalagi
0 siblings, 0 replies; 23+ messages in thread
From: Mallesh, Koujalagi @ 2026-11-03 8:19 UTC (permalink / raw)
To: Riana Tauro, intel-xe
Cc: anshuman.gupta, rodrigo.vivi, aravind.iddamsetty, raag.jadav,
ravi.kishore.koppuravuri, tejas.upadhyay
On 03-11-2026 11:39 am, Riana Tauro wrote:
> Introduce a flag with get/set accessors to record when an
> uncorrectable internal error was reported via AER.
>
> Signed-off-by: Riana Tauro <riana.tauro@intel.com>
LGTM,
Reviewed-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
> ---
> v2: add PCI_POSSIBLE_ERROR
> fix kernel-doc
> rename aer_path to internal error
> ---
> drivers/gpu/drm/xe/xe_pci_error.c | 26 ++++++++++++++++++++++++++
> drivers/gpu/drm/xe/xe_ras.c | 20 ++++++++++++++++++++
> drivers/gpu/drm/xe/xe_ras.h | 2 ++
> drivers/gpu/drm/xe/xe_ras_types.h | 2 ++
> 4 files changed, 50 insertions(+)
>
> diff --git a/drivers/gpu/drm/xe/xe_pci_error.c b/drivers/gpu/drm/xe/xe_pci_error.c
> index 9bf0da3a3d15..4ade392b47be 100644
> --- a/drivers/gpu/drm/xe/xe_pci_error.c
> +++ b/drivers/gpu/drm/xe/xe_pci_error.c
> @@ -54,6 +54,29 @@ static pci_ers_result_t ras_action_to_pci_result(struct pci_dev *pdev, u8 action
> }
> }
>
> +static bool is_aer_internal_error(struct pci_dev *pdev)
> +{
> + struct pci_dev *usp;
> + u16 aer_cap;
> + u32 status;
> +
> + usp = xe_pci_get_usp_dev(pdev);
> + if (!usp)
> + return false;
> +
> + aer_cap = pci_find_ext_capability(usp, PCI_EXT_CAP_ID_ERR);
> + if (!aer_cap) {
> + dev_warn_once(&usp->dev, "AER capability unavailable\n");
> + return false;
> + }
> +
> + pci_read_config_dword(usp, aer_cap + PCI_ERR_UNCOR_STATUS, &status);
> + if (PCI_POSSIBLE_ERROR(status))
> + return false;
> +
> + return status & PCI_ERR_UNC_INTN;
> +}
> +
> static pci_ers_result_t xe_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
> {
> struct xe_device *xe = pdev_to_xe_device(pdev);
> @@ -67,6 +90,9 @@ static pci_ers_result_t xe_pci_error_detected(struct pci_dev *pdev, pci_channel_
> if (xe_survivability_mode_is_boot_enabled(xe) || xe_wedged(xe))
> return PCI_ERS_RESULT_DISCONNECT;
>
> + if (is_aer_internal_error(pdev))
> + xe_ras_set_aer_internal_error(xe);
> +
> switch (state) {
> case pci_channel_io_normal:
> return PCI_ERS_RESULT_CAN_RECOVER;
> diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
> index 3aea4969af13..58a0b5fa676d 100644
> --- a/drivers/gpu/drm/xe/xe_ras.c
> +++ b/drivers/gpu/drm/xe/xe_ras.c
> @@ -1253,6 +1253,26 @@ u32 xe_ras_get_max_pages(struct xe_device *xe)
> return xe->ras.state.max_pages;
> }
>
> +/**
> + * xe_ras_is_aer_internal_error() - Check if an uncorrectable internal error was reported via AER
> + * @xe: xe device instance
> + *
> + * Return: true if an uncorrectable internal error was reported via AER, false otherwise.
> + */
> +bool xe_ras_is_aer_internal_error(struct xe_device *xe)
> +{
> + return xe->ras.state.aer_internal_error;
> +}
> +
> +/**
> + * xe_ras_set_aer_internal_error() - Set if an uncorrectable internal error is reported via AER
> + * @xe: xe device instance
> + */
> +void xe_ras_set_aer_internal_error(struct xe_device *xe)
> +{
> + xe->ras.state.aer_internal_error = true;
> +}
> +
> /**
> * xe_ras_init - Initialize Xe RAS
> * @xe: xe device instance
> diff --git a/drivers/gpu/drm/xe/xe_ras.h b/drivers/gpu/drm/xe/xe_ras.h
> index c44fa172011f..f7b587ac84e3 100644
> --- a/drivers/gpu/drm/xe/xe_ras.h
> +++ b/drivers/gpu/drm/xe/xe_ras.h
> @@ -25,5 +25,7 @@ bool xe_ras_get_disable_vram_page_offline(struct xe_device *xe);
> u32 xe_ras_get_max_pages(struct xe_device *xe);
> int xe_ras_get_counter_response(struct xe_device *xe, const struct xe_ras_error_class *counter,
> struct xe_ras_get_counter_response *response);
> +bool xe_ras_is_aer_internal_error(struct xe_device *xe);
> +void xe_ras_set_aer_internal_error(struct xe_device *xe);
>
> #endif
> diff --git a/drivers/gpu/drm/xe/xe_ras_types.h b/drivers/gpu/drm/xe/xe_ras_types.h
> index a86f9d2b8c92..0ff5803d495b 100644
> --- a/drivers/gpu/drm/xe/xe_ras_types.h
> +++ b/drivers/gpu/drm/xe/xe_ras_types.h
> @@ -414,6 +414,8 @@ struct xe_ras_set_health_response {
> * struct xe_ras_state - RAS device and firmware state
> */
> struct xe_ras_state {
> + /** @aer_internal_error: true if an uncorrectable internal error was reported via AER */
> + bool aer_internal_error;
> /** @disable_vram_page_offline: cached configfs policy, immutable after init */
> bool disable_vram_page_offline;
> /** @max_pages: Total number of pages that can be stored by firmware */
^ permalink raw reply [flat|nested] 23+ messages in thread
* ✓ Xe.CI.FULL: success for Handle non-fatal errors routed via IRQ (rev3)
2026-11-03 6:09 [PATCH v3 0/7] Handle non-fatal errors routed via IRQ Riana Tauro
` (8 preceding siblings ...)
2026-11-03 8:05 ` ✓ Xe.CI.BAT: " Patchwork
@ 2026-11-03 13:34 ` Patchwork
9 siblings, 0 replies; 23+ messages in thread
From: Patchwork @ 2026-11-03 13:34 UTC (permalink / raw)
To: Riana Tauro; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 38437 bytes --]
== Series Details ==
Series: Handle non-fatal errors routed via IRQ (rev3)
URL : https://patchwork.freedesktop.org/series/173001/
State : success
== Summary ==
CI Bug Log - changes from xe-6049-0f5e7199aaceed05aa49dad4c97df2677e32f779_FULL -> xe-pw-173001v3_FULL
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (3 -> 3)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in xe-pw-173001v3_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_big_fb@linear-8bpp-rotate-270:
- shard-ptl: NOTRUN -> [SKIP][1] ([Intel XE#5901])
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-ptl-3/igt@kms_big_fb@linear-8bpp-rotate-270.html
- shard-lnl: NOTRUN -> [SKIP][2] ([Intel XE#1407])
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-lnl-2/igt@kms_big_fb@linear-8bpp-rotate-270.html
* igt@kms_big_fb@y-tiled-8bpp-rotate-0:
- shard-bmg: NOTRUN -> [SKIP][3] ([Intel XE#1124]) +1 other test skip
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-bmg-3/igt@kms_big_fb@y-tiled-8bpp-rotate-0.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip:
- shard-ptl: NOTRUN -> [SKIP][4] ([Intel XE#5808]) +2 other tests skip
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-ptl-3/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html
- shard-lnl: NOTRUN -> [SKIP][5] ([Intel XE#1124]) +2 other tests skip
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-lnl-2/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html
* igt@kms_bw@connected-linear-tiling-4-displays-target-2160x1440p:
- shard-ptl: NOTRUN -> [SKIP][6] ([Intel XE#7679])
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-ptl-3/igt@kms_bw@connected-linear-tiling-4-displays-target-2160x1440p.html
- shard-lnl: NOTRUN -> [SKIP][7] ([Intel XE#8365])
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-lnl-2/igt@kms_bw@connected-linear-tiling-4-displays-target-2160x1440p.html
* igt@kms_ccs@bad-pixel-format-4-tiled-dg2-mc-ccs:
- shard-lnl: NOTRUN -> [SKIP][8] ([Intel XE#2887]) +2 other tests skip
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-lnl-2/igt@kms_ccs@bad-pixel-format-4-tiled-dg2-mc-ccs.html
* igt@kms_ccs@bad-rotation-90-y-tiled-gen12-rc-ccs:
- shard-ptl: NOTRUN -> [SKIP][9] ([Intel XE#5822]) +6 other tests skip
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-ptl-8/igt@kms_ccs@bad-rotation-90-y-tiled-gen12-rc-ccs.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs:
- shard-lnl: NOTRUN -> [SKIP][10] ([Intel XE#3432])
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-lnl-2/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-b-dp-1:
- shard-bmg: NOTRUN -> [SKIP][11] ([Intel XE#2652]) +3 other tests skip
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-bmg-7/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-b-dp-1.html
* igt@kms_chamelium_color@ctm-0-25:
- shard-ptl: NOTRUN -> [SKIP][12] ([Intel XE#5824])
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-ptl-8/igt@kms_chamelium_color@ctm-0-25.html
* igt@kms_chamelium_edid@hdmi-edid-read:
- shard-bmg: NOTRUN -> [SKIP][13] ([Intel XE#2252])
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-bmg-3/igt@kms_chamelium_edid@hdmi-edid-read.html
* igt@kms_chamelium_hpd@dp-hpd-fast:
- shard-lnl: NOTRUN -> [SKIP][14] ([Intel XE#373])
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-lnl-2/igt@kms_chamelium_hpd@dp-hpd-fast.html
* igt@kms_chamelium_hpd@hdmi-hpd-for-each-pipe:
- shard-ptl: NOTRUN -> [SKIP][15] ([Intel XE#2252]) +3 other tests skip
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-ptl-8/igt@kms_chamelium_hpd@hdmi-hpd-for-each-pipe.html
* igt@kms_chamelium_sharpness_filter@filter-basic:
- shard-ptl: NOTRUN -> [SKIP][16] ([Intel XE#6507])
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-ptl-3/igt@kms_chamelium_sharpness_filter@filter-basic.html
- shard-lnl: NOTRUN -> [SKIP][17] ([Intel XE#6507] / [Intel XE#7358])
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-lnl-2/igt@kms_chamelium_sharpness_filter@filter-basic.html
* igt@kms_color_pipeline@plane-ctm3x4@pipe-c-plane-3:
- shard-bmg: NOTRUN -> [SKIP][18] ([Intel XE#6969]) +7 other tests skip
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-bmg-3/igt@kms_color_pipeline@plane-ctm3x4@pipe-c-plane-3.html
* igt@kms_content_protection@atomic-dpms-hdcp14@pipe-a-dp-2:
- shard-bmg: NOTRUN -> [FAIL][19] ([Intel XE#3304] / [Intel XE#7374])
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-bmg-1/igt@kms_content_protection@atomic-dpms-hdcp14@pipe-a-dp-2.html
* igt@kms_content_protection@atomic-dpms@pipe-a-dp-2:
- shard-bmg: NOTRUN -> [FAIL][20] ([Intel XE#1178] / [Intel XE#3304] / [Intel XE#7374])
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-bmg-3/igt@kms_content_protection@atomic-dpms@pipe-a-dp-2.html
* igt@kms_content_protection@dp-mst-lic-type-0:
- shard-bmg: NOTRUN -> [SKIP][21] ([Intel XE#2390] / [Intel XE#6974])
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-bmg-3/igt@kms_content_protection@dp-mst-lic-type-0.html
* igt@kms_content_protection@mei-interface:
- shard-ptl: NOTRUN -> [SKIP][22] ([Intel XE#5845])
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-ptl-8/igt@kms_content_protection@mei-interface.html
* igt@kms_cursor_crc@cursor-offscreen-32x32:
- shard-bmg: NOTRUN -> [SKIP][23] ([Intel XE#2320])
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-bmg-3/igt@kms_cursor_crc@cursor-offscreen-32x32.html
* igt@kms_cursor_crc@cursor-random-32x10:
- shard-ptl: NOTRUN -> [SKIP][24] ([Intel XE#5900]) +1 other test skip
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-ptl-3/igt@kms_cursor_crc@cursor-random-32x10.html
- shard-lnl: NOTRUN -> [SKIP][25] ([Intel XE#1424])
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-lnl-2/igt@kms_cursor_crc@cursor-random-32x10.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic:
- shard-bmg: [PASS][26] -> [FAIL][27] ([Intel XE#7809])
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6049-0f5e7199aaceed05aa49dad4c97df2677e32f779/shard-bmg-2/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-bmg-8/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
* igt@kms_dp_link_training@non-uhbr-sst-direct-train:
- shard-ptl: NOTRUN -> [SKIP][28] ([Intel XE#9534])
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-ptl-4/igt@kms_dp_link_training@non-uhbr-sst-direct-train.html
* igt@kms_dp_link_training@non-uhbr-sst-tbtalt-train:
- shard-ptl: NOTRUN -> [SKIP][29] ([Intel XE#9539])
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-ptl-4/igt@kms_dp_link_training@non-uhbr-sst-tbtalt-train.html
* igt@kms_dsc@dsc-basic-ultrajoiner:
- shard-ptl: NOTRUN -> [SKIP][30] ([Intel XE#5907])
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-ptl-3/igt@kms_dsc@dsc-basic-ultrajoiner.html
- shard-lnl: NOTRUN -> [SKIP][31] ([Intel XE#8265])
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-lnl-2/igt@kms_dsc@dsc-basic-ultrajoiner.html
* igt@kms_flip@2x-blocking-absolute-wf_vblank:
- shard-ptl: NOTRUN -> [SKIP][32] ([Intel XE#2316])
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-ptl-3/igt@kms_flip@2x-blocking-absolute-wf_vblank.html
- shard-lnl: NOTRUN -> [SKIP][33] ([Intel XE#1421])
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-lnl-2/igt@kms_flip@2x-blocking-absolute-wf_vblank.html
* igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling:
- shard-lnl: NOTRUN -> [SKIP][34] ([Intel XE#7178] / [Intel XE#7349])
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-lnl-2/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling:
- shard-ptl: NOTRUN -> [SKIP][35] ([Intel XE#7178]) +3 other tests skip
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-ptl-8/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-linear-to-32bpp-linear-downscaling:
- shard-ptl: NOTRUN -> [SKIP][36] ([Intel XE#5828]) +1 other test skip
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-ptl-3/igt@kms_flip_scaled_crc@flip-64bpp-linear-to-32bpp-linear-downscaling.html
- shard-lnl: NOTRUN -> [SKIP][37] ([Intel XE#1397] / [Intel XE#1745] / [Intel XE#7385] / [Intel XE#9144])
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-lnl-2/igt@kms_flip_scaled_crc@flip-64bpp-linear-to-32bpp-linear-downscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-linear-to-32bpp-linear-downscaling@pipe-a-default-mode:
- shard-lnl: NOTRUN -> [SKIP][38] ([Intel XE#1397] / [Intel XE#7385] / [Intel XE#9144])
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-lnl-2/igt@kms_flip_scaled_crc@flip-64bpp-linear-to-32bpp-linear-downscaling@pipe-a-default-mode.html
* igt@kms_force_connector_basic@force-connector-state:
- shard-lnl: NOTRUN -> [SKIP][39] ([Intel XE#352])
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-lnl-2/igt@kms_force_connector_basic@force-connector-state.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-mmap-wc:
- shard-bmg: NOTRUN -> [SKIP][40] ([Intel XE#4141])
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-bmg-3/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-pgflip-blt:
- shard-ptl: NOTRUN -> [SKIP][41] ([Intel XE#5812]) +25 other tests skip
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-ptl-8/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-shrfb-draw-render:
- shard-lnl: NOTRUN -> [SKIP][42] ([Intel XE#656] / [Intel XE#7905]) +5 other tests skip
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-lnl-2/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-shrfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-spr-indfb-draw-mmap-wc:
- shard-bmg: NOTRUN -> [SKIP][43] ([Intel XE#2311])
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-bmg-3/igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-spr-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcdrrs-rgb101010-draw-mmap-wc:
- shard-ptl: NOTRUN -> [SKIP][44] ([Intel XE#5800] / [Intel XE#6312]) +3 other tests skip
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-ptl-8/igt@kms_frontbuffer_tracking@fbcdrrs-rgb101010-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcdrrs-rgb101010-draw-render:
- shard-lnl: NOTRUN -> [SKIP][45] ([Intel XE#6312] / [Intel XE#651]) +1 other test skip
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-lnl-2/igt@kms_frontbuffer_tracking@fbcdrrs-rgb101010-draw-render.html
* igt@kms_frontbuffer_tracking@fbcdrrshdr-1p-primscrn-shrfb-pgflip-blt:
- shard-ptl: NOTRUN -> [SKIP][46] ([Intel XE#6312])
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-ptl-3/igt@kms_frontbuffer_tracking@fbcdrrshdr-1p-primscrn-shrfb-pgflip-blt.html
- shard-lnl: NOTRUN -> [SKIP][47] ([Intel XE#6312])
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-lnl-2/igt@kms_frontbuffer_tracking@fbcdrrshdr-1p-primscrn-shrfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@fbcdrrshdr-2p-scndscrn-spr-indfb-draw-blt:
- shard-lnl: NOTRUN -> [SKIP][48] ([Intel XE#7905]) +4 other tests skip
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-lnl-2/igt@kms_frontbuffer_tracking@fbcdrrshdr-2p-scndscrn-spr-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-mmap-wc:
- shard-bmg: NOTRUN -> [SKIP][49] ([Intel XE#2313])
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-bmg-3/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcpsrhdr-tiling-4:
- shard-ptl: NOTRUN -> [SKIP][50] ([Intel XE#7865]) +3 other tests skip
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-ptl-8/igt@kms_frontbuffer_tracking@fbcpsrhdr-tiling-4.html
* igt@kms_frontbuffer_tracking@hdr-1p-offscreen-pri-indfb-draw-mmap-wc:
- shard-lnl: NOTRUN -> [SKIP][51] ([Intel XE#7865])
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-lnl-2/igt@kms_frontbuffer_tracking@hdr-1p-offscreen-pri-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@hdr-abgr161616f-draw-render:
- shard-bmg: NOTRUN -> [SKIP][52] ([Intel XE#7061])
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-bmg-3/igt@kms_frontbuffer_tracking@hdr-abgr161616f-draw-render.html
* igt@kms_frontbuffer_tracking@psrhdr-argb161616f-draw-render:
- shard-ptl: NOTRUN -> [SKIP][53] ([Intel XE#7061]) +2 other tests skip
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-ptl-3/igt@kms_frontbuffer_tracking@psrhdr-argb161616f-draw-render.html
- shard-lnl: NOTRUN -> [SKIP][54] ([Intel XE#7061])
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-lnl-2/igt@kms_frontbuffer_tracking@psrhdr-argb161616f-draw-render.html
* igt@kms_mst@mst-suspend-read-crc:
- shard-bmg: NOTRUN -> [SKIP][55] ([Intel XE#8348])
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-bmg-3/igt@kms_mst@mst-suspend-read-crc.html
* igt@kms_plane@pixel-format-x-tiled-modifier:
- shard-ptl: NOTRUN -> [SKIP][56] ([Intel XE#7283]) +2 other tests skip
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-ptl-3/igt@kms_plane@pixel-format-x-tiled-modifier.html
* igt@kms_plane@pixel-format-x-tiled-modifier@pipe-b-plane-5:
- shard-lnl: NOTRUN -> [SKIP][57] ([Intel XE#8303]) +1 other test skip
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-lnl-2/igt@kms_plane@pixel-format-x-tiled-modifier@pipe-b-plane-5.html
* igt@kms_plane@pixel-format-y-tiled-ccs-modifier:
- shard-lnl: NOTRUN -> [SKIP][58] ([Intel XE#7283])
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-lnl-2/igt@kms_plane@pixel-format-y-tiled-ccs-modifier.html
* igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-sf:
- shard-ptl: NOTRUN -> [SKIP][59] ([Intel XE#7304]) +1 other test skip
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-ptl-8/igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-sf.html
* igt@kms_psr2_sf@fbc-psr2-cursor-plane-update-sf:
- shard-lnl: NOTRUN -> [SKIP][60] ([Intel XE#2893] / [Intel XE#4608] / [Intel XE#7304])
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-lnl-2/igt@kms_psr2_sf@fbc-psr2-cursor-plane-update-sf.html
* igt@kms_psr2_sf@fbc-psr2-cursor-plane-update-sf@pipe-a-edp-1:
- shard-lnl: NOTRUN -> [SKIP][61] ([Intel XE#4608])
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-lnl-2/igt@kms_psr2_sf@fbc-psr2-cursor-plane-update-sf@pipe-a-edp-1.html
* igt@kms_psr2_sf@fbc-psr2-cursor-plane-update-sf@pipe-b-edp-1:
- shard-lnl: NOTRUN -> [SKIP][62] ([Intel XE#4608] / [Intel XE#7304])
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-lnl-2/igt@kms_psr2_sf@fbc-psr2-cursor-plane-update-sf@pipe-b-edp-1.html
* igt@kms_psr2_sf@fbc-psr2-overlay-primary-update-sf-dmg-area:
- shard-ptl: NOTRUN -> [SKIP][63] ([Intel XE#5858] / [Intel XE#7304]) +3 other tests skip
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-ptl-4/igt@kms_psr2_sf@fbc-psr2-overlay-primary-update-sf-dmg-area.html
* igt@kms_psr2_sf@fbc-psr2-overlay-primary-update-sf-dmg-area@pipe-a-edp-1:
- shard-ptl: NOTRUN -> [SKIP][64] ([Intel XE#5858]) +1 other test skip
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-ptl-4/igt@kms_psr2_sf@fbc-psr2-overlay-primary-update-sf-dmg-area@pipe-a-edp-1.html
* igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-exceed-fully-sf:
- shard-bmg: NOTRUN -> [SKIP][65] ([Intel XE#1489])
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-bmg-3/igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-exceed-fully-sf.html
* igt@kms_psr2_su@frontbuffer-xrgb8888:
- shard-ptl: NOTRUN -> [SKIP][66] ([Intel XE#7413])
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-ptl-3/igt@kms_psr2_su@frontbuffer-xrgb8888.html
- shard-lnl: NOTRUN -> [SKIP][67] ([Intel XE#1128] / [Intel XE#7413])
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-lnl-2/igt@kms_psr2_su@frontbuffer-xrgb8888.html
* igt@kms_vrr@lobf:
- shard-ptl: NOTRUN -> [SKIP][68] ([Intel XE#5950] / [Intel XE#9277])
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-ptl-4/igt@kms_vrr@lobf.html
* igt@kms_vrr@lobf@pipe-a-edp-1:
- shard-ptl: NOTRUN -> [SKIP][69] ([Intel XE#7638] / [Intel XE#9277])
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-ptl-4/igt@kms_vrr@lobf@pipe-a-edp-1.html
* igt@xe_evict@evict-mixed-threads-small-multi-vm:
- shard-ptl: NOTRUN -> [SKIP][70] ([Intel XE#5764])
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-ptl-4/igt@xe_evict@evict-mixed-threads-small-multi-vm.html
* igt@xe_evict_ccs@evict-overcommit-standalone-instantfree-samefd:
- shard-ptl: NOTRUN -> [SKIP][71] ([Intel XE#6144])
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-ptl-3/igt@xe_evict_ccs@evict-overcommit-standalone-instantfree-samefd.html
- shard-lnl: NOTRUN -> [SKIP][72] ([Intel XE#6540] / [Intel XE#688])
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-lnl-2/igt@xe_evict_ccs@evict-overcommit-standalone-instantfree-samefd.html
* igt@xe_exec_balancer@many-execqueues-cm-parallel-userptr:
- shard-lnl: NOTRUN -> [SKIP][73] ([Intel XE#7482]) +2 other tests skip
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-lnl-2/igt@xe_exec_balancer@many-execqueues-cm-parallel-userptr.html
* igt@xe_exec_balancer@once-cm-virtual-userptr-invalidate-race:
- shard-ptl: NOTRUN -> [SKIP][74] ([Intel XE#7482]) +2 other tests skip
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-ptl-3/igt@xe_exec_balancer@once-cm-virtual-userptr-invalidate-race.html
* igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-rebind:
- shard-lnl: NOTRUN -> [SKIP][75] ([Intel XE#1392])
[75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-lnl-2/igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-rebind.html
* igt@xe_exec_basic@multigpu-once-null:
- shard-ptl: NOTRUN -> [SKIP][76] ([Intel XE#5575] / [Intel XE#7484]) +3 other tests skip
[76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-ptl-8/igt@xe_exec_basic@multigpu-once-null.html
* igt@xe_exec_fault_mode@many-multi-queue-userptr-rebind:
- shard-ptl: NOTRUN -> [SKIP][77] ([Intel XE#8374]) +3 other tests skip
[77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-ptl-3/igt@xe_exec_fault_mode@many-multi-queue-userptr-rebind.html
- shard-lnl: NOTRUN -> [SKIP][78] ([Intel XE#8374]) +1 other test skip
[78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-lnl-2/igt@xe_exec_fault_mode@many-multi-queue-userptr-rebind.html
* igt@xe_exec_fault_mode@once-multi-queue-prefetch:
- shard-bmg: NOTRUN -> [SKIP][79] ([Intel XE#8374])
[79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-bmg-3/igt@xe_exec_fault_mode@once-multi-queue-prefetch.html
* igt@xe_exec_multi_queue@many-queues-close-fd:
- shard-bmg: NOTRUN -> [SKIP][80] ([Intel XE#8364]) +1 other test skip
[80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-bmg-3/igt@xe_exec_multi_queue@many-queues-close-fd.html
* igt@xe_exec_multi_queue@many-queues-preempt-mode-close-fd-smem:
- shard-lnl: NOTRUN -> [SKIP][81] ([Intel XE#8364]) +7 other tests skip
[81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-lnl-2/igt@xe_exec_multi_queue@many-queues-preempt-mode-close-fd-smem.html
* igt@xe_exec_multi_queue@two-queues-preempt-mode-fault-dyn-priority:
- shard-ptl: NOTRUN -> [SKIP][82] ([Intel XE#8364]) +12 other tests skip
[82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-ptl-3/igt@xe_exec_multi_queue@two-queues-preempt-mode-fault-dyn-priority.html
* igt@xe_exec_threads@threads-multi-queue-cm-shared-vm-userptr-rebind:
- shard-bmg: NOTRUN -> [SKIP][83] ([Intel XE#8378]) +1 other test skip
[83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-bmg-3/igt@xe_exec_threads@threads-multi-queue-cm-shared-vm-userptr-rebind.html
* igt@xe_exec_threads@threads-multi-queue-shared-vm-basic:
- shard-ptl: NOTRUN -> [SKIP][84] ([Intel XE#8378]) +1 other test skip
[84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-ptl-4/igt@xe_exec_threads@threads-multi-queue-shared-vm-basic.html
* igt@xe_oa@oa-tlb-invalidate:
- shard-ptl: NOTRUN -> [SKIP][85] ([Intel XE#6069])
[85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-ptl-3/igt@xe_oa@oa-tlb-invalidate.html
- shard-lnl: NOTRUN -> [SKIP][86] ([Intel XE#2248] / [Intel XE#7325] / [Intel XE#7393])
[86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-lnl-2/igt@xe_oa@oa-tlb-invalidate.html
* igt@xe_pm@d3hot-i2c:
- shard-ptl: NOTRUN -> [SKIP][87] ([Intel XE#5742] / [Intel XE#7400])
[87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-ptl-8/igt@xe_pm@d3hot-i2c.html
* igt@xe_pm@s4-vm-bind-userptr:
- shard-ptl: [PASS][88] -> [ABORT][89] ([Intel XE#9362]) +2 other tests abort
[88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6049-0f5e7199aaceed05aa49dad4c97df2677e32f779/shard-ptl-6/igt@xe_pm@s4-vm-bind-userptr.html
[89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-ptl-2/igt@xe_pm@s4-vm-bind-userptr.html
* igt@xe_pm_residency@gt-c6-freeze@gt1:
- shard-bmg: [PASS][90] -> [FAIL][91] ([Intel XE#9254]) +1 other test fail
[90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6049-0f5e7199aaceed05aa49dad4c97df2677e32f779/shard-bmg-10/igt@xe_pm_residency@gt-c6-freeze@gt1.html
[91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-bmg-7/igt@xe_pm_residency@gt-c6-freeze@gt1.html
* igt@xe_query@multigpu-query-pxp-status:
- shard-bmg: NOTRUN -> [SKIP][92] ([Intel XE#944])
[92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-bmg-3/igt@xe_query@multigpu-query-pxp-status.html
* igt@xe_query@multigpu-query-topology:
- shard-ptl: NOTRUN -> [SKIP][93] ([Intel XE#6019])
[93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-ptl-3/igt@xe_query@multigpu-query-topology.html
- shard-lnl: NOTRUN -> [SKIP][94] ([Intel XE#944])
[94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-lnl-2/igt@xe_query@multigpu-query-topology.html
* igt@xe_sriov_auto_provisioning@exclusive-ranges:
- shard-lnl: NOTRUN -> [SKIP][95] ([Intel XE#4130] / [Intel XE#7366])
[95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-lnl-2/igt@xe_sriov_auto_provisioning@exclusive-ranges.html
#### Possible fixes ####
* igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-async-flip:
- shard-ptl: [FAIL][96] ([Intel XE#8628]) -> [PASS][97]
[96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6049-0f5e7199aaceed05aa49dad4c97df2677e32f779/shard-ptl-4/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html
[97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-ptl-2/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html
* igt@kms_bw@linear-tiling-1-displays-target-3840x2160p:
- shard-bmg: [SKIP][98] ([Intel XE#367]) -> [PASS][99]
[98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6049-0f5e7199aaceed05aa49dad4c97df2677e32f779/shard-bmg-4/igt@kms_bw@linear-tiling-1-displays-target-3840x2160p.html
[99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-bmg-7/igt@kms_bw@linear-tiling-1-displays-target-3840x2160p.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs:
- shard-bmg: [INCOMPLETE][100] ([Intel XE#7084] / [Intel XE#8150]) -> [PASS][101] +1 other test pass
[100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6049-0f5e7199aaceed05aa49dad4c97df2677e32f779/shard-bmg-5/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
[101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-bmg-3/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-c-edp-1:
- shard-ptl: [DMESG-WARN][102] ([Intel XE#9391]) -> [PASS][103] +1 other test pass
[102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6049-0f5e7199aaceed05aa49dad4c97df2677e32f779/shard-ptl-2/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-c-edp-1.html
[103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-ptl-4/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-c-edp-1.html
* igt@kms_hdr@invalid-hdr:
- shard-bmg: [SKIP][104] ([Intel XE#1503]) -> [PASS][105]
[104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6049-0f5e7199aaceed05aa49dad4c97df2677e32f779/shard-bmg-4/igt@kms_hdr@invalid-hdr.html
[105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-bmg-7/igt@kms_hdr@invalid-hdr.html
* igt@kms_vrr@flip-suspend@pipe-a-edp-1:
- shard-ptl: [FAIL][106] ([Intel XE#4227] / [Intel XE#7397]) -> [PASS][107] +1 other test pass
[106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6049-0f5e7199aaceed05aa49dad4c97df2677e32f779/shard-ptl-1/igt@kms_vrr@flip-suspend@pipe-a-edp-1.html
[107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-ptl-4/igt@kms_vrr@flip-suspend@pipe-a-edp-1.html
* igt@kms_vrr@flipline:
- shard-lnl: [FAIL][108] ([Intel XE#4227] / [Intel XE#7397]) -> [PASS][109] +1 other test pass
[108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6049-0f5e7199aaceed05aa49dad4c97df2677e32f779/shard-lnl-5/igt@kms_vrr@flipline.html
[109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-lnl-5/igt@kms_vrr@flipline.html
* igt@xe_pm@s4-multiple-execs:
- shard-ptl: [ABORT][110] ([Intel XE#9362]) -> [PASS][111] +1 other test pass
[110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6049-0f5e7199aaceed05aa49dad4c97df2677e32f779/shard-ptl-4/igt@xe_pm@s4-multiple-execs.html
[111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-ptl-3/igt@xe_pm@s4-multiple-execs.html
- shard-lnl: [ABORT][112] ([Intel XE#9362]) -> [PASS][113]
[112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6049-0f5e7199aaceed05aa49dad4c97df2677e32f779/shard-lnl-2/igt@xe_pm@s4-multiple-execs.html
[113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-lnl-2/igt@xe_pm@s4-multiple-execs.html
#### Warnings ####
* igt@kms_hdr@brightness-with-hdr:
- shard-bmg: [SKIP][114] ([Intel XE#3374] / [Intel XE#3544]) -> [SKIP][115] ([Intel XE#3544])
[114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6049-0f5e7199aaceed05aa49dad4c97df2677e32f779/shard-bmg-7/igt@kms_hdr@brightness-with-hdr.html
[115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-bmg-3/igt@kms_hdr@brightness-with-hdr.html
* igt@kms_tiled_display@basic-test-pattern:
- shard-bmg: [FAIL][116] ([Intel XE#1729] / [Intel XE#7424]) -> [SKIP][117] ([Intel XE#2426] / [Intel XE#5848])
[116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6049-0f5e7199aaceed05aa49dad4c97df2677e32f779/shard-bmg-10/igt@kms_tiled_display@basic-test-pattern.html
[117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-bmg-7/igt@kms_tiled_display@basic-test-pattern.html
* igt@kms_tiled_display@basic-test-pattern-with-chamelium:
- shard-bmg: [SKIP][118] ([Intel XE#2426] / [Intel XE#5848]) -> [SKIP][119] ([Intel XE#2509] / [Intel XE#7437])
[118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6049-0f5e7199aaceed05aa49dad4c97df2677e32f779/shard-bmg-7/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
[119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/shard-bmg-1/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1128]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1128
[Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
[Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
[Intel XE#1397]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1397
[Intel XE#1407]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1407
[Intel XE#1421]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1421
[Intel XE#1424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1424
[Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
[Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
[Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
[Intel XE#1745]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1745
[Intel XE#2248]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2248
[Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
[Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
[Intel XE#2390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2390
[Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
[Intel XE#2509]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2509
[Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
[Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
[Intel XE#2893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2893
[Intel XE#3304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3304
[Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374
[Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
[Intel XE#352]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/352
[Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
[Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
[Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
[Intel XE#4130]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4130
[Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
[Intel XE#4227]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4227
[Intel XE#4608]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4608
[Intel XE#5575]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5575
[Intel XE#5742]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5742
[Intel XE#5764]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5764
[Intel XE#5800]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5800
[Intel XE#5808]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5808
[Intel XE#5812]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5812
[Intel XE#5822]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5822
[Intel XE#5824]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5824
[Intel XE#5828]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5828
[Intel XE#5845]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5845
[Intel XE#5848]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5848
[Intel XE#5858]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5858
[Intel XE#5900]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5900
[Intel XE#5901]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5901
[Intel XE#5907]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5907
[Intel XE#5950]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5950
[Intel XE#6019]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6019
[Intel XE#6069]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6069
[Intel XE#6144]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6144
[Intel XE#6312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6312
[Intel XE#6507]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6507
[Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
[Intel XE#6540]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6540
[Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
[Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
[Intel XE#6969]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6969
[Intel XE#6974]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6974
[Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
[Intel XE#7084]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7084
[Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
[Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
[Intel XE#7304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7304
[Intel XE#7325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7325
[Intel XE#7349]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7349
[Intel XE#7358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7358
[Intel XE#7366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7366
[Intel XE#7374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7374
[Intel XE#7385]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7385
[Intel XE#7393]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7393
[Intel XE#7397]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7397
[Intel XE#7400]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7400
[Intel XE#7413]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7413
[Intel XE#7424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7424
[Intel XE#7437]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7437
[Intel XE#7482]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7482
[Intel XE#7484]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7484
[Intel XE#7638]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7638
[Intel XE#7679]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7679
[Intel XE#7809]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7809
[Intel XE#7865]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7865
[Intel XE#7905]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7905
[Intel XE#8150]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8150
[Intel XE#8265]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8265
[Intel XE#8303]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8303
[Intel XE#8348]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8348
[Intel XE#8364]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8364
[Intel XE#8365]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8365
[Intel XE#8374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8374
[Intel XE#8378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8378
[Intel XE#8628]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8628
[Intel XE#9144]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9144
[Intel XE#9254]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9254
[Intel XE#9277]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9277
[Intel XE#9362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9362
[Intel XE#9391]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9391
[Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
[Intel XE#9534]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9534
[Intel XE#9539]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9539
Build changes
-------------
* Linux: xe-6049-0f5e7199aaceed05aa49dad4c97df2677e32f779 -> xe-pw-173001v3
IGT_9175: 9175
xe-6049-0f5e7199aaceed05aa49dad4c97df2677e32f779: 0f5e7199aaceed05aa49dad4c97df2677e32f779
xe-pw-173001v3: 173001v3
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v3/index.html
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^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH v3 2/7] drm/xe/hw_error: Initialize hw_error_work per tile
2026-11-03 6:09 ` [PATCH v3 2/7] drm/xe/hw_error: Initialize hw_error_work per tile Riana Tauro
2026-11-03 6:23 ` sashiko-bot
@ 2026-11-04 9:31 ` Mallesh, Koujalagi
2026-11-04 12:58 ` Tauro, Riana
1 sibling, 1 reply; 23+ messages in thread
From: Mallesh, Koujalagi @ 2026-11-04 9:31 UTC (permalink / raw)
To: Riana Tauro, intel-xe
Cc: anshuman.gupta, rodrigo.vivi, aravind.iddamsetty, raag.jadav,
ravi.kishore.koppuravuri, tejas.upadhyay
[-- Attachment #1: Type: text/plain, Size: 3111 bytes --]
On 03-11-2026 11:39 am, Riana Tauro wrote:
> Since hw_error_work is now being reused generically, initialize it per tile
> so that we don't hit uninitialized work for non-root tile. While at it,
> disable hw_error_work on remove to prevent UAF during unwind.
>
> Signed-off-by: Riana Tauro<riana.tauro@intel.com>
> ---
> v2: move disable work to xe_device_remove
> add dgfx and sriov check (Sashiko)
> ---
> drivers/gpu/drm/xe/xe_device.c | 3 +++
> drivers/gpu/drm/xe/xe_hw_error.c | 24 ++++++++++++++++++++++--
> drivers/gpu/drm/xe/xe_hw_error.h | 1 +
> 3 files changed, 26 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
> index 07a7ab6ac083..8f498e3e3e58 100644
> --- a/drivers/gpu/drm/xe/xe_device.c
> +++ b/drivers/gpu/drm/xe/xe_device.c
> @@ -45,6 +45,7 @@
> #include "xe_guc.h"
> #include "xe_guc_pc.h"
> #include "xe_hw_engine_group.h"
> +#include "xe_hw_error.h"
> #include "xe_hwmon.h"
> #include "xe_i2c.h"
> #include "xe_irq.h"
> @@ -1118,6 +1119,8 @@ int xe_device_probe(struct xe_device *xe)
>
> void xe_device_remove(struct xe_device *xe)
> {
> + xe_hw_error_work_disable(xe);
> +
> xe_display_unregister(xe);
>
> drm_dev_unplug(&xe->drm);
> diff --git a/drivers/gpu/drm/xe/xe_hw_error.c b/drivers/gpu/drm/xe/xe_hw_error.c
> index a934b649575c..aaa2437d40bf 100644
> --- a/drivers/gpu/drm/xe/xe_hw_error.c
> +++ b/drivers/gpu/drm/xe/xe_hw_error.c
> @@ -537,6 +537,24 @@ static void process_hw_errors(struct xe_device *xe)
> }
> }
>
> +/**
> + * xe_hw_error_work_disable - Disable hw error work
> + * @xe: xe device instance
> + *
> + * This function disables work for hardware error handling for all tiles.
> + */
> +void xe_hw_error_work_disable(struct xe_device *xe)
> +{
> + struct xe_tile *tile;
> + u8 id;
> +
> + if (!IS_DGFX(xe) || IS_SRIOV_VF(xe))
> + return;
> +
> + for_each_tile(tile, xe, id)
> + disable_work_sync(&tile->hw_error_work);
> +}
> +
> /**
> * xe_hw_error_init - Initialize hw errors
> * @xe: xe device instance
> @@ -546,12 +564,14 @@ static void process_hw_errors(struct xe_device *xe)
> */
> void xe_hw_error_init(struct xe_device *xe)
> {
> - struct xe_tile *tile = xe_device_get_root_tile(xe);
> + struct xe_tile *tile;
> + u8 id;
>
> if (!IS_DGFX(xe) || IS_SRIOV_VF(xe))
> return;
>
> - INIT_WORK(&tile->hw_error_work, hw_error_work);
> + for_each_tile(tile, xe, id)
> + INIT_WORK(&tile->hw_error_work, hw_error_work);
What will happen when probe failure occurred after xe_hw_error_ini(),
how are tile workers cancel?
Thanks,
-/Mallesh
> process_hw_errors(xe);
> }
> diff --git a/drivers/gpu/drm/xe/xe_hw_error.h b/drivers/gpu/drm/xe/xe_hw_error.h
> index 5e3a11424108..944699331a93 100644
> --- a/drivers/gpu/drm/xe/xe_hw_error.h
> +++ b/drivers/gpu/drm/xe/xe_hw_error.h
> @@ -12,4 +12,5 @@ struct xe_device;
>
> void xe_hw_error_irq_handler(struct xe_tile *tile, const u32 master_ctl);
> void xe_hw_error_init(struct xe_device *xe);
> +void xe_hw_error_work_disable(struct xe_device *xe);
> #endif
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^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH v3 6/7] drm/xe: Add support for wa_14028434957
2026-11-03 6:09 ` [PATCH v3 6/7] drm/xe: Add support for wa_14028434957 Riana Tauro
2026-11-03 6:33 ` sashiko-bot
@ 2026-11-04 10:38 ` Mallesh, Koujalagi
2026-11-04 10:44 ` Tauro, Riana
1 sibling, 1 reply; 23+ messages in thread
From: Mallesh, Koujalagi @ 2026-11-04 10:38 UTC (permalink / raw)
To: Riana Tauro, intel-xe
Cc: anshuman.gupta, rodrigo.vivi, aravind.iddamsetty, raag.jadav,
ravi.kishore.koppuravuri, tejas.upadhyay, Andi Shyti
[-- Attachment #1: Type: text/plain, Size: 7723 bytes --]
On 03-11-2026 11:39 am, Riana Tauro wrote:
> Add support for wa_14028434957 on platform CRI.
>
> Non-fatal device errors are reported via a direct IRQ, while fatal
> device errors are downgraded to non-fatal uncorrectable internal
> errors and reported via AER.
>
> Add support to process and log non-fatal errors routed via the direct
> IRQ path. Most non-fatal errors require no reset, except double-bit
> ECC errors affecting a critical BO, for which the device is wedged
> with a bus reset as the recovery action.
>
> For uncorrectable internal errors reported via AER, request a
> secondary bus reset to recover. To avoid a race between the two
> paths, if non-fatal error processing is in progress when an
> uncorrectable internal error occurs, flush and disable the worker
> to prevent further processing, since a reset is
> imminent.
>
> Cc: Andi Shyti<andi.shyti@linux.intel.com>
> Signed-off-by: Riana Tauro<riana.tauro@intel.com>
> ---
> v2: use platform instead of graphics version (Gustavo)
> combine patches (Tejas, Mallesh)
> remove 1sec delayed worker (Andi)
> ---
> drivers/gpu/drm/xe/xe_device_wa_oob.rules | 1 +
> drivers/gpu/drm/xe/xe_hw_error.c | 31 ++++++++++++++++++++---
> drivers/gpu/drm/xe/xe_pci_error.c | 12 ++++++++-
> drivers/gpu/drm/xe/xe_ras.c | 21 +++++++++++++--
> 4 files changed, 58 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_device_wa_oob.rules b/drivers/gpu/drm/xe/xe_device_wa_oob.rules
> index 356b4707dafe..3a8ef8abafc5 100644
> --- a/drivers/gpu/drm/xe/xe_device_wa_oob.rules
> +++ b/drivers/gpu/drm/xe/xe_device_wa_oob.rules
> @@ -6,3 +6,4 @@
> 14026633728 PLATFORM(CRESCENTISLAND)
> 14026746987 PLATFORM(CRESCENTISLAND)
> 14026779378 PLATFORM(CRESCENTISLAND)
> +14028434957 PLATFORM(CRESCENTISLAND)
> diff --git a/drivers/gpu/drm/xe/xe_hw_error.c b/drivers/gpu/drm/xe/xe_hw_error.c
> index 39ff1e8cc156..2ab49ffdf49f 100644
> --- a/drivers/gpu/drm/xe/xe_hw_error.c
> +++ b/drivers/gpu/drm/xe/xe_hw_error.c
> @@ -5,6 +5,8 @@
>
> #include <linux/bitmap.h>
>
> +#include <generated/xe_device_wa_oob.h>
> +
> #include "regs/xe_gsc_regs.h"
> #include "regs/xe_hw_error_regs.h"
> #include "regs/xe_irq_regs.h"
> @@ -15,7 +17,11 @@
> #include "xe_hw_error.h"
> #include "xe_mmio.h"
> #include "xe_pm.h"
> +#include "xe_ras.h"
> #include "xe_survivability_mode.h"
> +#include "xe_wa.h"
> +#include "xe_wedge.h"
> +
>
> #define GT_HW_ERROR_MAX_ERR_BITS 16
> #define HEC_UNCORR_FW_ERR_BITS 4
> @@ -171,7 +177,24 @@ static void hw_error_work(struct work_struct *work)
> struct xe_tile *tile = container_of(work, typeof(*tile), hw_error_work);
> struct xe_device *xe = tile_to_xe(tile);
>
> + /* Skip hw error processing if device is already wedged */
> + if (xe_wedged(xe))
> + return;
> +
> guard(xe_pm_runtime)(xe);
> +
> + if (xe->info.has_sysctrl && XE_DEVICE_WA(xe, 14028434957)) {
> + /*
> + * Skip handling if an uncorrectable internal error is reported as
> + * reset is imminent
> + */
> + if (xe_ras_is_aer_internal_error(xe))
> + return;
How are we dealing with aer_internal_error variable where on AER path we
are setting true and reading same variable on different worker thread,
for example if
we have four tiles then four worker threads are running in parallel.
> +
> + xe_ras_process_errors(xe);
hmm, we need to handle return of xe_ras_process_error() right?
Thanks
-/Mallesh
> + return;
> + }
> +
> xe_survivability_mode_runtime_enable(xe);
> }
>
> @@ -433,12 +456,12 @@ static void hw_error_source_handler(struct xe_tile *tile, const enum hardware_er
> return;
>
> /*
> - * Hardware errors are reported through System Controller on the platforms that
> - * support it, and never routed as direct IRQ to SGUnit. So we should never be
> - * here for those platforms.
> + * Non-fatal errors are routed as a direct IRQ on platforms that support
> + * system controller.
> */
> if (xe->info.has_sysctrl) {
> - drm_err_ratelimited(&xe->drm, HW_ERR "Invalid error routing\n");
> + drm_err_ratelimited(&xe->drm, HW_ERR "Non-fatal %s reported\n", severity_str);
> + schedule_work(&tile->hw_error_work);
> return;
> }
>
> diff --git a/drivers/gpu/drm/xe/xe_pci_error.c b/drivers/gpu/drm/xe/xe_pci_error.c
> index 4ade392b47be..c27fd22e28ac 100644
> --- a/drivers/gpu/drm/xe/xe_pci_error.c
> +++ b/drivers/gpu/drm/xe/xe_pci_error.c
> @@ -5,14 +5,18 @@
>
> #include <linux/pci.h>
>
> +#include <generated/xe_device_wa_oob.h>
> +
> #include "xe_device.h"
> #include "xe_gt.h"
> +#include "xe_hw_error.h"
> #include "xe_log.h"
> #include "xe_pci.h"
> #include "xe_pm.h"
> #include "xe_printk.h"
> #include "xe_ras.h"
> #include "xe_survivability_mode.h"
> +#include "xe_wa.h"
> #include "xe_wedge.h"
>
> static void prepare_device_for_reset(struct pci_dev *pdev)
> @@ -90,8 +94,14 @@ static pci_ers_result_t xe_pci_error_detected(struct pci_dev *pdev, pci_channel_
> if (xe_survivability_mode_is_boot_enabled(xe) || xe_wedged(xe))
> return PCI_ERS_RESULT_DISCONNECT;
>
> - if (is_aer_internal_error(pdev))
> + /*
> + * If non-fatal error processing is in progress when uncorrectable internal error occurs,
> + * flush and disable the worker to prevent further processing, as a reset is imminent.
> + */
> + if (XE_DEVICE_WA(xe, 14028434957) && is_aer_internal_error(pdev)) {
> xe_ras_set_aer_internal_error(xe);
> + xe_hw_error_work_disable(xe);
> + }
>
> switch (state) {
> case pci_channel_io_normal:
> diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
> index 58a0b5fa676d..1809c3c893de 100644
> --- a/drivers/gpu/drm/xe/xe_ras.c
> +++ b/drivers/gpu/drm/xe/xe_ras.c
> @@ -5,6 +5,8 @@
>
> #include <linux/bitfield.h>
>
> +#include <generated/xe_device_wa_oob.h>
> +
> #include "xe_assert.h"
> #include "xe_bo.h"
> #include "xe_configfs.h"
> @@ -23,6 +25,7 @@
> #include "xe_sysctrl_mailbox.h"
> #include "xe_sysctrl_mailbox_types.h"
> #include "xe_ttm_vram_mgr.h"
> +#include "xe_wa.h"
> #include "xe_wedge.h"
>
> /* Any non-null entry marks the page as offlined by firmware */
> @@ -671,8 +674,15 @@ static u8 handle_device_memory_errors(struct xe_device *xe, struct xe_ras_error_
> DEVICE_MEMORY, &arr->counter, sizeof(arr->counter),
> "Double-bit ECC error detected at sw address 0x%llx\n",
> info->sw_address);
> - if (ret)
> + /*
> + * Double-bit ECC errors are non-fatal errors and are reported via IRQ.
> + * Wedge the device with a bus reset for errors that require SBR to recover.
> + * TODO: Trigger SBR using pci_reset_bus
> + */
> + if (ret) {
> + xe_wedge_declare(xe, DRM_WEDGE_RECOVERY_BUS_RESET);
> return XE_RAS_RECOVERY_ACTION_RESET;
> + }
> break;
> default:
> xe_log_comp(xe, cper_sev, DEVICE_MEMORY, &arr->counter, sizeof(arr->counter),
> @@ -818,9 +828,16 @@ enum xe_ras_recovery_action xe_ras_process_errors(struct xe_device *xe)
> return XE_RAS_RECOVERY_ACTION_RECOVERED;
>
> BUILD_BUG_ON(BITS_PER_TYPE(sent) < XE_RAS_COMP_MAX);
> - /* Default action */
> + /* Default action for PCIe bus errors */
> final_action = XE_RAS_RECOVERY_ACTION_RECOVERED;
>
> + /*
> + * Device fatal errors are downgraded to non-fatal and reported as an uncorrectable
> + * internal error. Set the default action to reset.
> + */
> + if (XE_DEVICE_WA(xe, 14028434957) && xe_ras_is_aer_internal_error(xe))
> + final_action = XE_RAS_RECOVERY_ACTION_RESET;
> +
> xe_sysctrl_create_command(&command, XE_SYSCTRL_GROUP_GFSP, XE_SYSCTRL_CMD_GET_SOC_ERROR,
> NULL, 0, &response, sizeof(response));
>
[-- Attachment #2: Type: text/html, Size: 8772 bytes --]
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH v3 6/7] drm/xe: Add support for wa_14028434957
2026-11-04 10:38 ` Mallesh, Koujalagi
@ 2026-11-04 10:44 ` Tauro, Riana
0 siblings, 0 replies; 23+ messages in thread
From: Tauro, Riana @ 2026-11-04 10:44 UTC (permalink / raw)
To: Mallesh, Koujalagi, intel-xe
Cc: anshuman.gupta, rodrigo.vivi, aravind.iddamsetty, raag.jadav,
ravi.kishore.koppuravuri, tejas.upadhyay, Andi Shyti
On 04-11-2026 16:08, Mallesh, Koujalagi wrote:
>
>
> On 03-11-2026 11:39 am, Riana Tauro wrote:
>> Add support for wa_14028434957 on platform CRI.
>>
>> Non-fatal device errors are reported via a direct IRQ, while fatal
>> device errors are downgraded to non-fatal uncorrectable internal
>> errors and reported via AER.
>>
>> Add support to process and log non-fatal errors routed via the direct
>> IRQ path. Most non-fatal errors require no reset, except double-bit
>> ECC errors affecting a critical BO, for which the device is wedged
>> with a bus reset as the recovery action.
>>
>> For uncorrectable internal errors reported via AER, request a
>> secondary bus reset to recover. To avoid a race between the two
>> paths, if non-fatal error processing is in progress when an
>> uncorrectable internal error occurs, flush and disable the worker
>> to prevent further processing, since a reset is
>> imminent.
>>
>> Cc: Andi Shyti<andi.shyti@linux.intel.com>
>> Signed-off-by: Riana Tauro<riana.tauro@intel.com>
>> ---
>> v2: use platform instead of graphics version (Gustavo)
>> combine patches (Tejas, Mallesh)
>> remove 1sec delayed worker (Andi)
>> ---
>> drivers/gpu/drm/xe/xe_device_wa_oob.rules | 1 +
>> drivers/gpu/drm/xe/xe_hw_error.c | 31 ++++++++++++++++++++---
>> drivers/gpu/drm/xe/xe_pci_error.c | 12 ++++++++-
>> drivers/gpu/drm/xe/xe_ras.c | 21 +++++++++++++--
>> 4 files changed, 58 insertions(+), 7 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_device_wa_oob.rules b/drivers/gpu/drm/xe/xe_device_wa_oob.rules
>> index 356b4707dafe..3a8ef8abafc5 100644
>> --- a/drivers/gpu/drm/xe/xe_device_wa_oob.rules
>> +++ b/drivers/gpu/drm/xe/xe_device_wa_oob.rules
>> @@ -6,3 +6,4 @@
>> 14026633728 PLATFORM(CRESCENTISLAND)
>> 14026746987 PLATFORM(CRESCENTISLAND)
>> 14026779378 PLATFORM(CRESCENTISLAND)
>> +14028434957 PLATFORM(CRESCENTISLAND)
>> diff --git a/drivers/gpu/drm/xe/xe_hw_error.c b/drivers/gpu/drm/xe/xe_hw_error.c
>> index 39ff1e8cc156..2ab49ffdf49f 100644
>> --- a/drivers/gpu/drm/xe/xe_hw_error.c
>> +++ b/drivers/gpu/drm/xe/xe_hw_error.c
>> @@ -5,6 +5,8 @@
>>
>> #include <linux/bitmap.h>
>>
>> +#include <generated/xe_device_wa_oob.h>
>> +
>> #include "regs/xe_gsc_regs.h"
>> #include "regs/xe_hw_error_regs.h"
>> #include "regs/xe_irq_regs.h"
>> @@ -15,7 +17,11 @@
>> #include "xe_hw_error.h"
>> #include "xe_mmio.h"
>> #include "xe_pm.h"
>> +#include "xe_ras.h"
>> #include "xe_survivability_mode.h"
>> +#include "xe_wa.h"
>> +#include "xe_wedge.h"
>> +
>>
>> #define GT_HW_ERROR_MAX_ERR_BITS 16
>> #define HEC_UNCORR_FW_ERR_BITS 4
>> @@ -171,7 +177,24 @@ static void hw_error_work(struct work_struct *work)
>> struct xe_tile *tile = container_of(work, typeof(*tile), hw_error_work);
>> struct xe_device *xe = tile_to_xe(tile);
>>
>> + /* Skip hw error processing if device is already wedged */
>> + if (xe_wedged(xe))
>> + return;
>> +
>> guard(xe_pm_runtime)(xe);
>> +
>> + if (xe->info.has_sysctrl && XE_DEVICE_WA(xe, 14028434957)) {
>> + /*
>> + * Skip handling if an uncorrectable internal error is reported as
>> + * reset is imminent
>> + */
>> + if (xe_ras_is_aer_internal_error(xe))
>> + return;
>
> How are we dealing with aer_internal_error variable where on AER path
> we are setting true and reading same variable on different worker
> thread, for example if
>
> we have four tiles then four worker threads are running in parallel.
>
Currently the platform that has sysctrl check has single tile. And
sysctrl responses are serialized.
Also this is a read so don't see a issue
>> +
>> + xe_ras_process_errors(xe);
>
> hmm, we need to handle return of xe_ras_process_error() right?
>
I already responded to this in previous rev
https://lore.kernel.org/intel-xe/b8cc8266-68e2-440d-b87e-d4c7877b9b4a@intel.com/
<https://lore.kernel.org/intel-xe/b8cc8266-68e2-440d-b87e-d4c7877b9b4a@intel.com/>Thanks
Riana
> Thanks
>
> -/Mallesh
>
>> + return;
>> + }
>> +
>> xe_survivability_mode_runtime_enable(xe);
>> }
>>
>> @@ -433,12 +456,12 @@ static void hw_error_source_handler(struct xe_tile *tile, const enum hardware_er
>> return;
>>
>> /*
>> - * Hardware errors are reported through System Controller on the platforms that
>> - * support it, and never routed as direct IRQ to SGUnit. So we should never be
>> - * here for those platforms.
>> + * Non-fatal errors are routed as a direct IRQ on platforms that support
>> + * system controller.
>> */
>> if (xe->info.has_sysctrl) {
>> - drm_err_ratelimited(&xe->drm, HW_ERR "Invalid error routing\n");
>> + drm_err_ratelimited(&xe->drm, HW_ERR "Non-fatal %s reported\n", severity_str);
>> + schedule_work(&tile->hw_error_work);
>> return;
>> }
>>
>> diff --git a/drivers/gpu/drm/xe/xe_pci_error.c b/drivers/gpu/drm/xe/xe_pci_error.c
>> index 4ade392b47be..c27fd22e28ac 100644
>> --- a/drivers/gpu/drm/xe/xe_pci_error.c
>> +++ b/drivers/gpu/drm/xe/xe_pci_error.c
>> @@ -5,14 +5,18 @@
>>
>> #include <linux/pci.h>
>>
>> +#include <generated/xe_device_wa_oob.h>
>> +
>> #include "xe_device.h"
>> #include "xe_gt.h"
>> +#include "xe_hw_error.h"
>> #include "xe_log.h"
>> #include "xe_pci.h"
>> #include "xe_pm.h"
>> #include "xe_printk.h"
>> #include "xe_ras.h"
>> #include "xe_survivability_mode.h"
>> +#include "xe_wa.h"
>> #include "xe_wedge.h"
>>
>> static void prepare_device_for_reset(struct pci_dev *pdev)
>> @@ -90,8 +94,14 @@ static pci_ers_result_t xe_pci_error_detected(struct pci_dev *pdev, pci_channel_
>> if (xe_survivability_mode_is_boot_enabled(xe) || xe_wedged(xe))
>> return PCI_ERS_RESULT_DISCONNECT;
>>
>> - if (is_aer_internal_error(pdev))
>> + /*
>> + * If non-fatal error processing is in progress when uncorrectable internal error occurs,
>> + * flush and disable the worker to prevent further processing, as a reset is imminent.
>> + */
>> + if (XE_DEVICE_WA(xe, 14028434957) && is_aer_internal_error(pdev)) {
>> xe_ras_set_aer_internal_error(xe);
>> + xe_hw_error_work_disable(xe);
>> + }
>>
>> switch (state) {
>> case pci_channel_io_normal:
>> diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
>> index 58a0b5fa676d..1809c3c893de 100644
>> --- a/drivers/gpu/drm/xe/xe_ras.c
>> +++ b/drivers/gpu/drm/xe/xe_ras.c
>> @@ -5,6 +5,8 @@
>>
>> #include <linux/bitfield.h>
>>
>> +#include <generated/xe_device_wa_oob.h>
>> +
>> #include "xe_assert.h"
>> #include "xe_bo.h"
>> #include "xe_configfs.h"
>> @@ -23,6 +25,7 @@
>> #include "xe_sysctrl_mailbox.h"
>> #include "xe_sysctrl_mailbox_types.h"
>> #include "xe_ttm_vram_mgr.h"
>> +#include "xe_wa.h"
>> #include "xe_wedge.h"
>>
>> /* Any non-null entry marks the page as offlined by firmware */
>> @@ -671,8 +674,15 @@ static u8 handle_device_memory_errors(struct xe_device *xe, struct xe_ras_error_
>> DEVICE_MEMORY, &arr->counter, sizeof(arr->counter),
>> "Double-bit ECC error detected at sw address 0x%llx\n",
>> info->sw_address);
>> - if (ret)
>> + /*
>> + * Double-bit ECC errors are non-fatal errors and are reported via IRQ.
>> + * Wedge the device with a bus reset for errors that require SBR to recover.
>> + * TODO: Trigger SBR using pci_reset_bus
>> + */
>> + if (ret) {
>> + xe_wedge_declare(xe, DRM_WEDGE_RECOVERY_BUS_RESET);
>> return XE_RAS_RECOVERY_ACTION_RESET;
>> + }
>> break;
>> default:
>> xe_log_comp(xe, cper_sev, DEVICE_MEMORY, &arr->counter, sizeof(arr->counter),
>> @@ -818,9 +828,16 @@ enum xe_ras_recovery_action xe_ras_process_errors(struct xe_device *xe)
>> return XE_RAS_RECOVERY_ACTION_RECOVERED;
>>
>> BUILD_BUG_ON(BITS_PER_TYPE(sent) < XE_RAS_COMP_MAX);
>> - /* Default action */
>> + /* Default action for PCIe bus errors */
>> final_action = XE_RAS_RECOVERY_ACTION_RECOVERED;
>>
>> + /*
>> + * Device fatal errors are downgraded to non-fatal and reported as an uncorrectable
>> + * internal error. Set the default action to reset.
>> + */
>> + if (XE_DEVICE_WA(xe, 14028434957) && xe_ras_is_aer_internal_error(xe))
>> + final_action = XE_RAS_RECOVERY_ACTION_RESET;
>> +
>> xe_sysctrl_create_command(&command, XE_SYSCTRL_GROUP_GFSP, XE_SYSCTRL_CMD_GET_SOC_ERROR,
>> NULL, 0, &response, sizeof(response));
>>
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH v3 2/7] drm/xe/hw_error: Initialize hw_error_work per tile
2026-11-04 9:31 ` Mallesh, Koujalagi
@ 2026-11-04 12:58 ` Tauro, Riana
0 siblings, 0 replies; 23+ messages in thread
From: Tauro, Riana @ 2026-11-04 12:58 UTC (permalink / raw)
To: Mallesh, Koujalagi, intel-xe
Cc: anshuman.gupta, rodrigo.vivi, aravind.iddamsetty, raag.jadav,
ravi.kishore.koppuravuri, tejas.upadhyay
On 04-11-2026 15:01, Mallesh, Koujalagi wrote:
>
>
> On 03-11-2026 11:39 am, Riana Tauro wrote:
>> Since hw_error_work is now being reused generically, initialize it per tile
>> so that we don't hit uninitialized work for non-root tile. While at it,
>> disable hw_error_work on remove to prevent UAF during unwind.
>>
>> Signed-off-by: Riana Tauro<riana.tauro@intel.com>
>> ---
>> v2: move disable work to xe_device_remove
>> add dgfx and sriov check (Sashiko)
>> ---
>> drivers/gpu/drm/xe/xe_device.c | 3 +++
>> drivers/gpu/drm/xe/xe_hw_error.c | 24 ++++++++++++++++++++++--
>> drivers/gpu/drm/xe/xe_hw_error.h | 1 +
>> 3 files changed, 26 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
>> index 07a7ab6ac083..8f498e3e3e58 100644
>> --- a/drivers/gpu/drm/xe/xe_device.c
>> +++ b/drivers/gpu/drm/xe/xe_device.c
>> @@ -45,6 +45,7 @@
>> #include "xe_guc.h"
>> #include "xe_guc_pc.h"
>> #include "xe_hw_engine_group.h"
>> +#include "xe_hw_error.h"
>> #include "xe_hwmon.h"
>> #include "xe_i2c.h"
>> #include "xe_irq.h"
>> @@ -1118,6 +1119,8 @@ int xe_device_probe(struct xe_device *xe)
>>
>> void xe_device_remove(struct xe_device *xe)
>> {
>> + xe_hw_error_work_disable(xe);
>> +
>> xe_display_unregister(xe);
>>
>> drm_dev_unplug(&xe->drm);
>> diff --git a/drivers/gpu/drm/xe/xe_hw_error.c b/drivers/gpu/drm/xe/xe_hw_error.c
>> index a934b649575c..aaa2437d40bf 100644
>> --- a/drivers/gpu/drm/xe/xe_hw_error.c
>> +++ b/drivers/gpu/drm/xe/xe_hw_error.c
>> @@ -537,6 +537,24 @@ static void process_hw_errors(struct xe_device *xe)
>> }
>> }
>>
>> +/**
>> + * xe_hw_error_work_disable - Disable hw error work
>> + * @xe: xe device instance
>> + *
>> + * This function disables work for hardware error handling for all tiles.
>> + */
>> +void xe_hw_error_work_disable(struct xe_device *xe)
>> +{
>> + struct xe_tile *tile;
>> + u8 id;
>> +
>> + if (!IS_DGFX(xe) || IS_SRIOV_VF(xe))
>> + return;
>> +
>> + for_each_tile(tile, xe, id)
>> + disable_work_sync(&tile->hw_error_work);
>> +}
>> +
>> /**
>> * xe_hw_error_init - Initialize hw errors
>> * @xe: xe device instance
>> @@ -546,12 +564,14 @@ static void process_hw_errors(struct xe_device *xe)
>> */
>> void xe_hw_error_init(struct xe_device *xe)
>> {
>> - struct xe_tile *tile = xe_device_get_root_tile(xe);
>> + struct xe_tile *tile;
>> + u8 id;
>>
>> if (!IS_DGFX(xe) || IS_SRIOV_VF(xe))
>> return;
>>
>> - INIT_WORK(&tile->hw_error_work, hw_error_work);
>> + for_each_tile(tile, xe, id)
>> + INIT_WORK(&tile->hw_error_work, hw_error_work);
>
> What will happen when probe failure occurred after xe_hw_error_ini(),
> how are tile workers cancel?
>
Makes sense. Will add it in xe_device_probe error path
Thanks
Riana
> Thanks,
>
> -/Mallesh
>
>> process_hw_errors(xe);
>> }
>> diff --git a/drivers/gpu/drm/xe/xe_hw_error.h b/drivers/gpu/drm/xe/xe_hw_error.h
>> index 5e3a11424108..944699331a93 100644
>> --- a/drivers/gpu/drm/xe/xe_hw_error.h
>> +++ b/drivers/gpu/drm/xe/xe_hw_error.h
>> @@ -12,4 +12,5 @@ struct xe_device;
>>
>> void xe_hw_error_irq_handler(struct xe_tile *tile, const u32 master_ctl);
>> void xe_hw_error_init(struct xe_device *xe);
>> +void xe_hw_error_work_disable(struct xe_device *xe);
>> #endif
^ permalink raw reply [flat|nested] 23+ messages in thread
end of thread, other threads:[~2026-11-04 12:59 UTC | newest]
Thread overview: 23+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-11-03 6:09 [PATCH v3 0/7] Handle non-fatal errors routed via IRQ Riana Tauro
2026-11-03 6:09 ` [PATCH v3 1/7] drm/xe/hw_error: Reuse CSC worker for generic error handling Riana Tauro
2026-11-03 6:27 ` Mallesh, Koujalagi
2026-11-03 6:09 ` [PATCH v3 2/7] drm/xe/hw_error: Initialize hw_error_work per tile Riana Tauro
2026-11-03 6:23 ` sashiko-bot
2026-11-03 6:42 ` Tauro, Riana
2026-11-04 9:31 ` Mallesh, Koujalagi
2026-11-04 12:58 ` Tauro, Riana
2026-11-03 6:09 ` [PATCH v3 3/7] drm/xe/ras: Treat non-fatal PCIe errors as recovered Riana Tauro
2026-11-03 6:19 ` Mallesh, Koujalagi
2026-11-03 6:09 ` [PATCH v3 4/7] drm/xe/pci: Add upstream switch port lookup helper Riana Tauro
2026-11-03 6:09 ` [PATCH v3 5/7] drm/xe/xe_ras: Add a flag for uncorrectable internal error Riana Tauro
2026-11-03 8:19 ` Mallesh, Koujalagi
2026-11-03 6:09 ` [PATCH v3 6/7] drm/xe: Add support for wa_14028434957 Riana Tauro
2026-11-03 6:33 ` sashiko-bot
2026-11-03 6:45 ` Tauro, Riana
2026-11-04 10:38 ` Mallesh, Koujalagi
2026-11-04 10:44 ` Tauro, Riana
2026-11-03 6:09 ` [PATCH v3 7/7] drm/xe/xe_ras: Skip double-bit ECC page offlining on AER path Riana Tauro
2026-11-03 6:23 ` sashiko-bot
2026-11-03 7:32 ` ✓ CI.KUnit: success for Handle non-fatal errors routed via IRQ (rev3) Patchwork
2026-11-03 8:05 ` ✓ Xe.CI.BAT: " Patchwork
2026-11-03 13:34 ` ✓ Xe.CI.FULL: " Patchwork
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