* [PATCH 0/2] arm64: dts: qcom: Add Samsung Galaxy M52 5G
@ 2026-11-04 18:59 ` Asdlerto Korry
0 siblings, 0 replies; 9+ messages in thread
From: Asdlerto Korry via B4 Relay @ 2026-11-04 18:59 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Abel Vesa, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Kees Cook, Tony Luck,
Guilherme G. Piccoli
Cc: linux-arm-msm, devicetree, linux-kernel, Asdlerto Korry
This series adds initial support for the Samsung Galaxy M52 5G
(SM-M526B, codename m52xq), a smartphone based on the Qualcomm SM7325
SoC.
Tested on next-20261030 with only this series applied: the device boots
to a postmarketOS userspace from UFS. ADSP, MPSS and WPSS come up, WiFi
connects, Venus probes, the microSD card is detected and readable, and
USB peripheral mode works in both plug orientations. The kernel log
shows no errors from the nodes described here. Bluetooth, NFC, IPA
mobile data and the GPU were tested with the same nodes on a 7.1
kernel.
Not included yet: the display panel, touchscreen, cameras, audio, the
fuel gauge/charger and the USB Type-C controller (SM5714). They need
drivers that are not upstream yet. The display works through
simple-framebuffer for now.
Notes:
* The stock ABL picks the DTB by qcom,msm-id/qcom,board-id. These
properties are left out as required for new SM7325 boards, so users
add them when packaging the boot image.
* The reserved memory map follows the stock device tree. The removed
region is larger than on other SM7325 devices (0x5f00000). With the
common size, the kernel livelocks when it touches the memory the
hypervisor keeps.
* Several regulators need a fixed voltage or must stay always-on (UFS
VCC on L7b, the ADSP-managed sensors on L12c). With the stock ranges
Linux sets the minimum and UFS or the ADSP fail.
Signed-off-by: Asdlerto Korry <korryasdlerto@gmail.com>
---
Asdlerto Korry (2):
dt-bindings: arm: qcom: Add Samsung Galaxy M52 5G
arm64: dts: qcom: sm7325: Add Samsung Galaxy M52 5G
Documentation/devicetree/bindings/arm/qcom.yaml | 1 +
arch/arm64/boot/dts/qcom/Makefile | 1 +
arch/arm64/boot/dts/qcom/sm7325-samsung-m52xq.dts | 828 ++++++++++++++++++++++
3 files changed, 830 insertions(+)
---
base-commit: 7649ba73f9e7e1e04d0b46213e39c79ae09dd55c
change-id: 20261104-m52xq-dts-283ce0fcbc49
Best regards,
--
Asdlerto Korry <korryasdlerto@gmail.com>
^ permalink raw reply [flat|nested] 9+ messages in thread* [PATCH 0/2] arm64: dts: qcom: Add Samsung Galaxy M52 5G @ 2026-11-04 18:59 ` Asdlerto Korry 0 siblings, 0 replies; 9+ messages in thread From: Asdlerto Korry @ 2026-11-04 18:59 UTC (permalink / raw) To: Bjorn Andersson, Konrad Dybcio, Abel Vesa, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Kees Cook, Tony Luck, Guilherme G. Piccoli Cc: linux-arm-msm, devicetree, linux-kernel, Asdlerto Korry This series adds initial support for the Samsung Galaxy M52 5G (SM-M526B, codename m52xq), a smartphone based on the Qualcomm SM7325 SoC. Tested on next-20261030 with only this series applied: the device boots to a postmarketOS userspace from UFS. ADSP, MPSS and WPSS come up, WiFi connects, Venus probes, the microSD card is detected and readable, and USB peripheral mode works in both plug orientations. The kernel log shows no errors from the nodes described here. Bluetooth, NFC, IPA mobile data and the GPU were tested with the same nodes on a 7.1 kernel. Not included yet: the display panel, touchscreen, cameras, audio, the fuel gauge/charger and the USB Type-C controller (SM5714). They need drivers that are not upstream yet. The display works through simple-framebuffer for now. Notes: * The stock ABL picks the DTB by qcom,msm-id/qcom,board-id. These properties are left out as required for new SM7325 boards, so users add them when packaging the boot image. * The reserved memory map follows the stock device tree. The removed region is larger than on other SM7325 devices (0x5f00000). With the common size, the kernel livelocks when it touches the memory the hypervisor keeps. * Several regulators need a fixed voltage or must stay always-on (UFS VCC on L7b, the ADSP-managed sensors on L12c). With the stock ranges Linux sets the minimum and UFS or the ADSP fail. Signed-off-by: Asdlerto Korry <korryasdlerto@gmail.com> --- Asdlerto Korry (2): dt-bindings: arm: qcom: Add Samsung Galaxy M52 5G arm64: dts: qcom: sm7325: Add Samsung Galaxy M52 5G Documentation/devicetree/bindings/arm/qcom.yaml | 1 + arch/arm64/boot/dts/qcom/Makefile | 1 + arch/arm64/boot/dts/qcom/sm7325-samsung-m52xq.dts | 828 ++++++++++++++++++++++ 3 files changed, 830 insertions(+) --- base-commit: 7649ba73f9e7e1e04d0b46213e39c79ae09dd55c change-id: 20261104-m52xq-dts-283ce0fcbc49 Best regards, -- Asdlerto Korry <korryasdlerto@gmail.com> ^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 1/2] dt-bindings: arm: qcom: Add Samsung Galaxy M52 5G 2026-11-04 18:59 ` Asdlerto Korry @ 2026-11-04 18:59 ` Asdlerto Korry -1 siblings, 0 replies; 9+ messages in thread From: Asdlerto Korry via B4 Relay @ 2026-11-04 18:59 UTC (permalink / raw) To: Bjorn Andersson, Konrad Dybcio, Abel Vesa, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Kees Cook, Tony Luck, Guilherme G. Piccoli Cc: linux-arm-msm, devicetree, linux-kernel, Asdlerto Korry From: Asdlerto Korry <korryasdlerto@gmail.com> Document the Samsung Galaxy M52 5G (samsung,m52xq) smartphone, which is based on the Qualcomm SM7325 SoC. Signed-off-by: Asdlerto Korry <korryasdlerto@gmail.com> --- Documentation/devicetree/bindings/arm/qcom.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index 121ca557ce1e..fff2be0ecb47 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -1124,6 +1124,7 @@ properties: - enum: - motorola,dubai - nothing,spacewar + - samsung,m52xq - xiaomi,lisa - xiaomi,taoyao - const: qcom,sm7325 -- 2.25.1 ^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 1/2] dt-bindings: arm: qcom: Add Samsung Galaxy M52 5G @ 2026-11-04 18:59 ` Asdlerto Korry 0 siblings, 0 replies; 9+ messages in thread From: Asdlerto Korry @ 2026-11-04 18:59 UTC (permalink / raw) To: Bjorn Andersson, Konrad Dybcio, Abel Vesa, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Kees Cook, Tony Luck, Guilherme G. Piccoli Cc: linux-arm-msm, devicetree, linux-kernel, Asdlerto Korry Document the Samsung Galaxy M52 5G (samsung,m52xq) smartphone, which is based on the Qualcomm SM7325 SoC. Signed-off-by: Asdlerto Korry <korryasdlerto@gmail.com> --- Documentation/devicetree/bindings/arm/qcom.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index 121ca557ce1e..fff2be0ecb47 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -1124,6 +1124,7 @@ properties: - enum: - motorola,dubai - nothing,spacewar + - samsung,m52xq - xiaomi,lisa - xiaomi,taoyao - const: qcom,sm7325 -- 2.25.1 ^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 2/2] arm64: dts: qcom: sm7325: Add Samsung Galaxy M52 5G 2026-11-04 18:59 ` Asdlerto Korry @ 2026-11-04 18:59 ` Asdlerto Korry -1 siblings, 0 replies; 9+ messages in thread From: Asdlerto Korry via B4 Relay @ 2026-11-04 18:59 UTC (permalink / raw) To: Bjorn Andersson, Konrad Dybcio, Abel Vesa, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Kees Cook, Tony Luck, Guilherme G. Piccoli Cc: linux-arm-msm, devicetree, linux-kernel, Asdlerto Korry From: Asdlerto Korry <korryasdlerto@gmail.com> Add the device tree for the Samsung Galaxy M52 5G (samsung,m52xq) smartphone, which is based on the SM7325 SoC. Supported features are, as of now: * UFS * USB (peripheral) * microSD card slot * Display via simple-framebuffer * Power & volume buttons * Remoteprocs (ADSP, MPSS, WPSS) * WiFi & Bluetooth (WCN6750) * IPA * Venus video decoding/encoding * NFC (Samsung S3FWRN5) * Vibrator * GPU (with zap shader) * PMK8350 ADC thermistor, ramoops * Regulators, i2c, uart, gpi dma Signed-off-by: Asdlerto Korry <korryasdlerto@gmail.com> --- arch/arm64/boot/dts/qcom/Makefile | 1 + arch/arm64/boot/dts/qcom/sm7325-samsung-m52xq.dts | 828 ++++++++++++++++++++++ 2 files changed, 829 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index 88230c4e00ea..a1c1a7368887 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -401,6 +401,7 @@ dtb-$(CONFIG_ARCH_QCOM) += sm7325-motorola-dubai.dtb dtb-$(CONFIG_ARCH_QCOM) += sm7325-motorola-dubai-csot.dtb dtb-$(CONFIG_ARCH_QCOM) += sm7325-motorola-dubai-tianma.dtb dtb-$(CONFIG_ARCH_QCOM) += sm7325-nothing-spacewar.dtb +dtb-$(CONFIG_ARCH_QCOM) += sm7325-samsung-m52xq.dtb dtb-$(CONFIG_ARCH_QCOM) += sm7325-xiaomi-lisa.dtb dtb-$(CONFIG_ARCH_QCOM) += sm7325-xiaomi-taoyao.dtb dtb-$(CONFIG_ARCH_QCOM) += sm8150-hdk.dtb diff --git a/arch/arm64/boot/dts/qcom/sm7325-samsung-m52xq.dts b/arch/arm64/boot/dts/qcom/sm7325-samsung-m52xq.dts new file mode 100644 index 000000000000..5ba9623df6c4 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sm7325-samsung-m52xq.dts @@ -0,0 +1,828 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2026, Asdlerto Korry <korryasdlerto@gmail.com> + */ + +/dts-v1/; + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/iio/qcom,spmi-adc7-pm7325.h> +#include <dt-bindings/input/linux-event-codes.h> +#include <dt-bindings/pinctrl/qcom,pmic-gpio.h> +#include <dt-bindings/regulator/qcom,rpmh-regulator.h> + +#include "sm7325.dtsi" +#include "pm7325.dtsi" +#include "pm8350c.dtsi" /* PM7350C */ +#include "pmk8350.dtsi" /* PMK7325 */ + +/* The following reserved memory regions have different addresses or sizes */ +/delete-node/ &adsp_mem; +/delete-node/ &rmtfs_mem; + +/ { + model = "Samsung Galaxy M52 5G"; + compatible = "samsung,m52xq", "qcom,sm7325"; + chassis-type = "handset"; + + aliases { + serial1 = &uart7; + }; + + chosen { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + framebuffer0: framebuffer@e1000000 { + compatible = "simple-framebuffer"; + reg = <0x0 0xe1000000 0x0 (1080 * 2400 * 4)>; + width = <1080>; + height = <2400>; + stride = <(1080 * 4)>; + format = "a8r8g8b8"; + memory-region = <&splash_mem>; + + clocks = <&gcc GCC_DISP_HF_AXI_CLK>, + <&dispcc DISP_CC_MDSS_MDP_CLK>, + <&dispcc DISP_CC_MDSS_BYTE0_CLK>, + <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>, + <&dispcc DISP_CC_MDSS_PCLK0_CLK>, + <&dispcc DISP_CC_MDSS_VSYNC_CLK>; + power-domains = <&dispcc DISP_CC_MDSS_CORE_GDSC>; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + + pinctrl-0 = <&volume_up_default>; + pinctrl-names = "default"; + + key-volume-up { + label = "Volume Up"; + gpios = <&pm7325_gpios 6 GPIO_ACTIVE_LOW>; + linux,code = <KEY_VOLUMEUP>; + debounce-interval = <15>; + }; + }; + + reserved-memory { + cdsp_secure_heap_mem: cdsp-secure-heap@81800000 { + reg = <0x0 0x81800000 0x0 0x1e00000>; + no-map; + }; + + adsp_mem: adsp@86700000 { + reg = <0x0 0x86700000 0x0 0x4800000>; + no-map; + }; + + /* Mainline video_mem is downstream cvp_mem */ + real_video_mem: video@8ad00000 { + reg = <0x0 0x8ad00000 0x0 0x500000>; + no-map; + }; + + ipa_gsi_mem: ipa-gsi@8b710000 { + reg = <0x0 0x8b710000 0x0 0xa000>; + no-map; + }; + + rmtfs_mem: rmtfs@9c900000 { + compatible = "qcom,rmtfs-mem"; + reg = <0x0 0x9c900000 0x0 0x280000>; + no-map; + + qcom,client-id = <1>; + qcom,vmid = <QCOM_SCM_VMID_MSS_MSA>, + <QCOM_SCM_VMID_NAV>; + }; + + /* Larger than on other SM7325 devices, the stock DT carves out 0x5f00000 */ + removed_mem: removed@c0000000 { + reg = <0x0 0xc0000000 0x0 0x5f00000>; + no-map; + }; + + pil_trustedvm_mem: pil-trustedvm-region@d0800000 { + reg = <0x0 0xd0800000 0x0 0x76f7000>; + no-map; + }; + + qrtr_shmem: qrtr-shmem@d7ef7000 { + reg = <0x0 0xd7ef7000 0x0 0x9000>; + no-map; + }; + + neuron_block_0_mem: neuron-block@d7f00000 { + reg = <0x0 0xd7f00000 0x0 0x80000>; + no-map; + }; + + neuron_block_1_mem: neuron-block@d7f80000 { + reg = <0x0 0xd7f80000 0x0 0x80000>; + no-map; + }; + + ramoops@f0b00000 { + compatible = "ramoops"; + reg = <0x0 0xf0b00000 0x0 0x100000>; + record-size = <0x40000>; + console-size = <0x40000>; + ftrace-size = <0x40000>; + pmsg-size = <0x40000>; + }; + + /* ABL looks this node up by name to update the splash region */ + splash_mem: splash_region@e1000000 { + reg = <0x0 0xe1000000 0x0 0x2300000>; + no-map; + }; + + dfps_data_mem: dfps-data@e3300000 { + reg = <0x0 0xe3300000 0x0 0x100000>; + no-map; + }; + }; + + /* NFC chip power, switched by TLMM 42 (no consumer property in the binding) */ + vreg_nfc_pvdd: regulator-nfc-pvdd { + compatible = "regulator-fixed"; + regulator-name = "nfc_pvdd"; + gpio = <&tlmm 42 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + }; + + /* Coin DC motor, TLMM 62 switches its external LDO */ + vibrator { + compatible = "gpio-vibrator"; + enable-gpios = <&tlmm 62 GPIO_ACTIVE_HIGH>; + + pinctrl-0 = <&motor_en_default>; + pinctrl-names = "default"; + }; + + vph_pwr: vph-pwr-regulator { + compatible = "regulator-fixed"; + regulator-name = "vph_pwr"; + regulator-min-microvolt = <3700000>; + regulator-max-microvolt = <3700000>; + }; + + /* + * The arch_timer label is unused here, but is required by ABL: the + * Gunyah overlay it applies references it, the boot fails without it. + */ + arch_timer: timer { }; +}; + +&apps_rsc { + regulators-0 { + compatible = "qcom,pm7325-rpmh-regulators"; + qcom,pmic-id = "b"; + + vdd-s1-supply = <&vph_pwr>; + vdd-s2-supply = <&vph_pwr>; + vdd-s7-supply = <&vph_pwr>; + vdd-s8-supply = <&vph_pwr>; + + vdd-l1-l4-l12-l15-supply = <&vreg_s7b_0p972>; + vdd-l2-l7-supply = <&vreg_bob>; + vdd-l6-l9-l10-supply = <&vreg_s8b_1p272>; + vdd-l8-supply = <&vreg_s7b_0p972>; + vdd-l11-l17-l18-l19-supply = <&vreg_s1b_1p872>; + vdd-l13-supply = <&vreg_s7b_0p972>; + vdd-l14-l16-supply = <&vreg_s8b_1p272>; + + vreg_s1b_1p872: smps1 { + regulator-name = "vreg_s1b_1p872"; + regulator-min-microvolt = <1840000>; + regulator-max-microvolt = <2040000>; + }; + + vreg_s7b_0p972: smps7 { + regulator-name = "vreg_s7b_0p972"; + regulator-min-microvolt = <535000>; + regulator-max-microvolt = <1120000>; + }; + + vreg_s8b_1p272: smps8 { + regulator-name = "vreg_s8b_1p272"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1500000>; + }; + + vreg_l1b_0p912: ldo1 { + regulator-name = "vreg_l1b_0p912"; + regulator-min-microvolt = <825000>; + regulator-max-microvolt = <925000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l2b_3p072: ldo2 { + regulator-name = "vreg_l2b_3p072"; + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <3544000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l3b_0p504: ldo3 { + regulator-name = "vreg_l3b_0p504"; + regulator-min-microvolt = <312000>; + regulator-max-microvolt = <910000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l6b_1p2: ldo6 { + regulator-name = "vreg_l6b_1p2"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1260000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + regulator-allow-set-load; + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM + RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l7b_2p952: ldo7 { + regulator-name = "vreg_l7b_2p952"; + regulator-min-microvolt = <2952000>; + regulator-max-microvolt = <2952000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + regulator-allow-set-load; + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM + RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l8b_0p904: ldo8 { + regulator-name = "vreg_l8b_0p904"; + regulator-min-microvolt = <870000>; + regulator-max-microvolt = <970000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l9b_1p2: ldo9 { + regulator-name = "vreg_l9b_1p2"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1304000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + regulator-allow-set-load; + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM + RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l11b_1p504: ldo11 { + regulator-name = "vreg_l11b_1p504"; + regulator-min-microvolt = <1504000>; + regulator-max-microvolt = <2000000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l12b_0p751: ldo12 { + regulator-name = "vreg_l12b_0p751"; + regulator-min-microvolt = <751000>; + regulator-max-microvolt = <824000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l13b_0p53: ldo13 { + regulator-name = "vreg_l13b_0p53"; + regulator-min-microvolt = <530000>; + regulator-max-microvolt = <824000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l14b_1p08: ldo14 { + regulator-name = "vreg_l14b_1p08"; + regulator-min-microvolt = <1080000>; + regulator-max-microvolt = <1304000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l15b_0p765: ldo15 { + regulator-name = "vreg_l15b_0p765"; + regulator-min-microvolt = <765000>; + regulator-max-microvolt = <1020000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l16b_1p1: ldo16 { + regulator-name = "vreg_l16b_1p1"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1300000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l17b_1p7: ldo17 { + regulator-name = "vreg_l17b_1p7"; + regulator-min-microvolt = <1700000>; + regulator-max-microvolt = <1900000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l18b_1p8: ldo18 { + regulator-name = "vreg_l18b_1p8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2000000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l19b_1p8: ldo19 { + regulator-name = "vreg_l19b_1p8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2000000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + }; + + regulators-1 { + compatible = "qcom,pm8350c-rpmh-regulators"; + qcom,pmic-id = "c"; + + vdd-s1-supply = <&vph_pwr>; + vdd-s2-supply = <&vph_pwr>; + vdd-s5-supply = <&vph_pwr>; + vdd-s7-supply = <&vph_pwr>; + vdd-s9-supply = <&vph_pwr>; + vdd-s10-supply = <&vph_pwr>; + + vdd-l1-l12-supply = <&vreg_s1b_1p872>; + vdd-l2-l8-supply = <&vreg_s1b_1p872>; + vdd-l3-l4-l5-l7-l13-supply = <&vreg_bob>; + vdd-l6-l9-l11-supply = <&vreg_bob>; + vdd-l10-supply = <&vreg_s7b_0p972>; + vdd-bob-supply = <&vph_pwr>; + + vreg_s1c_2p19: smps1 { + regulator-name = "vreg_s1c_2p19"; + regulator-min-microvolt = <2190000>; + regulator-max-microvolt = <2210000>; + }; + + vreg_s9c_1p084: smps9 { + regulator-name = "vreg_s9c_1p084"; + regulator-min-microvolt = <1010000>; + regulator-max-microvolt = <1170000>; + }; + + vreg_l1c_1p8: ldo1 { + regulator-name = "vreg_l1c_1p8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1980000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l2c_1p62: ldo2 { + regulator-name = "vreg_l2c_1p62"; + regulator-min-microvolt = <1620000>; + regulator-max-microvolt = <1980000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l3c_2p8: ldo3 { + regulator-name = "vreg_l3c_2p8"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <3540000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l4c_1p62: ldo4 { + regulator-name = "vreg_l4c_1p62"; + regulator-min-microvolt = <1620000>; + regulator-max-microvolt = <3300000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l5c_1p62: ldo5 { + regulator-name = "vreg_l5c_1p62"; + regulator-min-microvolt = <1620000>; + regulator-max-microvolt = <3300000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l6c_2p96: ldo6 { + regulator-name = "vreg_l6c_2p96"; + regulator-min-microvolt = <1650000>; + regulator-max-microvolt = <3544000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l7c_3p0: ldo7 { + regulator-name = "vreg_l7c_3p0"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3544000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l8c_1p62: ldo8 { + regulator-name = "vreg_l8c_1p62"; + regulator-min-microvolt = <1620000>; + regulator-max-microvolt = <2000000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l9c_2p96: ldo9 { + regulator-name = "vreg_l9c_2p96"; + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <3544000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l10c_0p88: ldo10 { + regulator-name = "vreg_l10c_0p88"; + regulator-min-microvolt = <880000>; + regulator-max-microvolt = <1050000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + regulator-allow-set-load; + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM + RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l11c_2p8: ldo11 { + regulator-name = "vreg_l11c_2p8"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <3544000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + /* Sensors behind the ADSP (accelerometer, light, proximity) */ + vreg_l12c_1p65: ldo12 { + regulator-name = "vreg_l12c_1p65"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2000000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + regulator-always-on; + }; + + vreg_l13c_2p7: ldo13 { + regulator-name = "vreg_l13c_2p7"; + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <3544000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_bob: bob { + regulator-name = "vreg_bob"; + regulator-min-microvolt = <3008000>; + regulator-max-microvolt = <3960000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + }; + + regulators-2 { + compatible = "qcom,pmr735a-rpmh-regulators"; + qcom,pmic-id = "e"; + + vreg_l2e_1p2: ldo2 { + regulator-name = "vreg_l2e_1p2"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l3e_0p912: ldo3 { + regulator-name = "vreg_l3e_0p912"; + regulator-min-microvolt = <912000>; + regulator-max-microvolt = <1020000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l4e_1p776: ldo4 { + regulator-name = "vreg_l4e_1p776"; + regulator-min-microvolt = <1776000>; + regulator-max-microvolt = <1890000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l5e_0p8: ldo5 { + regulator-name = "vreg_l5e_0p8"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <800000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l6e_0p48: ldo6 { + regulator-name = "vreg_l6e_0p48"; + regulator-min-microvolt = <480000>; + regulator-max-microvolt = <904000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + }; +}; + +&gcc { + protected-clocks = <GCC_CFG_NOC_LPASS_CLK>, + <GCC_MSS_CFG_AHB_CLK>, + <GCC_MSS_OFFLINE_AXI_CLK>, + <GCC_MSS_Q6SS_BOOT_CLK_SRC>, + <GCC_MSS_Q6_MEMNOC_AXI_CLK>, + <GCC_MSS_SNOC_AXI_CLK>, + <GCC_QSPI_CNOC_PERIPH_AHB_CLK>, + <GCC_QSPI_CORE_CLK>, + <GCC_QSPI_CORE_CLK_SRC>, + <GCC_SEC_CTRL_CLK_SRC>, + <GCC_WPSS_AHB_BDG_MST_CLK>, + <GCC_WPSS_AHB_CLK>, + <GCC_WPSS_RSCP_CLK>; +}; + +&gpi_dma1 { + status = "okay"; +}; + +&gpu { + status = "okay"; +}; + +&gpu_zap_shader { + firmware-name = "qcom/sm7325/samsung/m52xq/a660_zap.mbn"; +}; + +&i2c9 { + clock-frequency = <100000>; + + status = "okay"; + + nfc@27 { + compatible = "samsung,s3fwrn5-i2c"; + reg = <0x27>; + + interrupts-extended = <&tlmm 41 IRQ_TYPE_LEVEL_HIGH>; + + en-gpios = <&tlmm 38 GPIO_ACTIVE_HIGH>; + wake-gpios = <&tlmm 40 GPIO_ACTIVE_HIGH>; + }; +}; + +&ipa { + /* the IPA firmware goes to the Samsung IPA GSI PIL region */ + memory-region = <&ipa_gsi_mem>; + firmware-name = "qcom/sm7325/samsung/m52xq/ipa_fws.mbn"; + + status = "okay"; +}; + +&lpass_audiocc { + compatible = "qcom,qcm6490-lpassaudiocc"; + /delete-property/ power-domains; +}; + +&pm7325_gpios { + volume_up_default: volume-up-default-state { + pins = "gpio6"; + function = PMIC_GPIO_FUNC_NORMAL; + power-source = <1>; + bias-pull-up; + input-enable; + }; +}; + +&pmk8350_vadc { + /* battery NTC */ + channel@14b { + reg = <PM7325_ADC7_GPIO2_100K_PU>; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + label = "pm7325_bat_therm"; + }; +}; + +&pon_pwrkey { + status = "okay"; +}; + +&pon_resin { + linux,code = <KEY_VOLUMEDOWN>; + + status = "okay"; +}; + +&qupv3_id_1 { + status = "okay"; +}; + +&qup_uart7_cts { + drive-strength = <2>; + bias-disable; +}; + +&qup_uart7_rts { + drive-strength = <2>; + bias-pull-down; +}; + +&qup_uart7_rx { + drive-strength = <2>; + bias-disable; +}; + +&qup_uart7_tx { + drive-strength = <2>; + bias-pull-up; +}; + +&remoteproc_adsp { + firmware-name = "qcom/sm7325/samsung/m52xq/adsp.mbn"; + + status = "okay"; +}; + +&remoteproc_mpss { + firmware-name = "qcom/sm7325/samsung/m52xq/modem.mbn"; + + status = "okay"; +}; + +&remoteproc_wpss { + firmware-name = "qcom/sm7325/samsung/m52xq/wpss.mbn"; + + status = "okay"; +}; + +&sdc2_clk { + drive-strength = <16>; + bias-disable; +}; + +&sdc2_cmd { + drive-strength = <10>; + bias-pull-up; +}; + +&sdc2_data { + drive-strength = <10>; + bias-pull-up; +}; + +&sdhc_2 { + cd-gpios = <&tlmm 91 GPIO_ACTIVE_LOW>; + + pinctrl-0 = <&sdc2_clk>, <&sdc2_cmd>, <&sdc2_data>, <&sd_cd_default>; + pinctrl-1 = <&sdc2_clk_sleep>, <&sdc2_cmd_sleep>, <&sdc2_data_sleep>, <&sd_cd_default>; + + vmmc-supply = <&vreg_l9c_2p96>; + vqmmc-supply = <&vreg_l6c_2p96>; + + status = "okay"; +}; + +&tlmm { + gpio-reserved-ranges = <56 4>; /* SPI (fingerprint reader) */ + + bluetooth_enable_default: bluetooth-enable-default-state { + pins = "gpio85"; + function = "gpio"; + drive-strength = <2>; + output-low; + bias-pull-down; + }; + + motor_en_default: motor-en-default-state { + pins = "gpio62"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + qup_uart7_sleep_cts: qup-uart7-sleep-cts-state { + pins = "gpio28"; + function = "gpio"; + /* + * Configure a bias-bus-hold on CTS to lower power + * usage when Bluetooth is turned off. Bus hold will + * maintain a low power state regardless of whether + * the Bluetooth module drives the pin in either + * direction or leaves the pin fully unpowered. + */ + bias-bus-hold; + }; + + qup_uart7_sleep_rts: qup-uart7-sleep-rts-state { + pins = "gpio29"; + function = "gpio"; + /* + * Configure pull-down on RTS. As RTS is active low + * signal, pull it low to indicate the BT SoC that it + * can wakeup the system anytime from suspend state by + * pulling RX low (by sending wakeup bytes). + */ + bias-pull-down; + }; + + qup_uart7_sleep_tx: qup-uart7-sleep-tx-state { + pins = "gpio30"; + function = "gpio"; + /* + * Configure pull-up on TX when it isn't actively driven + * to prevent BT SoC from receiving garbage during sleep. + */ + bias-pull-up; + }; + + qup_uart7_sleep_rx: qup-uart7-sleep-rx-state { + pins = "gpio31"; + function = "gpio"; + /* + * Configure a pull-up on RX. This is needed to avoid + * garbage data when the TX pin of the Bluetooth module + * is floating which may cause spurious wakeups. + */ + bias-pull-up; + }; + + sd_cd_default: sd-cd-default-state { + pins = "gpio91"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + sw_ctrl_default: sw-ctrl-default-state { + pins = "gpio86"; + function = "gpio"; + bias-pull-down; + }; +}; + +&uart7 { + /delete-property/ interrupts; + interrupts-extended = <&intc GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>, + <&tlmm 31 IRQ_TYPE_EDGE_FALLING>; + + pinctrl-1 = <&qup_uart7_sleep_cts>, <&qup_uart7_sleep_rts>, + <&qup_uart7_sleep_tx>, <&qup_uart7_sleep_rx>; + pinctrl-names = "default", "sleep"; + + status = "okay"; + + bluetooth: bluetooth { + compatible = "qcom,wcn6750-bt"; + + pinctrl-0 = <&bluetooth_enable_default>, <&sw_ctrl_default>; + pinctrl-names = "default"; + + enable-gpios = <&tlmm 85 GPIO_ACTIVE_HIGH>; + swctrl-gpios = <&tlmm 86 GPIO_ACTIVE_HIGH>; + + vddio-supply = <&vreg_l19b_1p8>; + vddaon-supply = <&vreg_s7b_0p972>; + vddbtcxmx-supply = <&vreg_s7b_0p972>; + vddrfacmn-supply = <&vreg_s7b_0p972>; + vddrfa0p8-supply = <&vreg_s7b_0p972>; + vddrfa1p7-supply = <&vreg_s1b_1p872>; + vddrfa1p2-supply = <&vreg_s7b_0p972>; + vddrfa2p2-supply = <&vreg_s8b_1p272>; + vddasd-supply = <&vreg_l11c_2p8>; + + max-speed = <3200000>; + }; +}; + +&ufs_mem_hc { + reset-gpios = <&tlmm 175 GPIO_ACTIVE_LOW>; + + vcc-supply = <&vreg_l7b_2p952>; + vcc-max-microamp = <800000>; + vccq-supply = <&vreg_l9b_1p2>; + vccq-max-microamp = <900000>; + + status = "okay"; +}; + +&ufs_mem_phy { + vdda-phy-supply = <&vreg_l10c_0p88>; + vdda-pll-supply = <&vreg_l6b_1p2>; + + status = "okay"; +}; + +&usb_1 { + dr_mode = "peripheral"; + maximum-speed = "high-speed"; + phys = <&usb_1_hsphy>; + phy-names = "usb2-phy"; + qcom,select-utmi-as-pipe-clk; + + status = "okay"; +}; + +&usb_1_hsphy { + vdda-pll-supply = <&vreg_l10c_0p88>; + vdda18-supply = <&vreg_l1c_1p8>; + vdda33-supply = <&vreg_l2b_3p072>; + + status = "okay"; +}; + +&venus { + firmware-name = "qcom/sm7325/samsung/m52xq/venus.mbn"; + + status = "okay"; +}; + +&wifi { + status = "okay"; +}; -- 2.25.1 ^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 2/2] arm64: dts: qcom: sm7325: Add Samsung Galaxy M52 5G @ 2026-11-04 18:59 ` Asdlerto Korry 0 siblings, 0 replies; 9+ messages in thread From: Asdlerto Korry @ 2026-11-04 18:59 UTC (permalink / raw) To: Bjorn Andersson, Konrad Dybcio, Abel Vesa, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Kees Cook, Tony Luck, Guilherme G. Piccoli Cc: linux-arm-msm, devicetree, linux-kernel, Asdlerto Korry Add the device tree for the Samsung Galaxy M52 5G (samsung,m52xq) smartphone, which is based on the SM7325 SoC. Supported features are, as of now: * UFS * USB (peripheral) * microSD card slot * Display via simple-framebuffer * Power & volume buttons * Remoteprocs (ADSP, MPSS, WPSS) * WiFi & Bluetooth (WCN6750) * IPA * Venus video decoding/encoding * NFC (Samsung S3FWRN5) * Vibrator * GPU (with zap shader) * PMK8350 ADC thermistor, ramoops * Regulators, i2c, uart, gpi dma Signed-off-by: Asdlerto Korry <korryasdlerto@gmail.com> --- arch/arm64/boot/dts/qcom/Makefile | 1 + arch/arm64/boot/dts/qcom/sm7325-samsung-m52xq.dts | 828 ++++++++++++++++++++++ 2 files changed, 829 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index 88230c4e00ea..a1c1a7368887 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -401,6 +401,7 @@ dtb-$(CONFIG_ARCH_QCOM) += sm7325-motorola-dubai.dtb dtb-$(CONFIG_ARCH_QCOM) += sm7325-motorola-dubai-csot.dtb dtb-$(CONFIG_ARCH_QCOM) += sm7325-motorola-dubai-tianma.dtb dtb-$(CONFIG_ARCH_QCOM) += sm7325-nothing-spacewar.dtb +dtb-$(CONFIG_ARCH_QCOM) += sm7325-samsung-m52xq.dtb dtb-$(CONFIG_ARCH_QCOM) += sm7325-xiaomi-lisa.dtb dtb-$(CONFIG_ARCH_QCOM) += sm7325-xiaomi-taoyao.dtb dtb-$(CONFIG_ARCH_QCOM) += sm8150-hdk.dtb diff --git a/arch/arm64/boot/dts/qcom/sm7325-samsung-m52xq.dts b/arch/arm64/boot/dts/qcom/sm7325-samsung-m52xq.dts new file mode 100644 index 000000000000..5ba9623df6c4 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sm7325-samsung-m52xq.dts @@ -0,0 +1,828 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2026, Asdlerto Korry <korryasdlerto@gmail.com> + */ + +/dts-v1/; + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/iio/qcom,spmi-adc7-pm7325.h> +#include <dt-bindings/input/linux-event-codes.h> +#include <dt-bindings/pinctrl/qcom,pmic-gpio.h> +#include <dt-bindings/regulator/qcom,rpmh-regulator.h> + +#include "sm7325.dtsi" +#include "pm7325.dtsi" +#include "pm8350c.dtsi" /* PM7350C */ +#include "pmk8350.dtsi" /* PMK7325 */ + +/* The following reserved memory regions have different addresses or sizes */ +/delete-node/ &adsp_mem; +/delete-node/ &rmtfs_mem; + +/ { + model = "Samsung Galaxy M52 5G"; + compatible = "samsung,m52xq", "qcom,sm7325"; + chassis-type = "handset"; + + aliases { + serial1 = &uart7; + }; + + chosen { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + framebuffer0: framebuffer@e1000000 { + compatible = "simple-framebuffer"; + reg = <0x0 0xe1000000 0x0 (1080 * 2400 * 4)>; + width = <1080>; + height = <2400>; + stride = <(1080 * 4)>; + format = "a8r8g8b8"; + memory-region = <&splash_mem>; + + clocks = <&gcc GCC_DISP_HF_AXI_CLK>, + <&dispcc DISP_CC_MDSS_MDP_CLK>, + <&dispcc DISP_CC_MDSS_BYTE0_CLK>, + <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>, + <&dispcc DISP_CC_MDSS_PCLK0_CLK>, + <&dispcc DISP_CC_MDSS_VSYNC_CLK>; + power-domains = <&dispcc DISP_CC_MDSS_CORE_GDSC>; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + + pinctrl-0 = <&volume_up_default>; + pinctrl-names = "default"; + + key-volume-up { + label = "Volume Up"; + gpios = <&pm7325_gpios 6 GPIO_ACTIVE_LOW>; + linux,code = <KEY_VOLUMEUP>; + debounce-interval = <15>; + }; + }; + + reserved-memory { + cdsp_secure_heap_mem: cdsp-secure-heap@81800000 { + reg = <0x0 0x81800000 0x0 0x1e00000>; + no-map; + }; + + adsp_mem: adsp@86700000 { + reg = <0x0 0x86700000 0x0 0x4800000>; + no-map; + }; + + /* Mainline video_mem is downstream cvp_mem */ + real_video_mem: video@8ad00000 { + reg = <0x0 0x8ad00000 0x0 0x500000>; + no-map; + }; + + ipa_gsi_mem: ipa-gsi@8b710000 { + reg = <0x0 0x8b710000 0x0 0xa000>; + no-map; + }; + + rmtfs_mem: rmtfs@9c900000 { + compatible = "qcom,rmtfs-mem"; + reg = <0x0 0x9c900000 0x0 0x280000>; + no-map; + + qcom,client-id = <1>; + qcom,vmid = <QCOM_SCM_VMID_MSS_MSA>, + <QCOM_SCM_VMID_NAV>; + }; + + /* Larger than on other SM7325 devices, the stock DT carves out 0x5f00000 */ + removed_mem: removed@c0000000 { + reg = <0x0 0xc0000000 0x0 0x5f00000>; + no-map; + }; + + pil_trustedvm_mem: pil-trustedvm-region@d0800000 { + reg = <0x0 0xd0800000 0x0 0x76f7000>; + no-map; + }; + + qrtr_shmem: qrtr-shmem@d7ef7000 { + reg = <0x0 0xd7ef7000 0x0 0x9000>; + no-map; + }; + + neuron_block_0_mem: neuron-block@d7f00000 { + reg = <0x0 0xd7f00000 0x0 0x80000>; + no-map; + }; + + neuron_block_1_mem: neuron-block@d7f80000 { + reg = <0x0 0xd7f80000 0x0 0x80000>; + no-map; + }; + + ramoops@f0b00000 { + compatible = "ramoops"; + reg = <0x0 0xf0b00000 0x0 0x100000>; + record-size = <0x40000>; + console-size = <0x40000>; + ftrace-size = <0x40000>; + pmsg-size = <0x40000>; + }; + + /* ABL looks this node up by name to update the splash region */ + splash_mem: splash_region@e1000000 { + reg = <0x0 0xe1000000 0x0 0x2300000>; + no-map; + }; + + dfps_data_mem: dfps-data@e3300000 { + reg = <0x0 0xe3300000 0x0 0x100000>; + no-map; + }; + }; + + /* NFC chip power, switched by TLMM 42 (no consumer property in the binding) */ + vreg_nfc_pvdd: regulator-nfc-pvdd { + compatible = "regulator-fixed"; + regulator-name = "nfc_pvdd"; + gpio = <&tlmm 42 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + }; + + /* Coin DC motor, TLMM 62 switches its external LDO */ + vibrator { + compatible = "gpio-vibrator"; + enable-gpios = <&tlmm 62 GPIO_ACTIVE_HIGH>; + + pinctrl-0 = <&motor_en_default>; + pinctrl-names = "default"; + }; + + vph_pwr: vph-pwr-regulator { + compatible = "regulator-fixed"; + regulator-name = "vph_pwr"; + regulator-min-microvolt = <3700000>; + regulator-max-microvolt = <3700000>; + }; + + /* + * The arch_timer label is unused here, but is required by ABL: the + * Gunyah overlay it applies references it, the boot fails without it. + */ + arch_timer: timer { }; +}; + +&apps_rsc { + regulators-0 { + compatible = "qcom,pm7325-rpmh-regulators"; + qcom,pmic-id = "b"; + + vdd-s1-supply = <&vph_pwr>; + vdd-s2-supply = <&vph_pwr>; + vdd-s7-supply = <&vph_pwr>; + vdd-s8-supply = <&vph_pwr>; + + vdd-l1-l4-l12-l15-supply = <&vreg_s7b_0p972>; + vdd-l2-l7-supply = <&vreg_bob>; + vdd-l6-l9-l10-supply = <&vreg_s8b_1p272>; + vdd-l8-supply = <&vreg_s7b_0p972>; + vdd-l11-l17-l18-l19-supply = <&vreg_s1b_1p872>; + vdd-l13-supply = <&vreg_s7b_0p972>; + vdd-l14-l16-supply = <&vreg_s8b_1p272>; + + vreg_s1b_1p872: smps1 { + regulator-name = "vreg_s1b_1p872"; + regulator-min-microvolt = <1840000>; + regulator-max-microvolt = <2040000>; + }; + + vreg_s7b_0p972: smps7 { + regulator-name = "vreg_s7b_0p972"; + regulator-min-microvolt = <535000>; + regulator-max-microvolt = <1120000>; + }; + + vreg_s8b_1p272: smps8 { + regulator-name = "vreg_s8b_1p272"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1500000>; + }; + + vreg_l1b_0p912: ldo1 { + regulator-name = "vreg_l1b_0p912"; + regulator-min-microvolt = <825000>; + regulator-max-microvolt = <925000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l2b_3p072: ldo2 { + regulator-name = "vreg_l2b_3p072"; + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <3544000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l3b_0p504: ldo3 { + regulator-name = "vreg_l3b_0p504"; + regulator-min-microvolt = <312000>; + regulator-max-microvolt = <910000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l6b_1p2: ldo6 { + regulator-name = "vreg_l6b_1p2"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1260000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + regulator-allow-set-load; + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM + RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l7b_2p952: ldo7 { + regulator-name = "vreg_l7b_2p952"; + regulator-min-microvolt = <2952000>; + regulator-max-microvolt = <2952000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + regulator-allow-set-load; + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM + RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l8b_0p904: ldo8 { + regulator-name = "vreg_l8b_0p904"; + regulator-min-microvolt = <870000>; + regulator-max-microvolt = <970000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l9b_1p2: ldo9 { + regulator-name = "vreg_l9b_1p2"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1304000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + regulator-allow-set-load; + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM + RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l11b_1p504: ldo11 { + regulator-name = "vreg_l11b_1p504"; + regulator-min-microvolt = <1504000>; + regulator-max-microvolt = <2000000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l12b_0p751: ldo12 { + regulator-name = "vreg_l12b_0p751"; + regulator-min-microvolt = <751000>; + regulator-max-microvolt = <824000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l13b_0p53: ldo13 { + regulator-name = "vreg_l13b_0p53"; + regulator-min-microvolt = <530000>; + regulator-max-microvolt = <824000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l14b_1p08: ldo14 { + regulator-name = "vreg_l14b_1p08"; + regulator-min-microvolt = <1080000>; + regulator-max-microvolt = <1304000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l15b_0p765: ldo15 { + regulator-name = "vreg_l15b_0p765"; + regulator-min-microvolt = <765000>; + regulator-max-microvolt = <1020000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l16b_1p1: ldo16 { + regulator-name = "vreg_l16b_1p1"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1300000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l17b_1p7: ldo17 { + regulator-name = "vreg_l17b_1p7"; + regulator-min-microvolt = <1700000>; + regulator-max-microvolt = <1900000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l18b_1p8: ldo18 { + regulator-name = "vreg_l18b_1p8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2000000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l19b_1p8: ldo19 { + regulator-name = "vreg_l19b_1p8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2000000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + }; + + regulators-1 { + compatible = "qcom,pm8350c-rpmh-regulators"; + qcom,pmic-id = "c"; + + vdd-s1-supply = <&vph_pwr>; + vdd-s2-supply = <&vph_pwr>; + vdd-s5-supply = <&vph_pwr>; + vdd-s7-supply = <&vph_pwr>; + vdd-s9-supply = <&vph_pwr>; + vdd-s10-supply = <&vph_pwr>; + + vdd-l1-l12-supply = <&vreg_s1b_1p872>; + vdd-l2-l8-supply = <&vreg_s1b_1p872>; + vdd-l3-l4-l5-l7-l13-supply = <&vreg_bob>; + vdd-l6-l9-l11-supply = <&vreg_bob>; + vdd-l10-supply = <&vreg_s7b_0p972>; + vdd-bob-supply = <&vph_pwr>; + + vreg_s1c_2p19: smps1 { + regulator-name = "vreg_s1c_2p19"; + regulator-min-microvolt = <2190000>; + regulator-max-microvolt = <2210000>; + }; + + vreg_s9c_1p084: smps9 { + regulator-name = "vreg_s9c_1p084"; + regulator-min-microvolt = <1010000>; + regulator-max-microvolt = <1170000>; + }; + + vreg_l1c_1p8: ldo1 { + regulator-name = "vreg_l1c_1p8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1980000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l2c_1p62: ldo2 { + regulator-name = "vreg_l2c_1p62"; + regulator-min-microvolt = <1620000>; + regulator-max-microvolt = <1980000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l3c_2p8: ldo3 { + regulator-name = "vreg_l3c_2p8"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <3540000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l4c_1p62: ldo4 { + regulator-name = "vreg_l4c_1p62"; + regulator-min-microvolt = <1620000>; + regulator-max-microvolt = <3300000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l5c_1p62: ldo5 { + regulator-name = "vreg_l5c_1p62"; + regulator-min-microvolt = <1620000>; + regulator-max-microvolt = <3300000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l6c_2p96: ldo6 { + regulator-name = "vreg_l6c_2p96"; + regulator-min-microvolt = <1650000>; + regulator-max-microvolt = <3544000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l7c_3p0: ldo7 { + regulator-name = "vreg_l7c_3p0"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3544000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l8c_1p62: ldo8 { + regulator-name = "vreg_l8c_1p62"; + regulator-min-microvolt = <1620000>; + regulator-max-microvolt = <2000000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l9c_2p96: ldo9 { + regulator-name = "vreg_l9c_2p96"; + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <3544000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l10c_0p88: ldo10 { + regulator-name = "vreg_l10c_0p88"; + regulator-min-microvolt = <880000>; + regulator-max-microvolt = <1050000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + regulator-allow-set-load; + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM + RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l11c_2p8: ldo11 { + regulator-name = "vreg_l11c_2p8"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <3544000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + /* Sensors behind the ADSP (accelerometer, light, proximity) */ + vreg_l12c_1p65: ldo12 { + regulator-name = "vreg_l12c_1p65"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2000000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + regulator-always-on; + }; + + vreg_l13c_2p7: ldo13 { + regulator-name = "vreg_l13c_2p7"; + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <3544000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_bob: bob { + regulator-name = "vreg_bob"; + regulator-min-microvolt = <3008000>; + regulator-max-microvolt = <3960000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + }; + + regulators-2 { + compatible = "qcom,pmr735a-rpmh-regulators"; + qcom,pmic-id = "e"; + + vreg_l2e_1p2: ldo2 { + regulator-name = "vreg_l2e_1p2"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l3e_0p912: ldo3 { + regulator-name = "vreg_l3e_0p912"; + regulator-min-microvolt = <912000>; + regulator-max-microvolt = <1020000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l4e_1p776: ldo4 { + regulator-name = "vreg_l4e_1p776"; + regulator-min-microvolt = <1776000>; + regulator-max-microvolt = <1890000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l5e_0p8: ldo5 { + regulator-name = "vreg_l5e_0p8"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <800000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l6e_0p48: ldo6 { + regulator-name = "vreg_l6e_0p48"; + regulator-min-microvolt = <480000>; + regulator-max-microvolt = <904000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + }; +}; + +&gcc { + protected-clocks = <GCC_CFG_NOC_LPASS_CLK>, + <GCC_MSS_CFG_AHB_CLK>, + <GCC_MSS_OFFLINE_AXI_CLK>, + <GCC_MSS_Q6SS_BOOT_CLK_SRC>, + <GCC_MSS_Q6_MEMNOC_AXI_CLK>, + <GCC_MSS_SNOC_AXI_CLK>, + <GCC_QSPI_CNOC_PERIPH_AHB_CLK>, + <GCC_QSPI_CORE_CLK>, + <GCC_QSPI_CORE_CLK_SRC>, + <GCC_SEC_CTRL_CLK_SRC>, + <GCC_WPSS_AHB_BDG_MST_CLK>, + <GCC_WPSS_AHB_CLK>, + <GCC_WPSS_RSCP_CLK>; +}; + +&gpi_dma1 { + status = "okay"; +}; + +&gpu { + status = "okay"; +}; + +&gpu_zap_shader { + firmware-name = "qcom/sm7325/samsung/m52xq/a660_zap.mbn"; +}; + +&i2c9 { + clock-frequency = <100000>; + + status = "okay"; + + nfc@27 { + compatible = "samsung,s3fwrn5-i2c"; + reg = <0x27>; + + interrupts-extended = <&tlmm 41 IRQ_TYPE_LEVEL_HIGH>; + + en-gpios = <&tlmm 38 GPIO_ACTIVE_HIGH>; + wake-gpios = <&tlmm 40 GPIO_ACTIVE_HIGH>; + }; +}; + +&ipa { + /* the IPA firmware goes to the Samsung IPA GSI PIL region */ + memory-region = <&ipa_gsi_mem>; + firmware-name = "qcom/sm7325/samsung/m52xq/ipa_fws.mbn"; + + status = "okay"; +}; + +&lpass_audiocc { + compatible = "qcom,qcm6490-lpassaudiocc"; + /delete-property/ power-domains; +}; + +&pm7325_gpios { + volume_up_default: volume-up-default-state { + pins = "gpio6"; + function = PMIC_GPIO_FUNC_NORMAL; + power-source = <1>; + bias-pull-up; + input-enable; + }; +}; + +&pmk8350_vadc { + /* battery NTC */ + channel@14b { + reg = <PM7325_ADC7_GPIO2_100K_PU>; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + label = "pm7325_bat_therm"; + }; +}; + +&pon_pwrkey { + status = "okay"; +}; + +&pon_resin { + linux,code = <KEY_VOLUMEDOWN>; + + status = "okay"; +}; + +&qupv3_id_1 { + status = "okay"; +}; + +&qup_uart7_cts { + drive-strength = <2>; + bias-disable; +}; + +&qup_uart7_rts { + drive-strength = <2>; + bias-pull-down; +}; + +&qup_uart7_rx { + drive-strength = <2>; + bias-disable; +}; + +&qup_uart7_tx { + drive-strength = <2>; + bias-pull-up; +}; + +&remoteproc_adsp { + firmware-name = "qcom/sm7325/samsung/m52xq/adsp.mbn"; + + status = "okay"; +}; + +&remoteproc_mpss { + firmware-name = "qcom/sm7325/samsung/m52xq/modem.mbn"; + + status = "okay"; +}; + +&remoteproc_wpss { + firmware-name = "qcom/sm7325/samsung/m52xq/wpss.mbn"; + + status = "okay"; +}; + +&sdc2_clk { + drive-strength = <16>; + bias-disable; +}; + +&sdc2_cmd { + drive-strength = <10>; + bias-pull-up; +}; + +&sdc2_data { + drive-strength = <10>; + bias-pull-up; +}; + +&sdhc_2 { + cd-gpios = <&tlmm 91 GPIO_ACTIVE_LOW>; + + pinctrl-0 = <&sdc2_clk>, <&sdc2_cmd>, <&sdc2_data>, <&sd_cd_default>; + pinctrl-1 = <&sdc2_clk_sleep>, <&sdc2_cmd_sleep>, <&sdc2_data_sleep>, <&sd_cd_default>; + + vmmc-supply = <&vreg_l9c_2p96>; + vqmmc-supply = <&vreg_l6c_2p96>; + + status = "okay"; +}; + +&tlmm { + gpio-reserved-ranges = <56 4>; /* SPI (fingerprint reader) */ + + bluetooth_enable_default: bluetooth-enable-default-state { + pins = "gpio85"; + function = "gpio"; + drive-strength = <2>; + output-low; + bias-pull-down; + }; + + motor_en_default: motor-en-default-state { + pins = "gpio62"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + qup_uart7_sleep_cts: qup-uart7-sleep-cts-state { + pins = "gpio28"; + function = "gpio"; + /* + * Configure a bias-bus-hold on CTS to lower power + * usage when Bluetooth is turned off. Bus hold will + * maintain a low power state regardless of whether + * the Bluetooth module drives the pin in either + * direction or leaves the pin fully unpowered. + */ + bias-bus-hold; + }; + + qup_uart7_sleep_rts: qup-uart7-sleep-rts-state { + pins = "gpio29"; + function = "gpio"; + /* + * Configure pull-down on RTS. As RTS is active low + * signal, pull it low to indicate the BT SoC that it + * can wakeup the system anytime from suspend state by + * pulling RX low (by sending wakeup bytes). + */ + bias-pull-down; + }; + + qup_uart7_sleep_tx: qup-uart7-sleep-tx-state { + pins = "gpio30"; + function = "gpio"; + /* + * Configure pull-up on TX when it isn't actively driven + * to prevent BT SoC from receiving garbage during sleep. + */ + bias-pull-up; + }; + + qup_uart7_sleep_rx: qup-uart7-sleep-rx-state { + pins = "gpio31"; + function = "gpio"; + /* + * Configure a pull-up on RX. This is needed to avoid + * garbage data when the TX pin of the Bluetooth module + * is floating which may cause spurious wakeups. + */ + bias-pull-up; + }; + + sd_cd_default: sd-cd-default-state { + pins = "gpio91"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + sw_ctrl_default: sw-ctrl-default-state { + pins = "gpio86"; + function = "gpio"; + bias-pull-down; + }; +}; + +&uart7 { + /delete-property/ interrupts; + interrupts-extended = <&intc GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>, + <&tlmm 31 IRQ_TYPE_EDGE_FALLING>; + + pinctrl-1 = <&qup_uart7_sleep_cts>, <&qup_uart7_sleep_rts>, + <&qup_uart7_sleep_tx>, <&qup_uart7_sleep_rx>; + pinctrl-names = "default", "sleep"; + + status = "okay"; + + bluetooth: bluetooth { + compatible = "qcom,wcn6750-bt"; + + pinctrl-0 = <&bluetooth_enable_default>, <&sw_ctrl_default>; + pinctrl-names = "default"; + + enable-gpios = <&tlmm 85 GPIO_ACTIVE_HIGH>; + swctrl-gpios = <&tlmm 86 GPIO_ACTIVE_HIGH>; + + vddio-supply = <&vreg_l19b_1p8>; + vddaon-supply = <&vreg_s7b_0p972>; + vddbtcxmx-supply = <&vreg_s7b_0p972>; + vddrfacmn-supply = <&vreg_s7b_0p972>; + vddrfa0p8-supply = <&vreg_s7b_0p972>; + vddrfa1p7-supply = <&vreg_s1b_1p872>; + vddrfa1p2-supply = <&vreg_s7b_0p972>; + vddrfa2p2-supply = <&vreg_s8b_1p272>; + vddasd-supply = <&vreg_l11c_2p8>; + + max-speed = <3200000>; + }; +}; + +&ufs_mem_hc { + reset-gpios = <&tlmm 175 GPIO_ACTIVE_LOW>; + + vcc-supply = <&vreg_l7b_2p952>; + vcc-max-microamp = <800000>; + vccq-supply = <&vreg_l9b_1p2>; + vccq-max-microamp = <900000>; + + status = "okay"; +}; + +&ufs_mem_phy { + vdda-phy-supply = <&vreg_l10c_0p88>; + vdda-pll-supply = <&vreg_l6b_1p2>; + + status = "okay"; +}; + +&usb_1 { + dr_mode = "peripheral"; + maximum-speed = "high-speed"; + phys = <&usb_1_hsphy>; + phy-names = "usb2-phy"; + qcom,select-utmi-as-pipe-clk; + + status = "okay"; +}; + +&usb_1_hsphy { + vdda-pll-supply = <&vreg_l10c_0p88>; + vdda18-supply = <&vreg_l1c_1p8>; + vdda33-supply = <&vreg_l2b_3p072>; + + status = "okay"; +}; + +&venus { + firmware-name = "qcom/sm7325/samsung/m52xq/venus.mbn"; + + status = "okay"; +}; + +&wifi { + status = "okay"; +}; -- 2.25.1 ^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH 2/2] arm64: dts: qcom: sm7325: Add Samsung Galaxy M52 5G 2026-11-04 18:59 ` Asdlerto Korry (?) @ 2026-11-04 19:18 ` sashiko-bot -1 siblings, 0 replies; 9+ messages in thread From: sashiko-bot @ 2026-11-04 19:18 UTC (permalink / raw) To: Asdlerto Korry; +Cc: devicetree, robh, conor+dt Thank you for your contribution! Sashiko AI review found 5 potential issue(s) to consider: - [High] arm64: dts: qcom: sm7325-samsung-m52xq: missing status okay on qupv3_id_0 - [High] arm64: dts: qcom: sm7325-samsung-m52xq: overlapping adsp_mem reserved memory - [High] arm64: dts: qcom: sm7325-samsung-m52xq: wrong WCN6750 bluetooth RFA supplies - [High] arm64: dts: qcom: sm7325-samsung-m52xq: wrong IRQ trigger type on nfc@27 - [Low] arm64: dts: qcom: sm7325-samsung-m52xq: conflicting reg and memory-region on fb -- commit 25a93cb2dad726fce008e0298f37e0192577485b Author: Asdlerto Korry <korryasdlerto@gmail.com> arm64: dts: qcom: sm7325: Add Samsung Galaxy M52 5G This commit adds the initial device tree for the SM7325-based Samsung Galaxy M52 5G (samsung,m52xq) smartphone. > diff --git a/arch/arm64/boot/dts/qcom/sm7325-samsung-m52xq.dts b/arch/arm64/boot/dts/qcom/sm7325-samsung-m52xq.dts > new file mode 100644 > index 0000000000000..5ba9623df6c40 > --- /dev/null > +++ b/arch/arm64/boot/dts/qcom/sm7325-samsung-m52xq.dts > @@ -0,0 +1,828 @@ [ ... ] > +/* The following reserved memory regions have different addresses or sizes */ > +/delete-node/ &adsp_mem; > +/delete-node/ &rmtfs_mem; > + > +/ { > + model = "Samsung Galaxy M52 5G"; > + compatible = "samsung,m52xq", "qcom,sm7325"; > + chassis-type = "handset"; > + > + aliases { > + serial1 = &uart7; > + }; > + > + chosen { > + #address-cells = <2>; > + #size-cells = <2>; > + ranges; > + > + framebuffer0: framebuffer@e1000000 { > + compatible = "simple-framebuffer"; > + reg = <0x0 0xe1000000 0x0 (1080 * 2400 * 4)>; > + width = <1080>; > + height = <2400>; > + stride = <(1080 * 4)>; > + format = "a8r8g8b8"; > + memory-region = <&splash_mem>; [Severity: Low] Should one of reg or memory-region be dropped from framebuffer0? Both simplefb_get_memory_of() in drivers/gpu/drm/sysfb/simpledrm.c and simplefb_parse_dt() in drivers/video/fbdev/simplefb.c check whether reg is present when memory-region is specified, emit a runtime warning preferring memory-region over reg, and use the 0x2300000-byte splash_mem resource instead of the (1080 * 2400 * 4)-byte reg property. [ ... ] > + reserved-memory { > + cdsp_secure_heap_mem: cdsp-secure-heap@81800000 { > + reg = <0x0 0x81800000 0x0 0x1e00000>; > + no-map; > + }; > + > + adsp_mem: adsp@86700000 { > + reg = <0x0 0x86700000 0x0 0x4800000>; > + no-map; > + }; > + > + /* Mainline video_mem is downstream cvp_mem */ > + real_video_mem: video@8ad00000 { > + reg = <0x0 0x8ad00000 0x0 0x500000>; > + no-map; > + }; [Severity: High] Does adsp_mem overlap with cdsp_mem and real_video_mem here? In arch/arm64/boot/dts/qcom/kodiak.dtsi (included via sm7325.dtsi), cdsp_mem is defined at 0x88f00000..0x8ad00000: arch/arm64/boot/dts/qcom/kodiak.dtsi: cdsp_mem: cdsp@88f00000 { reg = <0x0 0x88f00000 0x0 0x1e00000>; no-map; }; Because cdsp_mem is not removed with /delete-node/ &cdsp_mem;, defining adsp_mem at 0x86700000 with size 0x4800000 (0x86700000..0x8af00000) covers the entire cdsp_mem range and also overlaps the first 0x200000 bytes of real_video_mem (0x8ad00000..0x8b200000), which triggers overlap errors in fdt_scan_reserved_mem_late() -> __rmem_check_for_overlap() during boot. Also, &venus below does not set memory-region = <&real_video_mem>, so venus continues using video_mem (0x8b200000) from kodiak.dtsi while real_video_mem remains unreferenced. [ ... ] > +&i2c9 { > + clock-frequency = <100000>; > + > + status = "okay"; > + > + nfc@27 { > + compatible = "samsung,s3fwrn5-i2c"; > + reg = <0x27>; > + > + interrupts-extended = <&tlmm 41 IRQ_TYPE_LEVEL_HIGH>; [Severity: High] Should nfc@27 use IRQ_TYPE_EDGE_RISING instead of IRQ_TYPE_LEVEL_HIGH? In drivers/nfc/s3fwrn5/i2c.c, s3fwrn5_i2c_probe() and s3fwrn5_i2c_set_mode() set phy->irq_skip = true on startup and power/mode transitions, and request a threaded IRQ with IRQF_ONESHOT. When the interrupt line asserts while phy->irq_skip is true (or mode is S3FWRN5_MODE_COLD), s3fwrn5_i2c_irq_thread_fn() returns IRQ_HANDLED without reading I2C to clear the interrupt source: drivers/nfc/s3fwrn5/i2c.c:s3fwrn5_i2c_irq_thread_fn() { ... if (phy->irq_skip) goto out; ... out: mutex_unlock(&phy->common.mutex); return IRQ_HANDLED; } With IRQ_TYPE_LEVEL_HIGH, the line remains asserted and immediately re-triggers in an endless IRQ loop as soon as the oneshot handler finishes. [ ... ] > +&qupv3_id_1 { > + status = "okay"; > +}; [Severity: High] Is &qupv3_id_0 missing status = "okay" here? In arch/arm64/boot/dts/qcom/kodiak.dtsi, uart7 (serial@99c000) is a child of qupv3_id_0 (geniqup@9c0000), which has status = "disabled" by default. Because geni_se_probe() in drivers/soc/qcom/qcom-geni-se.c only populates child devices for enabled QUP wrapper nodes, leaving qupv3_id_0 disabled prevents uart7 and its child bluetooth node from ever being populated or probed. [ ... ] > + bluetooth: bluetooth { > + compatible = "qcom,wcn6750-bt"; > + > + pinctrl-0 = <&bluetooth_enable_default>, <&sw_ctrl_default>; > + pinctrl-names = "default"; > + > + enable-gpios = <&tlmm 85 GPIO_ACTIVE_HIGH>; > + swctrl-gpios = <&tlmm 86 GPIO_ACTIVE_HIGH>; > + > + vddio-supply = <&vreg_l19b_1p8>; > + vddaon-supply = <&vreg_s7b_0p972>; > + vddbtcxmx-supply = <&vreg_s7b_0p972>; > + vddrfacmn-supply = <&vreg_s7b_0p972>; > + vddrfa0p8-supply = <&vreg_s7b_0p972>; > + vddrfa1p7-supply = <&vreg_s1b_1p872>; > + vddrfa1p2-supply = <&vreg_s7b_0p972>; > + vddrfa2p2-supply = <&vreg_s8b_1p272>; > + vddasd-supply = <&vreg_l11c_2p8>; [Severity: High] Are vddrfa1p2-supply and vddrfa2p2-supply connected to the wrong regulators here? vddrfa1p2-supply is connected to vreg_s7b_0p972 (0.535V..1.12V) and vddrfa2p2-supply is connected to vreg_s8b_1p272 (1.2V..1.5V), while vreg_s1c_2p19 (2.19V..2.21V) defined in regulators-1 is left completely unused. When qca_soc_data_wcn6750 probes in drivers/bluetooth/hci_qca.c, the 2.19V SMPS1C rail for the 2.2V RFA supply will never be enabled and will be turned off as unused. Should vddrfa1p2-supply be <&vreg_s8b_1p272> and vddrfa2p2-supply be <&vreg_s1c_2p19>? -- Sashiko AI review · https://sashiko.dev/#/patchset/20261104-m52xq-dts-v1-0-b198f02912ff@gmail.com?part=2 ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 2/2] arm64: dts: qcom: sm7325: Add Samsung Galaxy M52 5G 2026-11-04 18:59 ` Asdlerto Korry (?) (?) @ 2026-11-05 8:09 ` Konrad Dybcio 2026-11-05 11:11 ` Asdlerto Korry -1 siblings, 1 reply; 9+ messages in thread From: Konrad Dybcio @ 2026-11-05 8:09 UTC (permalink / raw) To: korryasdlerto, Bjorn Andersson, Konrad Dybcio, Abel Vesa, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Kees Cook, Tony Luck, Guilherme G. Piccoli Cc: linux-arm-msm, devicetree, linux-kernel On 11/4/26 7:59 PM, Asdlerto Korry via B4 Relay wrote: > From: Asdlerto Korry <korryasdlerto@gmail.com> > > Add the device tree for the Samsung Galaxy M52 5G (samsung,m52xq) > smartphone, which is based on the SM7325 SoC. [...] > + chosen { > + #address-cells = <2>; > + #size-cells = <2>; > + ranges; > + > + framebuffer0: framebuffer@e1000000 { > + compatible = "simple-framebuffer"; > + reg = <0x0 0xe1000000 0x0 (1080 * 2400 * 4)>; Drop the reg and unit address (numbers after the @ sign), since you have a memory-region handle [...] > + /* NFC chip power, switched by TLMM 42 (no consumer property in the binding) */ Please fix the binding [...] > +&usb_1 { > + dr_mode = "peripheral"; > + maximum-speed = "high-speed"; > + phys = <&usb_1_hsphy>; > + phy-names = "usb2-phy"; > + qcom,select-utmi-as-pipe-clk; > + > + status = "okay"; > +}; No superspeed / displayport? Konrad ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 2/2] arm64: dts: qcom: sm7325: Add Samsung Galaxy M52 5G 2026-11-05 8:09 ` Konrad Dybcio @ 2026-11-05 11:11 ` Asdlerto Korry 0 siblings, 0 replies; 9+ messages in thread From: Asdlerto Korry @ 2026-11-05 11:11 UTC (permalink / raw) To: Konrad Dybcio Cc: Bjorn Andersson, Konrad Dybcio, Abel Vesa, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Kees Cook, Tony Luck, Guilherme G. Piccoli, linux-arm-msm, devicetree, linux-kernel On 11/5/26 10:10 AM, Konrad Dybcio wrote: > Drop the reg and unit address (numbers after the @ sign), since you > have a memory-region handle Will do in v2. > > + /* NFC chip power, switched by TLMM 42 (no consumer property in the binding) */ > > Please fix the binding Will do: v2 adds a pvdd-supply to samsung,s3fwrn5 and makes the driver enable it, so the regulator no longer needs regulator-always-on. > No superspeed / displayport? No, the Type-C port of the M52 is USB 2.0 only. The vendor DT limits the DWC3 to high-speed as well, and I tested it: with the QMP combo PHY enabled and the orientation switch wired up, a USB 3 stick still enumerates at 480 Mbit/s in both plug orientations. There is no DP alt mode on this phone either. Thanks for the review! ^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2026-11-05 11:11 UTC | newest] Thread overview: 9+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2026-11-04 18:59 [PATCH 0/2] arm64: dts: qcom: Add Samsung Galaxy M52 5G Asdlerto Korry via B4 Relay 2026-11-04 18:59 ` Asdlerto Korry 2026-11-04 18:59 ` [PATCH 1/2] dt-bindings: arm: " Asdlerto Korry via B4 Relay 2026-11-04 18:59 ` Asdlerto Korry 2026-11-04 18:59 ` [PATCH 2/2] arm64: dts: qcom: sm7325: " Asdlerto Korry via B4 Relay 2026-11-04 18:59 ` Asdlerto Korry 2026-11-04 19:18 ` sashiko-bot 2026-11-05 8:09 ` Konrad Dybcio 2026-11-05 11:11 ` Asdlerto Korry
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.