From: sashiko-bot@kernel.org
To: "Arun Iyengar" <aiyengar1990@gmail.com>
Cc: dri-devel@lists.freedesktop.org
Subject: Re: [PATCH 6/8] drm/rockchip: vop2: Find the first mixer of a video port with Esmart3 too
Date: Tue, 10 Nov 2026 08:16:11 +0000 [thread overview]
Message-ID: <sashiko-outbox-206583@kernel.org> (raw)
In-Reply-To: <20261110-vop2-fixes-v1-6-d336e9dd90d3@gmail.com>
Thank you for your contribution! Sashiko AI review found 1 potential
issue to consider:
- [Low] drm/rockchip: missing Fixes trailer for
vop2_find_start_mixer_id_for_vp()
--
commit bef29062242358932c819e26dffcbfccfee3a800
Author: Arun Iyengar <aiyengar1990@gmail.com>
> drm/rockchip: vop2: Find the first mixer of a video port with Esmart3 too
>
> vop2_find_start_mixer_id_for_vp() looks for the first layer that holds a
> window of the video port, but for_each_set_bit() takes the number of bits
> to search, and ROCKCHIP_VOP2_ESMART3 is the highest window id, so Esmart3
> is never found. A video port whose bottom layer shows Esmart3 then starts
> its alpha setup at the mixer of a higher layer, or, if Esmart3 is its
> only window, past all layers, and programs mixers of other video ports.
>
> Search all window ids.
>
> Signed-off-by: Arun Iyengar <aiyengar1990@gmail.com>
[Severity: Low]
This fixes the window bitmask search bound in
vop2_find_start_mixer_id_for_vp(). Should this include:
Fixes: d3fe9aa49585 ("drm/rockchip: vop2: Use OVL_LAYER_SEL configuration instead of use win_mask calculate used layers")
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261110-vop2-fixes-v1-0-d336e9dd90d3@gmail.com?part=6
next prev parent reply other threads:[~2026-11-10 8:16 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-10 7:18 [PATCH 0/8] drm/rockchip: vop2: RK3588 clocking, sync polarity, AXI port and window fixes Arun Iyengar
2026-11-10 7:18 ` Arun Iyengar via B4 Relay
2026-11-10 7:18 ` Arun Iyengar via B4 Relay
2026-11-10 7:18 ` [PATCH 1/8] drm/rockchip: vop2: Don't use uninitialised dividers on RK3588 Arun Iyengar
2026-11-10 7:18 ` Arun Iyengar via B4 Relay
2026-11-10 7:18 ` Arun Iyengar via B4 Relay
2026-11-10 7:18 ` [PATCH 2/8] drm/rockchip: vop2: Fix the HDMI sync polarity " Arun Iyengar
2026-11-10 7:18 ` Arun Iyengar via B4 Relay
2026-11-10 7:18 ` Arun Iyengar via B4 Relay
2026-11-10 7:18 ` [PATCH 3/8] drm/rockchip: vop2: Don't accept AFBC YTR for RGB565 " Arun Iyengar
2026-11-10 7:18 ` Arun Iyengar via B4 Relay
2026-11-10 7:18 ` Arun Iyengar via B4 Relay
2026-11-10 7:18 ` [PATCH 4/8] drm/rockchip: vop2: Balance window fetches across both AXI ports " Arun Iyengar
2026-11-10 7:18 ` Arun Iyengar via B4 Relay
2026-11-10 7:18 ` Arun Iyengar via B4 Relay
2026-11-10 7:58 ` sashiko-bot
2026-11-10 7:18 ` [PATCH 5/8] drm/rockchip: vop2: Report POST_BUF_EMPTY at most once per frame Arun Iyengar
2026-11-10 7:18 ` Arun Iyengar via B4 Relay
2026-11-10 7:18 ` Arun Iyengar via B4 Relay
2026-11-10 8:11 ` sashiko-bot
2026-11-10 10:54 ` Chaoyi Chen
2026-11-10 10:54 ` Chaoyi Chen
2026-11-10 7:18 ` [PATCH 6/8] drm/rockchip: vop2: Find the first mixer of a video port with Esmart3 too Arun Iyengar
2026-11-10 7:18 ` Arun Iyengar via B4 Relay
2026-11-10 7:18 ` Arun Iyengar via B4 Relay
2026-11-10 8:16 ` sashiko-bot [this message]
2026-11-10 9:56 ` Chaoyi Chen
2026-11-10 9:56 ` Chaoyi Chen
2026-11-10 7:18 ` [PATCH 7/8] drm/rockchip: vop2: Keep the other LUT_PORT_SEL fields on gamma LUT updates Arun Iyengar
2026-11-10 7:18 ` Arun Iyengar via B4 Relay
2026-11-10 7:18 ` Arun Iyengar via B4 Relay
2026-11-10 8:22 ` sashiko-bot
2026-11-10 9:59 ` Chaoyi Chen
2026-11-10 9:59 ` Chaoyi Chen
2026-11-10 7:18 ` [PATCH 8/8] drm/rockchip: vop2: Fix the AFBC offsets of a source that starts inside a superblock Arun Iyengar
2026-11-10 7:18 ` Arun Iyengar via B4 Relay
2026-11-10 7:18 ` Arun Iyengar via B4 Relay
2026-11-10 8:44 ` sashiko-bot
2026-11-10 9:39 ` [PATCH 0/8] drm/rockchip: vop2: RK3588 clocking, sync polarity, AXI port and window fixes Chaoyi Chen
2026-11-10 9:39 ` Chaoyi Chen
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