Re: [PATCH 7/8] drm/rockchip: vop2: Keep the other LUT_PORT_SEL fields on gamma LUT updates

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential
issue to consider:
- [Low] drm/rockchip: vop2: missing Fixes trailer for commit
  4f537776340d
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commit a8803c2d42085266d5dfa3113cf2bcad402ebf13
Author: Arun Iyengar <aiyengar1990@gmail.com>

> drm/rockchip: vop2: Keep the other LUT_PORT_SEL fields on gamma LUT updates
>
> On RK3588 the gamma LUT of a video port is written through a window that
> GAMMA_AHB_WRITE_SEL in SYS_CTRL_LUT_PORT_SEL selects. The register also
> holds the dclk source selection of video ports 0 and 2 and the enable of
> the video port 0/1 merge for modes wider than 4096 pixels, which writing
> the whole register clears.
>
> Only update the write select field.
>
> Signed-off-by: Arun Iyengar <aiyengar1990@gmail.com>

[Severity: Low]
This fixes the full-register write to RK3568_LUT_PORT_SEL in
vop2_crtc_atomic_set_gamma_seamless().  Should this include:

  Fixes: 4f537776340d ("rockchip/drm: vop2: add support for gamma LUT")

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Sashiko AI review · https://sashiko.dev/#/patchset/20261110-vop2-fixes-v1-0-d336e9dd90d3@gmail.com?part=7