[PATCH v2 0/5] ARM: dts: aspeed: ventura2: Add ADCs and GPIO line names

[PATCH v2 0/5] ARM: dts: aspeed: ventura2: Add ADCs and GPIO line names

[Kyle Hsieh]

This series adds hardware description that the Ventura2 devicetree
applied from v10 [1] left out. Patches 1-2 add the LTC2305 and ADS1015
ADCs. Patches 3-5 name GPIO lines that userspace uses to detect the
COMe module and to reset the USB-UART bridges and the 88E1512 PHY.

The LTC2305 ADCs use their internal reference and describe no
vref-supply, so patch 1 depends on [2]; without it, dtbs_check reports
a missing vref-supply.

[1] https://lore.kernel.org/r/20261016-ventura2_initial_dts-v10-0-a546659a084b@gmail.com
[2] https://lore.kernel.org/linux-iio/20261110-ltc2497-vref-optional-v1-1-35c9657f3c0f@gmail.com/

Signed-off-by: Kyle Hsieh <kylehsieh1995@gmail.com>
---
Changes in v2:
- Added the ADS1015 ADC (patch 2) and the 88E1512 PHY reset GPIO name
  (patch 5).
- Reworked the cover letter. (Andrew)
- Linked the dt-bindings dependency.
- Link to v1: https://lore.kernel.org/r/20261106-ventura2-dts-update-v1-0-b085ece9bf57@gmail.com

---
Kyle Hsieh (5):
      ARM: dts: aspeed: ventura2: Add LTC2305 ADCs
      ARM: dts: aspeed: ventura2: Add ADS1015 ADC
      ARM: dts: aspeed: ventura2: Name the COMe presence GPIO
      ARM: dts: aspeed: ventura2: Name the USB-UART bridge reset GPIOs
      ARM: dts: aspeed: ventura2: Name the 88E1512 PHY reset GPIO

 .../dts/aspeed/aspeed-bmc-facebook-ventura2.dts    | 45 ++++++++++++++++++++--
 1 file changed, 41 insertions(+), 4 deletions(-)
---
base-commit: f4dcbba2ec358f7079daddcda7594dad9746326a
change-id: 20261106-ventura2-dts-update-f00bc0510b2b

Best regards,
-- 
Kyle Hsieh <kylehsieh1995@gmail.com>

[PATCH v2 1/5] ARM: dts: aspeed: ventura2: Add LTC2305 ADCs

[Kyle Hsieh]

Ventura2 has three LTC2305 2-channel 12-bit ADCs: one behind channel 2
of the PCA9548 mux on I2C bus 0, and two on I2C bus 3 at addresses
0x08 and 0x09. The bus 3 ADCs read the valve voltages.

Describe the ADCs and expose the bus 3 channels through iio-hwmon so
the voltages are reported as hwmon sensors.

The ADCs use their internal 4.096V reference, so no vref-supply is
described.

Signed-off-by: Kyle Hsieh <kylehsieh1995@gmail.com>
---
 .../dts/aspeed/aspeed-bmc-facebook-ventura2.dts     | 21 ++++++++++++++++++++-
 1 file changed, 20 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-ventura2.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-ventura2.dts
index f3dbdece3076..50e652cc37a1 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-ventura2.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-ventura2.dts
@@ -190,7 +190,8 @@ iio-hwmon {
 		io-channels =
 			<&adc0 0>, <&adc0 1>, <&adc0 2>, <&adc0 3>,
 			<&adc0 4>, <&adc0 5>, <&adc0 6>, <&adc0 7>,
-			<&adc1 2>;
+			<&adc1 2>,
+			<&adc_op_fb1 0>, <&adc_op_fb1 1>, <&adc_op_fb2 0>;
 	};
 
 	leds {
@@ -392,6 +393,12 @@ i2c0mux0ch2: i2c@2 {
 			reg = <2>;
 			#address-cells = <1>;
 			#size-cells = <0>;
+
+			adc@8 {
+				compatible = "lltc,ltc2305";
+				reg = <0x08>;
+				#io-channel-cells = <1>;
+			};
 		};
 
 		i2c0mux0ch3: i2c@3 {
@@ -583,6 +590,18 @@ &i2c3 {
 
 	status = "okay";
 
+	adc_op_fb1: adc@8 {
+		compatible = "lltc,ltc2305";
+		reg = <0x08>;
+		#io-channel-cells = <1>;
+	};
+
+	adc_op_fb2: adc@9 {
+		compatible = "lltc,ltc2305";
+		reg = <0x09>;
+		#io-channel-cells = <1>;
+	};
+
 	dac@c {
 		compatible = "adi,ad5612";
 		reg = <0x0c>;

-- 
2.34.1

Re: [PATCH v2 1/5] ARM: dts: aspeed: ventura2: Add LTC2305 ADCs

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential
issue to consider:
- [Low] ARM: dts: aspeed: ventura2: missing vref-supply violates
  lltc,ltc2497.yaml
--

commit caeadf546c0d6980ef4365a1de76028a3b8cfe39
Author: Kyle Hsieh <kylehsieh1995@gmail.com>

ARM: dts: aspeed: ventura2: Add LTC2305 ADCs

This commit adds three lltc,ltc2305 adc nodes to the ventura2 devicetree and
wires the i2c3 channels into iio-hwmon.

> diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-ventura2.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-ventura2.dts
> index f3dbdece30767..50e652cc37a17 100644
> --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-ventura2.dts
> +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-ventura2.dts

[ ... ]

> @@ -392,6 +393,12 @@ i2c0mux0ch2: i2c@2 {
>  			reg = <2>;
>  			#address-cells = <1>;
>  			#size-cells = <0>;
> +
> +			adc@8 {
> +				compatible = "lltc,ltc2305";
> +				reg = <0x08>;
> +				#io-channel-cells = <1>;
> +			};
>  		};
>  
>  		i2c0mux0ch3: i2c@3 {
> @@ -583,6 +590,18 @@ &i2c3 {
>  
>  	status = "okay";
>  
> +	adc_op_fb1: adc@8 {
> +		compatible = "lltc,ltc2305";
> +		reg = <0x08>;
> +		#io-channel-cells = <1>;
> +	};
> +
> +	adc_op_fb2: adc@9 {
> +		compatible = "lltc,ltc2305";
> +		reg = <0x09>;
> +		#io-channel-cells = <1>;
> +	};

[Severity: Low]
Will omitting vref-supply on these lltc,ltc2305 nodes cause dtbs_check to
fail?  Documentation/devicetree/bindings/iio/adc/lltc,ltc2497.yaml lists
vref-supply under required unconditionally, so the binding schema needs to
make vref-supply optional for lltc,ltc2305 and lltc,ltc2309 before omitting it
here.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261111-ventura2-dts-update-v2-0-bce5b5dafc1f@gmail.com?part=1

[PATCH v2 2/5] ARM: dts: aspeed: ventura2: Add ADS1015 ADC

[Kyle Hsieh]

Ventura2 has a TI ADS1015 4-channel 12-bit ADC at address 0x48 on I2C
bus 10.

Describe the ADC so it is instantiated by the ti-ads1015 driver.

Signed-off-by: Kyle Hsieh <kylehsieh1995@gmail.com>
---
 arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-ventura2.dts | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-ventura2.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-ventura2.dts
index 50e652cc37a1..21c40dd4bb84 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-ventura2.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-ventura2.dts
@@ -2405,6 +2405,13 @@ power-monitor@44 {
 		shunt-resistor-micro-ohms = <500>;
 	};
 
+	adc@48 {
+		compatible = "ti,ads1015";
+		reg = <0x48>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
+
 	gpio@64 {
 		compatible = "nxp,pca9555";
 		reg = <0x64>;

-- 
2.34.1

[PATCH v2 3/5] ARM: dts: aspeed: ventura2: Name the COMe presence GPIO

[Kyle Hsieh]

Line 9 of the PCA9555 at address 0x23 on I2C bus 3 is the presence
detect of the optional COM Express module. Name it PRSNT_COME_N so
userspace can determine whether the module is present.

Signed-off-by: Kyle Hsieh <kylehsieh1995@gmail.com>
---
 arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-ventura2.dts | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-ventura2.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-ventura2.dts
index 21c40dd4bb84..c683ac19aba3 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-ventura2.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-ventura2.dts
@@ -625,6 +625,17 @@ gpio@23 {
 		reg = <0x23>;
 		#gpio-cells = <2>;
 		gpio-controller;
+
+		gpio-line-names =
+			"", "",
+			"", "",
+			"", "",
+			"", "",
+			"", "PRSNT_COME_N",
+			"", "",
+			"", "",
+			"", "";
+
 		interrupt-parent = <&io_expander7>;
 		interrupts = <6 IRQ_TYPE_LEVEL_LOW>;
 	};

-- 
2.34.1

[PATCH v2 4/5] ARM: dts: aspeed: ventura2: Name the USB-UART bridge reset GPIOs

[Kyle Hsieh]

Lines 2-4 of the PCA9555 at address 0x20 on I2C bus 6 drive the reset
of the three USB-to-UART bridges. Name them RST_FT4232_{1,2,3}_BMC_N_R
after the schematic nets so userspace can reset the bridges.

Signed-off-by: Kyle Hsieh <kylehsieh1995@gmail.com>
---
 arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-ventura2.dts | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-ventura2.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-ventura2.dts
index c683ac19aba3..a5e6cc94b280 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-ventura2.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-ventura2.dts
@@ -1937,8 +1937,8 @@ gpio@20 {
 
 		gpio-line-names =
 			"", "",
-			"", "",
-			"", "PRSNT_FANBP_0_PWR_N",
+			"RST_FT4232_1_BMC_N_R", "RST_FT4232_2_BMC_N_R",
+			"RST_FT4232_3_BMC_N_R", "PRSNT_FANBP_0_PWR_N",
 			"PRSNT_FANBP_0_SIG_N", "PRSNT_POE_PWR_N",
 			"PRSNT_POE_SIG_N", "",
 			"PWRGD_P3V3_ISO_POE_BMC_R", "",

-- 
2.34.1

[PATCH v2 5/5] ARM: dts: aspeed: ventura2: Name the 88E1512 PHY reset GPIO

[Kyle Hsieh]

Line 10 of the PCA9555 at address 0x67 on I2C bus 10 drives the reset
of the Marvell 88E1512 PHY. Name it FPGA_RST_88E1512_PLD after the
schematic net so userspace can reset the PHY during network bring-up.

Signed-off-by: Kyle Hsieh <kylehsieh1995@gmail.com>
---
 arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-ventura2.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-ventura2.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-ventura2.dts
index a5e6cc94b280..aa83233f1710 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-ventura2.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-ventura2.dts
@@ -2486,7 +2486,7 @@ gpio@67 {
 			"FPGA_TRAY37_PWRGD_BUF_R", "FPGA_TRAY38_PWRGD_BUF_R",
 			"FPGA_TRAY39_PWRGD_BUF_R", "FPGA_TRAY40_PWRGD_BUF_R",
 			"FPGA_ISO_CARRIER_BOARD_PWR_OK", "FPGA_UART_MUX_SEL",
-			"", "",
+			"FPGA_RST_88E1512_PLD", "",
 			"", "",
 			"", "";
 	};

-- 
2.34.1