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* [PATCH 0/4] drm/xe: Use MI_SEMAPHORE_WAIT_64 (Wa_16029281913)
@ 2026-11-13 15:57 tilak.tirumalesh.tangudu
  2026-11-13 15:57 ` [PATCH 1/4] drm/xe: Add has_sem64 bit to graphics/media IP descriptors tilak.tirumalesh.tangudu
                   ` (6 more replies)
  0 siblings, 7 replies; 9+ messages in thread
From: tilak.tirumalesh.tangudu @ 2026-11-13 15:57 UTC (permalink / raw)
  To: tilak.tirumalesh.tangudu, satyanarayana.k.v.p, piotr.piorkowski,
	jesus.narvaez, daniele.ceraolospurio, stuart.summers, intel-xe

From: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>

Wa_16029281913: MI_SEMAPHORE_WAIT has an issue on some Xe3p platforms.
The recommendation is to use the 64-bit MI_SEMAPHORE_WAIT_64 instruction
instead wherever the GT supports it.

Patch 1 adds a has_sem64 capability bit to the graphics/media IP
descriptors, resolved into gt->info.has_sem64 at probe time. Every Xe3p
platform supports it except Graphics version 35.10 and Media version
35.00, which only gain support at stepping B0; the stepping exception
is applied when resolving the final value, and both the primary and
media GT must agree before either one enables it, so no caller needs
to special-case it.

Patch 2 adds the MI_SEMAPHORE_WAIT_64 instruction definition.

Patches 3 and 4 switch emit_fake_watchdog() and emit_ulls_postamble()
over to MI_SEMAPHORE_WAIT_64 on platforms that support it, falling back
to the existing 32-bit MI_SEMAPHORE_WAIT otherwise. ULLS_JOB_SIZE_DW is
bumped from 48 to 50 since the 64-bit postamble is 2 dwords wider and
the fixed-size ULLS job slot has no headroom to spare in the worst case
(SRIOV VF).

Note: patch 1 (the has_sem64 flag) may end up landing via a different
series, since the capability bit itself is useful independent of this
workaround. If so, patches 2-4 here will depend on it being applied
first.

Testing status: patch 3 (fake watchdog) has been tested. Patch 4 (ULLS
postamble) still needs testing on a dGFX platform with USM support
where sem64 is supported.

Tangudu Tilak Tirumalesh (4):
  drm/xe: Add has_sem64 bit to graphics/media IP descriptors
  drm/xe: Add MI_SEMAPHORE_WAIT_64 instruction definition
  drm/xe: Use MI_SEMAPHORE_WAIT_64 for fake watchdog where supported
  drm/xe: Use MI_SEMAPHORE_WAIT_64 in ULLS postamble where supported

 .../gpu/drm/xe/instructions/xe_mi_commands.h  |  6 ++
 drivers/gpu/drm/xe/xe_gt_types.h              |  2 +
 drivers/gpu/drm/xe/xe_pci.c                   | 27 ++++++++-
 drivers/gpu/drm/xe/xe_pci_types.h             |  2 +
 drivers/gpu/drm/xe/xe_ring_ops.c              | 58 ++++++++++++++-----
 drivers/gpu/drm/xe/xe_ring_ops_types.h        |  5 +-
 6 files changed, 83 insertions(+), 17 deletions(-)

-- 
2.46.0


^ permalink raw reply	[flat|nested] 9+ messages in thread

end of thread, other threads:[~2026-11-13 17:09 UTC | newest]

Thread overview: 9+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-11-13 15:57 [PATCH 0/4] drm/xe: Use MI_SEMAPHORE_WAIT_64 (Wa_16029281913) tilak.tirumalesh.tangudu
2026-11-13 15:57 ` [PATCH 1/4] drm/xe: Add has_sem64 bit to graphics/media IP descriptors tilak.tirumalesh.tangudu
2026-11-13 16:20   ` sashiko-bot
2026-11-13 15:57 ` [PATCH 2/4] drm/xe: Add MI_SEMAPHORE_WAIT_64 instruction definition tilak.tirumalesh.tangudu
2026-11-13 15:57 ` [PATCH 3/4] drm/xe: Use MI_SEMAPHORE_WAIT_64 for fake watchdog where supported tilak.tirumalesh.tangudu
2026-11-13 15:57 ` [PATCH 4/4] drm/xe: Use MI_SEMAPHORE_WAIT_64 in ULLS postamble " tilak.tirumalesh.tangudu
2026-11-13 16:34 ` ✗ CI.checkpatch: warning for drm/xe: Use MI_SEMAPHORE_WAIT_64 (Wa_16029281913) (rev3) Patchwork
2026-11-13 16:36 ` ✓ CI.KUnit: success " Patchwork
2026-11-13 17:09 ` ✓ Xe.CI.BAT: " Patchwork

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