Re: [PATCH v6 1/4] dt-bindings: phy: Add rockchip,rk3568-edp-phy

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential
issue to consider:
- [Medium] dt-bindings: soc: rockchip: leftover clocks in
  rk3568-edp-phy-grf schema
--

commit 1917cbd8f96871d64c923d3ef4f97c3ee79b14dc
Author: Damon Ding <damon.ding@rock-chips.com>

dt-bindings: phy: Add rockchip,rk3568-edp-phy

This commit adds Device Tree binding schemas for the RK3568 eDP
transmitter PHY and its parent eDP PHY GRF syscon.

> diff --git a/Documentation/devicetree/bindings/soc/rockchip/rockchip,rk3568-edp-phy-grf.yaml b/Documentation/devicetree/bindings/soc/rockchip/rockchip,rk3568-edp-phy-grf.yaml
> new file mode 100644
> index 0000000000000..852420798f06a
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/soc/rockchip/rockchip,rk3568-edp-phy-grf.yaml

[ ... ]

> +  reg:
> +    maxItems: 1
> +
> +  clocks:
> +    maxItems: 1
> +
> +  "#address-cells":
> +    const: 1
> +
> +  "#size-cells":
> +    const: 1
> +
> +  ranges: true
> +
> +patternProperties:
> +  "^phy@[0-9a-f]+$":
> +    type: object
> +    $ref: /schemas/phy/rockchip,rk3568-edp-phy.yaml#
> +    unevaluatedProperties: false
> +
> +required:
> +  - compatible
> +  - reg
> +  - clocks
> +  - "#address-cells"
> +  - "#size-cells"
> +  - ranges
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/clock/rk3568-cru.h>
> +
> +    soc {
> +      #address-cells = <2>;
> +      #size-cells = <2>;
> +
> +      edp_phy_grf: syscon@fdcb0000 {
> +        compatible = "rockchip,rk3568-edp-phy-grf", "syscon", "simple-mfd";
> +        reg = <0x0 0xfdcb0000 0x0 0x8000>;
> +        clocks = <&cru PCLK_EDPPHY_GRF>;
> +        ranges = <0x0 0x0 0xfdcb0000 0x100>;
> +        #address-cells = <1>;
> +        #size-cells = <1>;
> +
> +        edp_phy: phy@0 {
> +          compatible = "rockchip,rk3568-edp-phy";
> +          reg = <0x0 0x100>;
> +          clocks = <&pmucru XIN_OSC0_EDPPHY_G>, <&cru PCLK_EDPPHY_GRF>;
> +          clock-names = "ref", "apb";
> +          #phy-cells = <0>;
> +        };
> +      };
> +    };

[Severity: Medium]
Should clocks be dropped from the parent rockchip,rk3568-edp-phy-grf
schema and example?

The PCLK_EDPPHY_GRF APB clock is now claimed by the child
rockchip,rk3568-edp-phy node, so keeping clocks required on the parent
syscon node either fails dtbs_check when PCLK_EDPPHY_GRF is placed only
on the child PHY node or forces device trees to duplicate the clock on
both nodes.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261114083339.600986-1-damon.ding@rock-chips.com?part=1