Re: [PATCH net-next v20 13/15] dt-bindings: net: pcs: Document support for Airoha Ethernet PCS

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 2 potential
issues to consider:
- [Medium] dt-bindings: net: pcs: airoha,scu conflicts with SCU generic
  PHY binding
- [Low] dt-bindings: net: pcs: unwieldy per-compatible conditionals in
  airoha,pcs.yaml
--

commit 7c02c1d65d1b1089188d04c1629d9473870df4bb
Author: Christian Marangi <ansuelsmth@gmail.com>

dt-bindings: net: pcs: Document support for Airoha Ethernet PCS

This commit adds the Device Tree binding schema for the Airoha AN7581
Ethernet, PON, PCIe, and USB PCS and SerDes blocks.

> diff --git a/Documentation/devicetree/bindings/net/pcs/airoha,pcs.yaml b/Documentation/devicetree/bindings/net/pcs/airoha,pcs.yaml
> new file mode 100644
> index 0000000000000..9c1d116c1b016
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/pcs/airoha,pcs.yaml
> @@ -0,0 +1,261 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/net/pcs/airoha,pcs.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Airoha Ethernet PCS and Serdes
> +
> +maintainers:
> +  - Christian Marangi <ansuelsmth@gmail.com>
> +
> +description:
> +  Airoha AN7581 SoC expose multiple Physical Coding Sublayer (PCS) for
> +  the various Serdes port supporting different Media Independent Interface
> +  (10BASE-R, USXGMII, 2500BASE-X, 1000BASE-X, SGMII).
> +
> +properties:
> +  compatible:
> +    enum:
> +      - airoha,an7581-pcs-eth
> +      - airoha,an7581-pcs-pon
> +      - airoha,an7581-pcs-pcie
> +      - airoha,an7581-pcs-usb
> +
> +  reg:
> +    minItems: 6
> +    maxItems: 15
> +
> +  reg-names:
> +    minItems: 6
> +    maxItems: 15
> +
> +  airoha,scu:
> +    $ref: /schemas/types.yaml#/definitions/phandle
> +    description: phandle to the SCU node required to configure
> +      the serdes line to the correct interface mode.
> +
> +  phys:
> +    maxItems: 1

[Severity: Medium]
Should the Ethernet, PON, and PCIe PCS nodes use the standard phys property
instead of introducing a custom airoha,scu phandle to &scuclk for SerDes
interface mode selection?

In Documentation/devicetree/bindings/clock/airoha,en7523-scu.yaml and
drivers/clk/clk-en7523.c (en7581_serdes_phy_set_mode()), the airoha,en7581-scu
node (scuclk) is not a syscon and already exposes SerDes port mode switching
via a generic PHY provider (#phy-cells = <1>).  For the separate Chip SCU
syscon (airoha,en7581-chip-scu), existing bindings such as
Documentation/devicetree/bindings/thermal/airoha,en7581-thermal.yaml use
airoha,chip-scu pointing to &chip_scu.

> +
> +  "#pcs-cells": true
> +
> +required:
> +  - compatible
> +  - reg
> +  - reg-names
> +  - "#pcs-cells"
> +
> +allOf:
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            enum:
> +              - airoha,an7581-pcs-eth
> +              - airoha,an7581-pcs-pon

[Severity: Low]
Should these variants be split into separate binding schema files instead of
combining all four compatibles into a single generic airoha,pcs.yaml?

Because the eth/pon, pcie, and usb blocks have different register sets (8,
15, or 6 reg entries), different #pcs-cells values (0 vs 1), and mutually
exclusive required properties (airoha,scu vs phys), the top-level properties
can only state loose bounds while three large if-then blocks under allOf
redefine almost the entire schema for each variant.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261114104426.235620-1-ansuelsmth@gmail.com?part=13