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* [PATCH 0/3] x86 stuff for 4.14
@ 2017-07-24 10:12 Borislav Petkov
  2017-07-24 10:12 ` [PATCH 1/3] x86/microcode/AMD: Free unneeded patch before exit from update_cache() Borislav Petkov
                   ` (2 more replies)
  0 siblings, 3 replies; 12+ messages in thread
From: Borislav Petkov @ 2017-07-24 10:12 UTC (permalink / raw)
  To: X86 ML; +Cc: LKML

From: Borislav Petkov <bp@suse.de>

Hi guys,

some fixes that got ready in the meantime. Yazen's goes to tip:ras/core
and the other two to tip:x86/microcode.

Thanks.

Borislav Petkov (1):
  x86/microcode: Document the three loading methods

Shu Wang (1):
  x86/microcode/AMD: Free unneeded patch before exit from update_cache()

Yazen Ghannam (1):
  x86/mce/AMD: Allow any CPU to initialize smca_banks array

 Documentation/x86/early-microcode.txt |  70 -----------------
 Documentation/x86/microcode.txt       | 137 ++++++++++++++++++++++++++++++++++
 arch/x86/kernel/cpu/mcheck/mce_amd.c  |   9 +--
 arch/x86/kernel/cpu/microcode/amd.c   |   5 +-
 4 files changed, 143 insertions(+), 78 deletions(-)
 delete mode 100644 Documentation/x86/early-microcode.txt
 create mode 100644 Documentation/x86/microcode.txt

-- 
2.14.0.rc0

^ permalink raw reply	[flat|nested] 12+ messages in thread
* [tip:ras/core] x86/mce/AMD: Allow any CPU to initialize the smca_banks array
  2017-07-24 10:12 ` [PATCH 3/3] x86/mce/AMD: Allow any CPU to initialize smca_banks array Borislav Petkov
@ 2017-07-25 13:51 ` tip-bot for Yazen Ghannam
  -1 siblings, 0 replies; 12+ messages in thread
From: tip-bot for Borislav Petkov @ 2017-07-25 13:51 UTC (permalink / raw)
  To: linux-tip-commits
  Cc: linux-edac, linux-kernel, hpa, bp, tony.luck, mingo, torvalds,
	yazen.ghannam, jack, peterz, tglx

Commit-ID:  df7ce2c4bfc9660be86624b647034160c0585328
Gitweb:     http://git.kernel.org/tip/df7ce2c4bfc9660be86624b647034160c0585328
Author:     Yazen Ghannam <yazen.ghannam@amd.com>
AuthorDate: Mon, 24 Jul 2017 12:12:28 +0200
Committer:  Ingo Molnar <mingo@kernel.org>
CommitDate: Tue, 25 Jul 2017 11:26:47 +0200

x86/mce/AMD: Allow any CPU to initialize the smca_banks array

Current SMCA implementations have the same banks on each CPU with the
non-core banks only visible to a "master thread" on each die. Practically,
this means the smca_banks array, which describes the banks, only needs to
be populated once by a single master thread.

CPU 0 seemed like a good candidate to do the populating. However, it's
possible that CPU 0 is not enabled in which case the smca_banks array won't
be populated.

Rather than try to figure out another master thread to do the populating,
we should just allow any CPU to populate the array.

Drop the CPU 0 check and return early if the bank was already initialized.
Also, drop the WARNing about an already initialized bank, since this will
be a common, expected occurrence.

The smca_banks array is only populated at boot time and CPUs are brought
online sequentially. So there's no need for locking around the array.

If the first CPU up is a master thread, then it will populate the array
with all banks, core and non-core. Every CPU afterwards will return
early. If the first CPU up is not a master thread, then it will populate
the array with all core banks. The first CPU afterwards that is a master
thread will skip populating the core banks and continue populating the
non-core banks.

Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Acked-by: Jack Miller <jack@codezen.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Tony Luck <tony.luck@intel.com>
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: http://lkml.kernel.org/r/20170724101228.17326-4-bp@alien8.de
Signed-off-by: Ingo Molnar <mingo@kernel.org>
---
 arch/x86/kernel/cpu/mcheck/mce_amd.c | 9 ++-------
 1 file changed, 2 insertions(+), 7 deletions(-)

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diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd.c b/arch/x86/kernel/cpu/mcheck/mce_amd.c
index 9e314bc..5ce1a56 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_amd.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_amd.c
@@ -201,8 +201,8 @@ static void smca_configure(unsigned int bank, unsigned int cpu)
 		wrmsr(smca_config, low, high);
 	}
 
-	/* Collect bank_info using CPU 0 for now. */
-	if (cpu)
+	/* Return early if this bank was already initialized. */
+	if (smca_banks[bank].hwid)
 		return;
 
 	if (rdmsr_safe_on_cpu(cpu, MSR_AMD64_SMCA_MCx_IPID(bank), &low, &high)) {
@@ -216,11 +216,6 @@ static void smca_configure(unsigned int bank, unsigned int cpu)
 	for (i = 0; i < ARRAY_SIZE(smca_hwid_mcatypes); i++) {
 		s_hwid = &smca_hwid_mcatypes[i];
 		if (hwid_mcatype == s_hwid->hwid_mcatype) {
-
-			WARN(smca_banks[bank].hwid,
-			     "Bank %s already initialized!\n",
-			     smca_get_name(s_hwid->bank_type));
-
 			smca_banks[bank].hwid = s_hwid;
 			smca_banks[bank].id = low;
 			smca_banks[bank].sysfs_id = s_hwid->count++;

^ permalink raw reply related	[flat|nested] 12+ messages in thread
* [tip:ras/core] x86/mce/AMD: Allow any CPU to initialize the smca_banks array
  2017-07-24 10:12 ` [PATCH 3/3] x86/mce/AMD: Allow any CPU to initialize smca_banks array Borislav Petkov
@ 2017-07-25 13:55 ` tip-bot for Yazen Ghannam
  -1 siblings, 0 replies; 12+ messages in thread
From: tip-bot for Borislav Petkov @ 2017-07-25 13:55 UTC (permalink / raw)
  To: linux-tip-commits
  Cc: bp, torvalds, peterz, tony.luck, tglx, jack, mingo, yazen.ghannam,
	hpa, linux-edac, linux-kernel

Commit-ID:  9662d43f523dfc0dc242ec29c2921c43898d6ae5
Gitweb:     http://git.kernel.org/tip/9662d43f523dfc0dc242ec29c2921c43898d6ae5
Author:     Yazen Ghannam <yazen.ghannam@amd.com>
AuthorDate: Mon, 24 Jul 2017 12:12:28 +0200
Committer:  Ingo Molnar <mingo@kernel.org>
CommitDate: Tue, 25 Jul 2017 15:50:53 +0200

x86/mce/AMD: Allow any CPU to initialize the smca_banks array

Current SMCA implementations have the same banks on each CPU with the
non-core banks only visible to a "master thread" on each die. Practically,
this means the smca_banks array, which describes the banks, only needs to
be populated once by a single master thread.

CPU 0 seemed like a good candidate to do the populating. However, it's
possible that CPU 0 is not enabled in which case the smca_banks array won't
be populated.

Rather than try to figure out another master thread to do the populating,
we should just allow any CPU to populate the array.

Drop the CPU 0 check and return early if the bank was already initialized.
Also, drop the WARNing about an already initialized bank, since this will
be a common, expected occurrence.

The smca_banks array is only populated at boot time and CPUs are brought
online sequentially. So there's no need for locking around the array.

If the first CPU up is a master thread, then it will populate the array
with all banks, core and non-core. Every CPU afterwards will return
early. If the first CPU up is not a master thread, then it will populate
the array with all core banks. The first CPU afterwards that is a master
thread will skip populating the core banks and continue populating the
non-core banks.

Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Acked-by: Jack Miller <jack@codezen.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Tony Luck <tony.luck@intel.com>
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: http://lkml.kernel.org/r/20170724101228.17326-4-bp@alien8.de
Signed-off-by: Ingo Molnar <mingo@kernel.org>
---
 arch/x86/kernel/cpu/mcheck/mce_amd.c | 9 ++-------
 1 file changed, 2 insertions(+), 7 deletions(-)

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diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd.c b/arch/x86/kernel/cpu/mcheck/mce_amd.c
index 9e314bc..5ce1a56 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_amd.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_amd.c
@@ -201,8 +201,8 @@ static void smca_configure(unsigned int bank, unsigned int cpu)
 		wrmsr(smca_config, low, high);
 	}
 
-	/* Collect bank_info using CPU 0 for now. */
-	if (cpu)
+	/* Return early if this bank was already initialized. */
+	if (smca_banks[bank].hwid)
 		return;
 
 	if (rdmsr_safe_on_cpu(cpu, MSR_AMD64_SMCA_MCx_IPID(bank), &low, &high)) {
@@ -216,11 +216,6 @@ static void smca_configure(unsigned int bank, unsigned int cpu)
 	for (i = 0; i < ARRAY_SIZE(smca_hwid_mcatypes); i++) {
 		s_hwid = &smca_hwid_mcatypes[i];
 		if (hwid_mcatype == s_hwid->hwid_mcatype) {
-
-			WARN(smca_banks[bank].hwid,
-			     "Bank %s already initialized!\n",
-			     smca_get_name(s_hwid->bank_type));
-
 			smca_banks[bank].hwid = s_hwid;
 			smca_banks[bank].id = low;
 			smca_banks[bank].sysfs_id = s_hwid->count++;

^ permalink raw reply related	[flat|nested] 12+ messages in thread

end of thread, other threads:[~2017-08-05  6:16 UTC | newest]

Thread overview: 12+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2017-07-24 10:12 [PATCH 0/3] x86 stuff for 4.14 Borislav Petkov
2017-07-24 10:12 ` [PATCH 1/3] x86/microcode/AMD: Free unneeded patch before exit from update_cache() Borislav Petkov
2017-07-25 13:50   ` [tip:x86/microcode] " tip-bot for Shu Wang
2017-07-24 10:12 ` [PATCH 2/3] x86/microcode: Document the three loading methods Borislav Petkov
2017-07-25 13:51   ` [tip:x86/microcode] " tip-bot for Borislav Petkov
2017-08-04 11:24     ` Paul Menzel
2017-08-05  6:15       ` Borislav Petkov
2017-07-24 10:12 ` [PATCH 3/3] x86/mce/AMD: Allow any CPU to initialize smca_banks array Borislav Petkov
  -- strict thread matches above, loose matches on Subject: below --
2017-07-25 13:51 [tip:ras/core] x86/mce/AMD: Allow any CPU to initialize the " tip-bot for Borislav Petkov
2017-07-25 13:51 ` tip-bot for Yazen Ghannam
2017-07-25 13:55 tip-bot for Borislav Petkov
2017-07-25 13:55 ` tip-bot for Yazen Ghannam

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