From: tip-bot for Thomas Gleixner <tipbot@zytor.com>
To: linux-tip-commits@vger.kernel.org
Cc: mingo@kernel.org, peterz@infradead.org, matt.fleming@intel.com,
linux-kernel@vger.kernel.org, vikas.shivappa@linux.intel.com,
torvalds@linux-foundation.org, tglx@linutronix.de,
kanaka.d.juvva@intel.com, will.auld@intel.com, hpa@zytor.com
Subject: [tip:perf/core] perf/x86/intel/cqm: Use proper data types
Date: Wed, 27 May 2015 03:03:11 -0700 [thread overview]
Message-ID: <tip-b3df4ec4424f27e55d754cfe586195fecca1c4e4@git.kernel.org> (raw)
In-Reply-To: <20150518235149.919350144@linutronix.de>
Commit-ID: b3df4ec4424f27e55d754cfe586195fecca1c4e4
Gitweb: http://git.kernel.org/tip/b3df4ec4424f27e55d754cfe586195fecca1c4e4
Author: Thomas Gleixner <tglx@linutronix.de>
AuthorDate: Tue, 19 May 2015 00:00:51 +0000
Committer: Ingo Molnar <mingo@kernel.org>
CommitDate: Wed, 27 May 2015 09:17:39 +0200
perf/x86/intel/cqm: Use proper data types
'int' is really not a proper data type for an MSR. Use u32 to make it
clear that we are dealing with a 32-bit unsigned hardware value.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Matt Fleming <matt.fleming@intel.com>
Cc: Kanaka Juvva <kanaka.d.juvva@intel.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Vikas Shivappa <vikas.shivappa@linux.intel.com>
Cc: Will Auld <will.auld@intel.com>
Link: http://lkml.kernel.org/r/20150518235149.919350144@linutronix.de
Signed-off-by: Ingo Molnar <mingo@kernel.org>
---
arch/x86/kernel/cpu/perf_event_intel_cqm.c | 4 ++--
include/linux/perf_event.h | 2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/x86/kernel/cpu/perf_event_intel_cqm.c b/arch/x86/kernel/cpu/perf_event_intel_cqm.c
index 572582e..3e9a7fb 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_cqm.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_cqm.c
@@ -18,7 +18,7 @@ static unsigned int cqm_l3_scale; /* supposedly cacheline size */
struct intel_cqm_state {
raw_spinlock_t lock;
- int rmid;
+ u32 rmid;
int cnt;
};
@@ -962,7 +962,7 @@ out:
static void intel_cqm_event_start(struct perf_event *event, int mode)
{
struct intel_cqm_state *state = this_cpu_ptr(&cqm_state);
- unsigned int rmid = event->hw.cqm_rmid;
+ u32 rmid = event->hw.cqm_rmid;
unsigned long flags;
if (!(event->hw.cqm_state & PERF_HES_STOPPED))
diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h
index 248f782..0658002 100644
--- a/include/linux/perf_event.h
+++ b/include/linux/perf_event.h
@@ -120,7 +120,7 @@ struct hw_perf_event {
};
struct { /* intel_cqm */
int cqm_state;
- int cqm_rmid;
+ u32 cqm_rmid;
struct list_head cqm_events_entry;
struct list_head cqm_groups_entry;
struct list_head cqm_group_entry;
next prev parent reply other threads:[~2015-05-27 10:03 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-19 0:00 [patch 0/6] x86, perf, cqm: Cleanups and preparation for RDT/CAT Thomas Gleixner
2015-05-19 0:00 ` [patch 1/6] x86, perf, cqm: Document PQR MSR abuse Thomas Gleixner
2015-05-19 11:53 ` Matt Fleming
2015-05-27 10:02 ` [tip:perf/core] perf/x86/intel/cqm: " tip-bot for Thomas Gleixner
2015-05-19 0:00 ` [patch 2/6] x86, perf, cqm: Use proper data type Thomas Gleixner
2015-05-19 8:58 ` Matt Fleming
2015-05-19 13:03 ` Thomas Gleixner
2015-05-27 10:03 ` tip-bot for Thomas Gleixner [this message]
2015-05-19 0:00 ` [patch 3/6] x86, perf, cqm: Remove pointless spinlock from state cache Thomas Gleixner
2015-05-19 9:13 ` Matt Fleming
2015-05-19 10:51 ` Peter Zijlstra
2015-05-27 10:03 ` [tip:perf/core] perf/x86/intel/cqm: " tip-bot for Thomas Gleixner
2015-06-05 18:13 ` [patch 3/6] x86, perf, cqm: " Juvva, Kanaka D
2015-05-19 0:00 ` [patch 4/6] x86, perf, cqm: Avoid pointless msr write Thomas Gleixner
2015-05-19 9:17 ` Matt Fleming
2015-05-27 10:03 ` [tip:perf/core] perf/x86/intel/cqm: Avoid pointless MSR write tip-bot for Thomas Gleixner
2015-05-19 0:00 ` [patch 5/6] x86, perf, cqm: Remove useless wrapper function Thomas Gleixner
2015-05-19 9:18 ` Matt Fleming
2015-05-27 10:04 ` [tip:perf/core] perf/x86/intel/cqm: " tip-bot for Thomas Gleixner
2015-05-19 0:00 ` [patch 6/6] x86, perf, cqm: Add storage for closid and cleanup struct intel_pqr_state Thomas Gleixner
2015-05-19 11:54 ` Matt Fleming
2015-05-19 12:59 ` Thomas Gleixner
2015-05-27 10:04 ` [tip:perf/core] perf/x86/intel/cqm: Add storage for 'closid' and clean up 'struct intel_pqr_state' tip-bot for Thomas Gleixner
2015-05-19 7:42 ` [patch 0/6] x86, perf, cqm: Cleanups and preparation for RDT/CAT Peter Zijlstra
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