* [PATCH] perf: fix comments in PERF_MEM_LVL bitmask
@ 2013-04-05 14:49 Stephane Eranian
2013-04-08 15:33 ` [tip:perf/core] perf: Fix " tip-bot for Stephane Eranian
0 siblings, 1 reply; 2+ messages in thread
From: Stephane Eranian @ 2013-04-05 14:49 UTC (permalink / raw)
To: linux-kernel; +Cc: mingo, peterz, jolsa
This small patch fixes a mistake in the comments
for the PERF_MEM_LVL_* events. The L2, L3 bits simply
represent cache levels, not hits or misses. That is
encoded in PERF_MEM_LVL_MISS/PERF_MEM_LVL_HIT.
Signed-off-by: Stephane Eranian <eranian@google.com>
---
diff --git a/include/uapi/linux/perf_event.h b/include/uapi/linux/perf_event.h
index 964a450..fb104e5 100644
--- a/include/uapi/linux/perf_event.h
+++ b/include/uapi/linux/perf_event.h
@@ -645,8 +645,8 @@ union perf_mem_data_src {
#define PERF_MEM_LVL_MISS 0x04 /* miss level */
#define PERF_MEM_LVL_L1 0x08 /* L1 */
#define PERF_MEM_LVL_LFB 0x10 /* Line Fill Buffer */
-#define PERF_MEM_LVL_L2 0x20 /* L2 hit */
-#define PERF_MEM_LVL_L3 0x40 /* L3 hit */
+#define PERF_MEM_LVL_L2 0x20 /* L2 */
+#define PERF_MEM_LVL_L3 0x40 /* L3 */
#define PERF_MEM_LVL_LOC_RAM 0x80 /* Local DRAM */
#define PERF_MEM_LVL_REM_RAM1 0x100 /* Remote DRAM (1 hop) */
#define PERF_MEM_LVL_REM_RAM2 0x200 /* Remote DRAM (2 hops) */
^ permalink raw reply related [flat|nested] 2+ messages in thread* [tip:perf/core] perf: Fix comments in PERF_MEM_LVL bitmask
2013-04-05 14:49 [PATCH] perf: fix comments in PERF_MEM_LVL bitmask Stephane Eranian
@ 2013-04-08 15:33 ` tip-bot for Stephane Eranian
0 siblings, 0 replies; 2+ messages in thread
From: tip-bot for Stephane Eranian @ 2013-04-08 15:33 UTC (permalink / raw)
To: linux-tip-commits; +Cc: linux-kernel, eranian, hpa, mingo, tglx
Commit-ID: cc2f5a8adbc7ab1fdb7d9bcf4ea9838c73e82dfe
Gitweb: http://git.kernel.org/tip/cc2f5a8adbc7ab1fdb7d9bcf4ea9838c73e82dfe
Author: Stephane Eranian <eranian@google.com>
AuthorDate: Fri, 5 Apr 2013 16:49:41 +0200
Committer: Ingo Molnar <mingo@kernel.org>
CommitDate: Mon, 8 Apr 2013 13:54:24 +0200
perf: Fix comments in PERF_MEM_LVL bitmask
This small patch fixes a mistake in the comments
for the PERF_MEM_LVL_* events. The L2, L3 bits simply
represent cache levels, not hits or misses. That is
encoded in PERF_MEM_LVL_MISS/PERF_MEM_LVL_HIT.
Signed-off-by: Stephane Eranian <eranian@google.com>
Cc: peterz@infradead.org
Cc: jolsa@redhat.com
Link: http://lkml.kernel.org/r/20130405144941.GA30503@quad
Signed-off-by: Ingo Molnar <mingo@kernel.org>
---
include/uapi/linux/perf_event.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/uapi/linux/perf_event.h b/include/uapi/linux/perf_event.h
index 964a450..fb104e5 100644
--- a/include/uapi/linux/perf_event.h
+++ b/include/uapi/linux/perf_event.h
@@ -645,8 +645,8 @@ union perf_mem_data_src {
#define PERF_MEM_LVL_MISS 0x04 /* miss level */
#define PERF_MEM_LVL_L1 0x08 /* L1 */
#define PERF_MEM_LVL_LFB 0x10 /* Line Fill Buffer */
-#define PERF_MEM_LVL_L2 0x20 /* L2 hit */
-#define PERF_MEM_LVL_L3 0x40 /* L3 hit */
+#define PERF_MEM_LVL_L2 0x20 /* L2 */
+#define PERF_MEM_LVL_L3 0x40 /* L3 */
#define PERF_MEM_LVL_LOC_RAM 0x80 /* Local DRAM */
#define PERF_MEM_LVL_REM_RAM1 0x100 /* Remote DRAM (1 hop) */
#define PERF_MEM_LVL_REM_RAM2 0x200 /* Remote DRAM (2 hops) */
^ permalink raw reply related [flat|nested] 2+ messages in thread
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2013-04-05 14:49 [PATCH] perf: fix comments in PERF_MEM_LVL bitmask Stephane Eranian
2013-04-08 15:33 ` [tip:perf/core] perf: Fix " tip-bot for Stephane Eranian
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