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From: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
To: Zidan Wang <zidan.wang@freescale.com>
Cc: tiwai@suse.de, alsa-devel@alsa-project.org, broonie@kernel.org,
	patches@opensource.wolfsonmicro.com
Subject: Re: [PATCH v3] ASoC: wm8960: update pll and clock	setting function
Date: Mon, 10 Aug 2015 09:32:46 +0100	[thread overview]
Message-ID: <20150810083246.GH25225@opensource.wolfsonmicro.com> (raw)
In-Reply-To: <ac311441efbc167953de3ab8706217c3c669f88d.1436776563.git.zidan.wang@freescale.com>

On Mon, Jul 13, 2015 at 04:41:00PM +0800, Zidan Wang wrote:
> Add sysclk auto mode. When it's sysclk auto mode, if the MCLK is
> available for clock configure, using MCLK to provide sysclk directly,
> otherwise, search a available pll out frequcncy and set pll.
> 
> Configure clock in hw_params may cause problems when using bypass style
> paths without hw_params in machine driver getting called. So add configure
> clock to set_bias_level.
> 
> Signed-off-by: Zidan Wang <zidan.wang@freescale.com>
> ---
<snip>
> @@ -711,6 +785,9 @@ static int wm8960_set_bias_level_out3(struct snd_soc_codec *codec,
>  	case SND_SOC_BIAS_PREPARE:
>  		switch (snd_soc_codec_get_bias_level(codec)) {
>  		case SND_SOC_BIAS_STANDBY:
> +			ret = wm8960_configure_clocking(codec);
> +			if (ret)
> +				return ret;

Is it right that we are calling wm8960_configure_clocking before
clk_prepare_enable? As configure_clocking will enable the clocks
shouldn't mclk be available before then?

>  			if (!IS_ERR(wm8960->mclk)) {
>  				ret = clk_prepare_enable(wm8960->mclk);
>  				if (ret) {
> @@ -726,6 +803,13 @@ static int wm8960_set_bias_level_out3(struct snd_soc_codec *codec,
>  			break;
>  
>  		case SND_SOC_BIAS_ON:
> +			/*
> +			 * If it's sysclk auto mode, and the pll is enabled,
> +			 * disable the pll
> +			 */
> +			if (wm8960->clk_id == WM8960_SYSCLK_AUTO && (pm2 & 0x1))
> +				wm8960_set_pll(codec, 0, 0);
> +
>  			if (!IS_ERR(wm8960->mclk))
>  				clk_disable_unprepare(wm8960->mclk);
>  			break;
> @@ -780,6 +864,7 @@ static int wm8960_set_bias_level_capless(struct snd_soc_codec *codec,
>  					 enum snd_soc_bias_level level)
>  {
>  	struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
> +	u16 pm2 = snd_soc_read(codec, WM8960_POWER2);
>  	int reg, ret;
>  
>  	switch (level) {
> @@ -822,6 +907,10 @@ static int wm8960_set_bias_level_capless(struct snd_soc_codec *codec,
>  
>  			msleep(100);
>  
> +			ret = wm8960_configure_clocking(codec);
> +			if (ret)
> +				return ret;
> +

Ditto here.

Other than that I think this looks ok to me.

Thanks,
Charles

  parent reply	other threads:[~2015-08-10  8:32 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-07-13  8:41 [PATCH v3] ASoC: wm8960: update pll and clock setting function Zidan Wang
2015-08-04  1:28 ` Zidan Wang
2015-08-06  8:12   ` Charles Keepax
2015-08-10  8:32 ` Charles Keepax [this message]
2015-08-10  8:08   ` Zidan Wang
2015-08-10 13:47     ` Charles Keepax

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