* Bug in tlv320adc3101 driver
@ 2024-07-31 7:44 Terry Sanders
2024-07-31 7:48 ` [EXTERNAL] " Ding, Shenghao
0 siblings, 1 reply; 2+ messages in thread
From: Terry Sanders @ 2024-07-31 7:44 UTC (permalink / raw)
To: Shenghao Ding, Kevin Lu, Baojun Xu; +Cc: alsa-devel
Hi,
There is a bug in the code for the tlv320adc3101 driver when setting up the D value for PLL.
The D value is set via I2C using page 0 registers 7 (MSB) and 8 (LSB). The data sheet has the following information for the registers:
"Page 0 / Register 7 will be updated when Page 0 / Register 8 is written immediately after Page 0 / Register 7 is written"
and:
"Page 0 / Register 8 must be written immediately after writing to Page 0 / Register 7"
The function that implements this is adc3xxx_setup_pll() in file soc/codecs/tlv320adc3xxx.c line 1172 - 1189. The function is shown below:
static void adc3xxx_setup_pll(struct snd_soc_component *component,
int div_entry)
{
int i = div_entry;
/* P & R values */
snd_soc_component_write(component, ADC3XXX_PLL_PROG_PR,
(adc3xxx_divs[i].pll_p << ADC3XXX_PLLP_SHIFT) |
(adc3xxx_divs[i].pll_r << ADC3XXX_PLLR_SHIFT));
/* J value */
snd_soc_component_write(component, ADC3XXX_PLL_PROG_J,
adc3xxx_divs[i].pll_j & ADC3XXX_PLLJ_MASK);
/* D value */
snd_soc_component_write(component, ADC3XXX_PLL_PROG_D_LSB,
adc3xxx_divs[i].pll_d & ADC3XXX_PLLD_LSB_MASK);
snd_soc_component_write(component, ADC3XXX_PLL_PROG_D_MSB,
(adc3xxx_divs[i].pll_d >> 8) & ADC3XXX_PLLD_MSB_MASK);
}
In the function the LSB (register 8) is written first followed by the MSB (register 7). This is the wrong way around and should be swapped so that the MSB is written first.
Regards
Terry Sanders
^ permalink raw reply [flat|nested] 2+ messages in thread
* RE: [EXTERNAL] Bug in tlv320adc3101 driver
2024-07-31 7:44 Bug in tlv320adc3101 driver Terry Sanders
@ 2024-07-31 7:48 ` Ding, Shenghao
0 siblings, 0 replies; 2+ messages in thread
From: Ding, Shenghao @ 2024-07-31 7:48 UTC (permalink / raw)
To: Terry Sanders, Kasargod, Sandeep
Cc: alsa-devel@alsa-project.org, Xu, Baojun, Lu, Kevin
Let me loop @Kasargod, Sandeep<mailto:sandeepk@ti.com>
Hi Sandeep
Kindly support a request for Linux.
BR
Shenghao Ding
From: Terry Sanders <linux@vertone.co.uk>
Sent: Wednesday, July 31, 2024 3:45 PM
To: Ding, Shenghao <shenghao-ding@ti.com>; Lu, Kevin <kevin-lu@ti.com>; Xu, Baojun <baojun.xu@ti.com>
Cc: alsa-devel@alsa-project.org
Subject: [EXTERNAL] Bug in tlv320adc3101 driver
Hi, There is a bug in the code for the tlv320adc3101 driver when setting up the D value for PLL. The D value is set via I2C using page 0 registers 7 (MSB) and 8 (LSB). The data sheet has the following information for the registers: "Page 0 /
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Hi,
There is a bug in the code for the tlv320adc3101 driver when setting up the D value for PLL.
The D value is set via I2C using page 0 registers 7 (MSB) and 8 (LSB). The data sheet has the following information for the registers:
"Page 0 / Register 7 will be updated when Page 0 / Register 8 is written immediately after Page 0 / Register 7 is written"
and:
"Page 0 / Register 8 must be written immediately after writing to Page 0 / Register 7"
The function that implements this is adc3xxx_setup_pll() in file soc/codecs/tlv320adc3xxx.c line 1172 - 1189. The function is shown below:
static void adc3xxx_setup_pll(struct snd_soc_component *component,
int div_entry)
{
int i = div_entry;
/* P & R values */
snd_soc_component_write(component, ADC3XXX_PLL_PROG_PR,
(adc3xxx_divs[i].pll_p << ADC3XXX_PLLP_SHIFT) |
(adc3xxx_divs[i].pll_r << ADC3XXX_PLLR_SHIFT));
/* J value */
snd_soc_component_write(component, ADC3XXX_PLL_PROG_J,
adc3xxx_divs[i].pll_j & ADC3XXX_PLLJ_MASK);
/* D value */
snd_soc_component_write(component, ADC3XXX_PLL_PROG_D_LSB,
adc3xxx_divs[i].pll_d & ADC3XXX_PLLD_LSB_MASK);
snd_soc_component_write(component, ADC3XXX_PLL_PROG_D_MSB,
(adc3xxx_divs[i].pll_d >> 8) & ADC3XXX_PLLD_MSB_MASK);
}
In the function the LSB (register 8) is written first followed by the MSB (register 7). This is the wrong way around and should be swapped so that the MSB is written first.
Regards
Terry Sanders
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