Re: [RFC 0/7] RFC: Usermode queue for AMDGPU driver

["Christian König" <ckoenig.leichtzumerken@gmail.com>]

Am 03.01.23 um 11:00 schrieb Shashank Sharma:
>
> On 03/01/2023 10:47, Christian König wrote:
>> Am 03.01.23 um 10:43 schrieb Shashank Sharma:
>>>
>>> On 29/12/2022 19:02, Alex Deucher wrote:
>>>> On Fri, Dec 23, 2022 at 2:37 PM Shashank Sharma 
>>>> <shashank.sharma@amd.com> wrote:
>>>>> This is a RFC series to implement usermode graphics queues for AMDGPU
>>>>> driver (Navi 3X and above). The idea of usermode graphics queue is to
>>>>> allow direct workload submission from a userspace graphics process 
>>>>> who
>>>>> has amdgpu graphics context.
>>>>>
>>>>> Once we have some initial feedback on the design, we will publish a
>>>>> follow up V1 series with a libdrm consumer test.
>>>> I think this should look more like the following:
>>>> 1. Convert doorbells to full fledged GEM objects just like vram.  Then
>>>> update the GEM IOCTL to allow allocation of doorbell BOs.
>>>> 2. Store MQD data per amdgpu_ctx.
>>>
>>> If my understanding of the comments is correct, we are having 
>>> conflicting opinions here on where to save the MQD data. @Christian ?
>>
>> You need something like an amdgpu_userq object which holds the BO 
>> with the MQD the hardware is using as well as anything else necessary 
>> for the queue.
>
> And we will be storing it into fpriv->amdgpu driver_private area 
> (probably by using something like amdgpu_useq_mgr or similar), similar 
> to amdgpu_ctx_mgr.

Exactly that, yes. The amdgpu_userq_mgr keeps the idr/mutex and 
everything necessary per client while the amdgpu_userq object represents 
the queue itself.

Christian.

>
> - Shashank
>
>>
>> Regards,
>> Christian.
>>
>>>
>>>> 3. Create secure semaphore pool and map RO into each GPUVM.
>>>> 4. Add callbacks to each IP type that supports user mode queues.
>>>> These callbacks should handle the IP specific MQD initialization and
>>>> mapping/unmapping details including allocation of BOs for the MQD
>>>> itself and any relevant metadata.  The USERQ IOCTL handler will look
>>>> up the callback based on the IP type specified in the IOCTL.
>>>
>>> Noted.
>>>
>>> Shashank
>>>
>>>>
>>>> Alex
>>>>
>>>>> Cc: Alex Deucher <alexander.deucher@amd.com>
>>>>> Cc: Christian Koenig <christian.koenig@amd.com>
>>>>>
>>>>> Alex Deucher (1):
>>>>>    drm/amdgpu: UAPI for user queue management
>>>>>
>>>>> Arunpravin Paneer Selvam (1):
>>>>>    drm/amdgpu: Secure semaphore for usermode queue
>>>>>
>>>>> Arvind Yadav (1):
>>>>>    drm/amdgpu: Create MQD for userspace queue
>>>>>
>>>>> Shashank Sharma (4):
>>>>>    drm/amdgpu: Add usermode queue for gfx work
>>>>>    drm/amdgpu: Allocate doorbell slot for user queue
>>>>>    drm/amdgpu: Create context for usermode queue
>>>>>    drm/amdgpu: Map userqueue into HW
>>>>>
>>>>>   drivers/gpu/drm/amd/amdgpu/Makefile           |   3 +
>>>>>   drivers/gpu/drm/amd/amdgpu/amdgpu.h           |  14 +
>>>>>   drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h       |   1 +
>>>>>   drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c | 486 
>>>>> ++++++++++++++++
>>>>>   .../amd/amdgpu/amdgpu_userqueue_secure_sem.c  | 245 ++++++++
>>>>>   .../drm/amd/include/amdgpu_usermode_queue.h   |  68 +++
>>>>>   .../amd/include/amdgpu_usermode_queue_mqd.h   | 544 
>>>>> ++++++++++++++++++
>>>>>   include/uapi/drm/amdgpu_drm.h                 |  52 ++
>>>>>   8 files changed, 1413 insertions(+)
>>>>>   create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c
>>>>>   create mode 100644 
>>>>> drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue_secure_sem.c
>>>>>   create mode 100644 
>>>>> drivers/gpu/drm/amd/include/amdgpu_usermode_queue.h
>>>>>   create mode 100644 
>>>>> drivers/gpu/drm/amd/include/amdgpu_usermode_queue_mqd.h
>>>>>
>>>>> -- 
>>>>> 2.34.1
>>>>>
>>