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From: "Christian König" <christian.koenig@amd.com>
To: "Somalapuram, Amaranath" <asomalap@amd.com>,
	Somalapuram Amaranath <Amaranath.Somalapuram@amd.com>,
	amd-gfx@lists.freedesktop.org
Cc: alexander.deucher@amd.com, shashank.sharma@amd.com
Subject: Re: [PATCH v3 1/2] drm/amdgpu: add debugfs for reset registers list
Date: Mon, 14 Feb 2022 14:26:38 +0100	[thread overview]
Message-ID: <0b655bb8-b09c-ec84-1966-b609184ba8ca@amd.com> (raw)
In-Reply-To: <38f77045-7a4d-6d89-7cc6-9b1dcb6c24b3@amd.com>

Am 14.02.22 um 14:15 schrieb Somalapuram, Amaranath:
>
> On 2/14/2022 2:59 PM, Christian König wrote:
>>
>>
>> Am 14.02.22 um 10:16 schrieb Somalapuram Amaranath:
>>> List of register populated for dump collection during the GPU reset.
>>>
>>> Signed-off-by: Somalapuram Amaranath <Amaranath.Somalapuram@amd.com>
>>> ---
>>>   drivers/gpu/drm/amd/amdgpu/amdgpu.h         |  4 ++
>>>   drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c | 80 
>>> +++++++++++++++++++++
>>>   2 files changed, 84 insertions(+)
>>>
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
>>> b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>>> index b85b67a88a3d..2e8c2318276d 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>>> @@ -1097,6 +1097,10 @@ struct amdgpu_device {
>>>         struct amdgpu_reset_control     *reset_cntl;
>>>       uint32_t ip_versions[HW_ID_MAX][HWIP_MAX_INSTANCE];
>>> +
>>> +    /* reset dump register */
>>> +    uint32_t            *reset_dump_reg_list;
>>> +    int                             n_regs;
>>>   };
>>>     static inline struct amdgpu_device *drm_to_adev(struct 
>>> drm_device *ddev)
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c 
>>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
>>> index 164d6a9e9fbb..6d49bed5b761 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
>>> @@ -1609,6 +1609,84 @@ DEFINE_DEBUGFS_ATTRIBUTE(fops_ib_preempt, NULL,
>>>   DEFINE_DEBUGFS_ATTRIBUTE(fops_sclk_set, NULL,
>>>               amdgpu_debugfs_sclk_set, "%llu\n");
>>>   +static ssize_t amdgpu_reset_dump_register_list_read(struct file *f,
>>> +                char __user *buf, size_t size, loff_t *pos)
>>> +{
>>> +    struct amdgpu_device *adev = (struct amdgpu_device 
>>> *)file_inode(f)->i_private;
>>> +    char *reg_offset;
>>> +    int i, r, len;
>>> +
>>> +    if (adev->n_regs == 0)
>>> +        return 0;
>>> +
>>> +    reg_offset = kmalloc((adev->n_regs * 11) + 1, GFP_KERNEL);
>>> +    memset(reg_offset,  0, (adev->n_regs * 11) + 1);
>>> +
>>> +    for (i = 0; i < adev->n_regs; i++)
>>> +        sprintf(reg_offset + strlen(reg_offset), "0x%x ", 
>>> adev->reset_dump_reg_list[i]);
>>> +
>>> +    sprintf(reg_offset + strlen(reg_offset), "\n");
>>> +    len = strlen(reg_offset);
>>> +
>>> +    if (*pos >= len)
>>> +        return 0;
>>> +
>>> +    r = copy_to_user(buf, reg_offset, len);
>>
>> Maybe better copy that to userspace one register at a time. This is 
>> not performance critical in any way.
>>
>> Same for the write function.
>>
>> Regards,
>> Christian.
>>
> I tried to push all list of register in one go, so that the list can 
> be overwritten/updated (every write makes new list)
> if we add one register at a time from user-space the design will 
> change to appending the list and cant be edited or updated, it should 
> be OK ?
> and don't see much use of **_read api (as we can see the list in 
> trace) i will remove it (debugfs interface will change from string to 
> uint32_t )!?

You misunderstood me, that's not what I've meant.

What you should do is to have multiple copy_to_user calls dumping only 
one register at at time to avoid allocating all that temporary memory.

Regards,
Christian.

>
> Regards,
> S.Amarnath
>>> +    *pos += len - r;
>>> +    kfree(reg_offset);
>>> +
>>> +    return len - r;
>>> +}
>>> +
>>> +static ssize_t amdgpu_reset_dump_register_list_write(struct file *f,
>>> +            const char __user *buf, size_t size, loff_t *pos)
>>> +{
>>> +    struct amdgpu_device *adev = (struct amdgpu_device 
>>> *)file_inode(f)->i_private;
>>> +    char *reg_offset, *reg;
>>> +    int ret, i = 0;
>>> +
>>> +    reg_offset = kmalloc(size, GFP_KERNEL);
>>> +    memset(reg_offset,  0, size);
>>> +    ret = copy_from_user(reg_offset, buf, size);
>>> +
>>> +    if (ret)
>>> +        return -EFAULT;
>>> +
>>> +    if (adev->n_regs > 0) {
>>> +        adev->n_regs = 0;
>>> +        kfree(adev->reset_dump_reg_list);
>>> +        adev->reset_dump_reg_list = NULL;
>>> +    }
>>> +
>>> +    while ((reg = strsep(&reg_offset, " ")) != NULL) {
>>> +        adev->reset_dump_reg_list =  krealloc_array(
>>> +                        adev->reset_dump_reg_list, 1,
>>> +                        sizeof(uint32_t), GFP_KERNEL);
>>> +        ret  = kstrtouint(reg, 16, &adev->reset_dump_reg_list[i]);
>>> +
>>> +        if (ret) {
>>> +            kfree(adev->reset_dump_reg_list);
>>> +            kfree(reg_offset);
>>> +            adev->reset_dump_reg_list = NULL;
>>> +            return -EINVAL;
>>> +        }
>>> +
>>> +        i++;
>>> +    }
>>> +
>>> +    adev->n_regs = i;
>>> +    kfree(reg_offset);
>>> +
>>> +    return size;
>>> +}
>>> +
>>> +static const struct file_operations amdgpu_reset_dump_register_list 
>>> = {
>>> +    .owner = THIS_MODULE,
>>> +    .read = amdgpu_reset_dump_register_list_read,
>>> +    .write = amdgpu_reset_dump_register_list_write,
>>> +    .llseek = default_llseek
>>> +};
>>> +
>>>   int amdgpu_debugfs_init(struct amdgpu_device *adev)
>>>   {
>>>       struct dentry *root = adev_to_drm(adev)->primary->debugfs_root;
>>> @@ -1672,6 +1750,8 @@ int amdgpu_debugfs_init(struct amdgpu_device 
>>> *adev)
>>>                   &amdgpu_debugfs_test_ib_fops);
>>>       debugfs_create_file("amdgpu_vm_info", 0444, root, adev,
>>>                   &amdgpu_debugfs_vm_info_fops);
>>> +    debugfs_create_file("amdgpu_reset_dump_register_list", 0644, 
>>> root, adev,
>>> +                &amdgpu_reset_dump_register_list);
>>>         adev->debugfs_vbios_blob.data = adev->bios;
>>>       adev->debugfs_vbios_blob.size = adev->bios_size;
>>


      reply	other threads:[~2022-02-14 13:26 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-02-14  9:16 [PATCH v3 1/2] drm/amdgpu: add debugfs for reset registers list Somalapuram Amaranath
2022-02-14  9:16 ` [PATCH v3 2/2] drm/amdgpu: add reset register dump trace function on GPU reset Somalapuram Amaranath
2022-02-14  9:31   ` Christian König
2022-02-14  9:29 ` [PATCH v3 1/2] drm/amdgpu: add debugfs for reset registers list Christian König
2022-02-14 13:15   ` Somalapuram, Amaranath
2022-02-14 13:26     ` Christian König [this message]

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