* [PATCH v3 1/2] drm/amdgpu: add debugfs for reset registers list
@ 2022-02-14 9:16 Somalapuram Amaranath
2022-02-14 9:16 ` [PATCH v3 2/2] drm/amdgpu: add reset register dump trace function on GPU reset Somalapuram Amaranath
2022-02-14 9:29 ` [PATCH v3 1/2] drm/amdgpu: add debugfs for reset registers list Christian König
0 siblings, 2 replies; 6+ messages in thread
From: Somalapuram Amaranath @ 2022-02-14 9:16 UTC (permalink / raw)
To: amd-gfx
Cc: alexander.deucher, Somalapuram Amaranath, christian.koenig,
shashank.sharma
List of register populated for dump collection during the GPU reset.
Signed-off-by: Somalapuram Amaranath <Amaranath.Somalapuram@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 4 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c | 80 +++++++++++++++++++++
2 files changed, 84 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index b85b67a88a3d..2e8c2318276d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1097,6 +1097,10 @@ struct amdgpu_device {
struct amdgpu_reset_control *reset_cntl;
uint32_t ip_versions[HW_ID_MAX][HWIP_MAX_INSTANCE];
+
+ /* reset dump register */
+ uint32_t *reset_dump_reg_list;
+ int n_regs;
};
static inline struct amdgpu_device *drm_to_adev(struct drm_device *ddev)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
index 164d6a9e9fbb..6d49bed5b761 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
@@ -1609,6 +1609,84 @@ DEFINE_DEBUGFS_ATTRIBUTE(fops_ib_preempt, NULL,
DEFINE_DEBUGFS_ATTRIBUTE(fops_sclk_set, NULL,
amdgpu_debugfs_sclk_set, "%llu\n");
+static ssize_t amdgpu_reset_dump_register_list_read(struct file *f,
+ char __user *buf, size_t size, loff_t *pos)
+{
+ struct amdgpu_device *adev = (struct amdgpu_device *)file_inode(f)->i_private;
+ char *reg_offset;
+ int i, r, len;
+
+ if (adev->n_regs == 0)
+ return 0;
+
+ reg_offset = kmalloc((adev->n_regs * 11) + 1, GFP_KERNEL);
+ memset(reg_offset, 0, (adev->n_regs * 11) + 1);
+
+ for (i = 0; i < adev->n_regs; i++)
+ sprintf(reg_offset + strlen(reg_offset), "0x%x ", adev->reset_dump_reg_list[i]);
+
+ sprintf(reg_offset + strlen(reg_offset), "\n");
+ len = strlen(reg_offset);
+
+ if (*pos >= len)
+ return 0;
+
+ r = copy_to_user(buf, reg_offset, len);
+ *pos += len - r;
+ kfree(reg_offset);
+
+ return len - r;
+}
+
+static ssize_t amdgpu_reset_dump_register_list_write(struct file *f,
+ const char __user *buf, size_t size, loff_t *pos)
+{
+ struct amdgpu_device *adev = (struct amdgpu_device *)file_inode(f)->i_private;
+ char *reg_offset, *reg;
+ int ret, i = 0;
+
+ reg_offset = kmalloc(size, GFP_KERNEL);
+ memset(reg_offset, 0, size);
+ ret = copy_from_user(reg_offset, buf, size);
+
+ if (ret)
+ return -EFAULT;
+
+ if (adev->n_regs > 0) {
+ adev->n_regs = 0;
+ kfree(adev->reset_dump_reg_list);
+ adev->reset_dump_reg_list = NULL;
+ }
+
+ while ((reg = strsep(®_offset, " ")) != NULL) {
+ adev->reset_dump_reg_list = krealloc_array(
+ adev->reset_dump_reg_list, 1,
+ sizeof(uint32_t), GFP_KERNEL);
+ ret = kstrtouint(reg, 16, &adev->reset_dump_reg_list[i]);
+
+ if (ret) {
+ kfree(adev->reset_dump_reg_list);
+ kfree(reg_offset);
+ adev->reset_dump_reg_list = NULL;
+ return -EINVAL;
+ }
+
+ i++;
+ }
+
+ adev->n_regs = i;
+ kfree(reg_offset);
+
+ return size;
+}
+
+static const struct file_operations amdgpu_reset_dump_register_list = {
+ .owner = THIS_MODULE,
+ .read = amdgpu_reset_dump_register_list_read,
+ .write = amdgpu_reset_dump_register_list_write,
+ .llseek = default_llseek
+};
+
int amdgpu_debugfs_init(struct amdgpu_device *adev)
{
struct dentry *root = adev_to_drm(adev)->primary->debugfs_root;
@@ -1672,6 +1750,8 @@ int amdgpu_debugfs_init(struct amdgpu_device *adev)
&amdgpu_debugfs_test_ib_fops);
debugfs_create_file("amdgpu_vm_info", 0444, root, adev,
&amdgpu_debugfs_vm_info_fops);
+ debugfs_create_file("amdgpu_reset_dump_register_list", 0644, root, adev,
+ &amdgpu_reset_dump_register_list);
adev->debugfs_vbios_blob.data = adev->bios;
adev->debugfs_vbios_blob.size = adev->bios_size;
--
2.25.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH v3 2/2] drm/amdgpu: add reset register dump trace function on GPU reset
2022-02-14 9:16 [PATCH v3 1/2] drm/amdgpu: add debugfs for reset registers list Somalapuram Amaranath
@ 2022-02-14 9:16 ` Somalapuram Amaranath
2022-02-14 9:31 ` Christian König
2022-02-14 9:29 ` [PATCH v3 1/2] drm/amdgpu: add debugfs for reset registers list Christian König
1 sibling, 1 reply; 6+ messages in thread
From: Somalapuram Amaranath @ 2022-02-14 9:16 UTC (permalink / raw)
To: amd-gfx
Cc: alexander.deucher, Somalapuram Amaranath, christian.koenig,
shashank.sharma
Dump the list of register values to trace event on GPU reset.
Signed-off-by: Somalapuram Amaranath <Amaranath.Somalapuram@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 17 ++++++++++++++++-
drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h | 16 ++++++++++++++++
2 files changed, 32 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 1e651b959141..4e11a93134cf 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -4534,6 +4534,19 @@ int amdgpu_device_pre_asic_reset(struct amdgpu_device *adev,
return r;
}
+static int amdgpu_reset_reg_dumps(struct amdgpu_device *adev)
+{
+ int i;
+ uint32_t reg_value;
+
+ for (i = 0; i < adev->n_regs; i++) {
+ reg_value = RREG32(adev->reset_dump_reg_list[i]);
+ trace_amdgpu_reset_reg_dumps(adev->reset_dump_reg_list[i], reg_value);
+ }
+
+ return 0;
+}
+
int amdgpu_do_asic_reset(struct list_head *device_list_handle,
struct amdgpu_reset_context *reset_context)
{
@@ -4567,8 +4580,10 @@ int amdgpu_do_asic_reset(struct list_head *device_list_handle,
tmp_adev->gmc.xgmi.pending_reset = false;
if (!queue_work(system_unbound_wq, &tmp_adev->xgmi_reset_work))
r = -EALREADY;
- } else
+ } else {
+ amdgpu_reset_reg_dumps(tmp_adev);
r = amdgpu_asic_reset(tmp_adev);
+ }
if (r) {
dev_err(tmp_adev->dev, "ASIC reset failed with error, %d for drm dev, %s",
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h
index d855cb53c7e0..b9637925e85c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h
@@ -537,6 +537,22 @@ TRACE_EVENT(amdgpu_ib_pipe_sync,
__entry->seqno)
);
+TRACE_EVENT(amdgpu_reset_reg_dumps,
+ TP_PROTO(uint32_t address, uint32_t value),
+ TP_ARGS(address, value),
+ TP_STRUCT__entry(
+ __field(uint32_t, address)
+ __field(uint32_t, value)
+ ),
+ TP_fast_assign(
+ __entry->address = address;
+ __entry->value = value;
+ ),
+ TP_printk("amdgpu register dump 0x%x: 0x%x",
+ __entry->address,
+ __entry->value)
+);
+
#undef AMDGPU_JOB_GET_TIMELINE_NAME
#endif
--
2.25.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH v3 1/2] drm/amdgpu: add debugfs for reset registers list
2022-02-14 9:16 [PATCH v3 1/2] drm/amdgpu: add debugfs for reset registers list Somalapuram Amaranath
2022-02-14 9:16 ` [PATCH v3 2/2] drm/amdgpu: add reset register dump trace function on GPU reset Somalapuram Amaranath
@ 2022-02-14 9:29 ` Christian König
2022-02-14 13:15 ` Somalapuram, Amaranath
1 sibling, 1 reply; 6+ messages in thread
From: Christian König @ 2022-02-14 9:29 UTC (permalink / raw)
To: Somalapuram Amaranath, amd-gfx; +Cc: alexander.deucher, shashank.sharma
Am 14.02.22 um 10:16 schrieb Somalapuram Amaranath:
> List of register populated for dump collection during the GPU reset.
>
> Signed-off-by: Somalapuram Amaranath <Amaranath.Somalapuram@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu.h | 4 ++
> drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c | 80 +++++++++++++++++++++
> 2 files changed, 84 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index b85b67a88a3d..2e8c2318276d 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -1097,6 +1097,10 @@ struct amdgpu_device {
>
> struct amdgpu_reset_control *reset_cntl;
> uint32_t ip_versions[HW_ID_MAX][HWIP_MAX_INSTANCE];
> +
> + /* reset dump register */
> + uint32_t *reset_dump_reg_list;
> + int n_regs;
> };
>
> static inline struct amdgpu_device *drm_to_adev(struct drm_device *ddev)
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
> index 164d6a9e9fbb..6d49bed5b761 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
> @@ -1609,6 +1609,84 @@ DEFINE_DEBUGFS_ATTRIBUTE(fops_ib_preempt, NULL,
> DEFINE_DEBUGFS_ATTRIBUTE(fops_sclk_set, NULL,
> amdgpu_debugfs_sclk_set, "%llu\n");
>
> +static ssize_t amdgpu_reset_dump_register_list_read(struct file *f,
> + char __user *buf, size_t size, loff_t *pos)
> +{
> + struct amdgpu_device *adev = (struct amdgpu_device *)file_inode(f)->i_private;
> + char *reg_offset;
> + int i, r, len;
> +
> + if (adev->n_regs == 0)
> + return 0;
> +
> + reg_offset = kmalloc((adev->n_regs * 11) + 1, GFP_KERNEL);
> + memset(reg_offset, 0, (adev->n_regs * 11) + 1);
> +
> + for (i = 0; i < adev->n_regs; i++)
> + sprintf(reg_offset + strlen(reg_offset), "0x%x ", adev->reset_dump_reg_list[i]);
> +
> + sprintf(reg_offset + strlen(reg_offset), "\n");
> + len = strlen(reg_offset);
> +
> + if (*pos >= len)
> + return 0;
> +
> + r = copy_to_user(buf, reg_offset, len);
Maybe better copy that to userspace one register at a time. This is not
performance critical in any way.
Same for the write function.
Regards,
Christian.
> + *pos += len - r;
> + kfree(reg_offset);
> +
> + return len - r;
> +}
> +
> +static ssize_t amdgpu_reset_dump_register_list_write(struct file *f,
> + const char __user *buf, size_t size, loff_t *pos)
> +{
> + struct amdgpu_device *adev = (struct amdgpu_device *)file_inode(f)->i_private;
> + char *reg_offset, *reg;
> + int ret, i = 0;
> +
> + reg_offset = kmalloc(size, GFP_KERNEL);
> + memset(reg_offset, 0, size);
> + ret = copy_from_user(reg_offset, buf, size);
> +
> + if (ret)
> + return -EFAULT;
> +
> + if (adev->n_regs > 0) {
> + adev->n_regs = 0;
> + kfree(adev->reset_dump_reg_list);
> + adev->reset_dump_reg_list = NULL;
> + }
> +
> + while ((reg = strsep(®_offset, " ")) != NULL) {
> + adev->reset_dump_reg_list = krealloc_array(
> + adev->reset_dump_reg_list, 1,
> + sizeof(uint32_t), GFP_KERNEL);
> + ret = kstrtouint(reg, 16, &adev->reset_dump_reg_list[i]);
> +
> + if (ret) {
> + kfree(adev->reset_dump_reg_list);
> + kfree(reg_offset);
> + adev->reset_dump_reg_list = NULL;
> + return -EINVAL;
> + }
> +
> + i++;
> + }
> +
> + adev->n_regs = i;
> + kfree(reg_offset);
> +
> + return size;
> +}
> +
> +static const struct file_operations amdgpu_reset_dump_register_list = {
> + .owner = THIS_MODULE,
> + .read = amdgpu_reset_dump_register_list_read,
> + .write = amdgpu_reset_dump_register_list_write,
> + .llseek = default_llseek
> +};
> +
> int amdgpu_debugfs_init(struct amdgpu_device *adev)
> {
> struct dentry *root = adev_to_drm(adev)->primary->debugfs_root;
> @@ -1672,6 +1750,8 @@ int amdgpu_debugfs_init(struct amdgpu_device *adev)
> &amdgpu_debugfs_test_ib_fops);
> debugfs_create_file("amdgpu_vm_info", 0444, root, adev,
> &amdgpu_debugfs_vm_info_fops);
> + debugfs_create_file("amdgpu_reset_dump_register_list", 0644, root, adev,
> + &amdgpu_reset_dump_register_list);
>
> adev->debugfs_vbios_blob.data = adev->bios;
> adev->debugfs_vbios_blob.size = adev->bios_size;
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v3 2/2] drm/amdgpu: add reset register dump trace function on GPU reset
2022-02-14 9:16 ` [PATCH v3 2/2] drm/amdgpu: add reset register dump trace function on GPU reset Somalapuram Amaranath
@ 2022-02-14 9:31 ` Christian König
0 siblings, 0 replies; 6+ messages in thread
From: Christian König @ 2022-02-14 9:31 UTC (permalink / raw)
To: Somalapuram Amaranath, amd-gfx; +Cc: alexander.deucher, shashank.sharma
Am 14.02.22 um 10:16 schrieb Somalapuram Amaranath:
> Dump the list of register values to trace event on GPU reset.
>
> Signed-off-by: Somalapuram Amaranath <Amaranath.Somalapuram@amd.com>
One nit pick below, with that fixed Reviewed-by: Christian König
<christian.koenig@amd.com>.
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 17 ++++++++++++++++-
> drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h | 16 ++++++++++++++++
> 2 files changed, 32 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> index 1e651b959141..4e11a93134cf 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> @@ -4534,6 +4534,19 @@ int amdgpu_device_pre_asic_reset(struct amdgpu_device *adev,
> return r;
> }
>
> +static int amdgpu_reset_reg_dumps(struct amdgpu_device *adev)
> +{
> + int i;
> + uint32_t reg_value;
We usually try to declare variables like "i" or "r"/"ret" last and
longer lines first.
Regards,
Christian.
> +
> + for (i = 0; i < adev->n_regs; i++) {
> + reg_value = RREG32(adev->reset_dump_reg_list[i]);
> + trace_amdgpu_reset_reg_dumps(adev->reset_dump_reg_list[i], reg_value);
> + }
> +
> + return 0;
> +}
> +
> int amdgpu_do_asic_reset(struct list_head *device_list_handle,
> struct amdgpu_reset_context *reset_context)
> {
> @@ -4567,8 +4580,10 @@ int amdgpu_do_asic_reset(struct list_head *device_list_handle,
> tmp_adev->gmc.xgmi.pending_reset = false;
> if (!queue_work(system_unbound_wq, &tmp_adev->xgmi_reset_work))
> r = -EALREADY;
> - } else
> + } else {
> + amdgpu_reset_reg_dumps(tmp_adev);
> r = amdgpu_asic_reset(tmp_adev);
> + }
>
> if (r) {
> dev_err(tmp_adev->dev, "ASIC reset failed with error, %d for drm dev, %s",
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h
> index d855cb53c7e0..b9637925e85c 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h
> @@ -537,6 +537,22 @@ TRACE_EVENT(amdgpu_ib_pipe_sync,
> __entry->seqno)
> );
>
> +TRACE_EVENT(amdgpu_reset_reg_dumps,
> + TP_PROTO(uint32_t address, uint32_t value),
> + TP_ARGS(address, value),
> + TP_STRUCT__entry(
> + __field(uint32_t, address)
> + __field(uint32_t, value)
> + ),
> + TP_fast_assign(
> + __entry->address = address;
> + __entry->value = value;
> + ),
> + TP_printk("amdgpu register dump 0x%x: 0x%x",
> + __entry->address,
> + __entry->value)
> +);
> +
> #undef AMDGPU_JOB_GET_TIMELINE_NAME
> #endif
>
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v3 1/2] drm/amdgpu: add debugfs for reset registers list
2022-02-14 9:29 ` [PATCH v3 1/2] drm/amdgpu: add debugfs for reset registers list Christian König
@ 2022-02-14 13:15 ` Somalapuram, Amaranath
2022-02-14 13:26 ` Christian König
0 siblings, 1 reply; 6+ messages in thread
From: Somalapuram, Amaranath @ 2022-02-14 13:15 UTC (permalink / raw)
To: Christian König, Somalapuram Amaranath, amd-gfx
Cc: alexander.deucher, shashank.sharma
On 2/14/2022 2:59 PM, Christian König wrote:
>
>
> Am 14.02.22 um 10:16 schrieb Somalapuram Amaranath:
>> List of register populated for dump collection during the GPU reset.
>>
>> Signed-off-by: Somalapuram Amaranath <Amaranath.Somalapuram@amd.com>
>> ---
>> drivers/gpu/drm/amd/amdgpu/amdgpu.h | 4 ++
>> drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c | 80 +++++++++++++++++++++
>> 2 files changed, 84 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>> index b85b67a88a3d..2e8c2318276d 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>> @@ -1097,6 +1097,10 @@ struct amdgpu_device {
>> struct amdgpu_reset_control *reset_cntl;
>> uint32_t ip_versions[HW_ID_MAX][HWIP_MAX_INSTANCE];
>> +
>> + /* reset dump register */
>> + uint32_t *reset_dump_reg_list;
>> + int n_regs;
>> };
>> static inline struct amdgpu_device *drm_to_adev(struct drm_device
>> *ddev)
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
>> index 164d6a9e9fbb..6d49bed5b761 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
>> @@ -1609,6 +1609,84 @@ DEFINE_DEBUGFS_ATTRIBUTE(fops_ib_preempt, NULL,
>> DEFINE_DEBUGFS_ATTRIBUTE(fops_sclk_set, NULL,
>> amdgpu_debugfs_sclk_set, "%llu\n");
>> +static ssize_t amdgpu_reset_dump_register_list_read(struct file *f,
>> + char __user *buf, size_t size, loff_t *pos)
>> +{
>> + struct amdgpu_device *adev = (struct amdgpu_device
>> *)file_inode(f)->i_private;
>> + char *reg_offset;
>> + int i, r, len;
>> +
>> + if (adev->n_regs == 0)
>> + return 0;
>> +
>> + reg_offset = kmalloc((adev->n_regs * 11) + 1, GFP_KERNEL);
>> + memset(reg_offset, 0, (adev->n_regs * 11) + 1);
>> +
>> + for (i = 0; i < adev->n_regs; i++)
>> + sprintf(reg_offset + strlen(reg_offset), "0x%x ",
>> adev->reset_dump_reg_list[i]);
>> +
>> + sprintf(reg_offset + strlen(reg_offset), "\n");
>> + len = strlen(reg_offset);
>> +
>> + if (*pos >= len)
>> + return 0;
>> +
>> + r = copy_to_user(buf, reg_offset, len);
>
> Maybe better copy that to userspace one register at a time. This is
> not performance critical in any way.
>
> Same for the write function.
>
> Regards,
> Christian.
>
I tried to push all list of register in one go, so that the list can be
overwritten/updated (every write makes new list)
if we add one register at a time from user-space the design will change
to appending the list and cant be edited or updated, it should be OK ?
and don't see much use of **_read api (as we can see the list in trace)
i will remove it (debugfs interface will change from string to uint32_t )!?
Regards,
S.Amarnath
>> + *pos += len - r;
>> + kfree(reg_offset);
>> +
>> + return len - r;
>> +}
>> +
>> +static ssize_t amdgpu_reset_dump_register_list_write(struct file *f,
>> + const char __user *buf, size_t size, loff_t *pos)
>> +{
>> + struct amdgpu_device *adev = (struct amdgpu_device
>> *)file_inode(f)->i_private;
>> + char *reg_offset, *reg;
>> + int ret, i = 0;
>> +
>> + reg_offset = kmalloc(size, GFP_KERNEL);
>> + memset(reg_offset, 0, size);
>> + ret = copy_from_user(reg_offset, buf, size);
>> +
>> + if (ret)
>> + return -EFAULT;
>> +
>> + if (adev->n_regs > 0) {
>> + adev->n_regs = 0;
>> + kfree(adev->reset_dump_reg_list);
>> + adev->reset_dump_reg_list = NULL;
>> + }
>> +
>> + while ((reg = strsep(®_offset, " ")) != NULL) {
>> + adev->reset_dump_reg_list = krealloc_array(
>> + adev->reset_dump_reg_list, 1,
>> + sizeof(uint32_t), GFP_KERNEL);
>> + ret = kstrtouint(reg, 16, &adev->reset_dump_reg_list[i]);
>> +
>> + if (ret) {
>> + kfree(adev->reset_dump_reg_list);
>> + kfree(reg_offset);
>> + adev->reset_dump_reg_list = NULL;
>> + return -EINVAL;
>> + }
>> +
>> + i++;
>> + }
>> +
>> + adev->n_regs = i;
>> + kfree(reg_offset);
>> +
>> + return size;
>> +}
>> +
>> +static const struct file_operations amdgpu_reset_dump_register_list = {
>> + .owner = THIS_MODULE,
>> + .read = amdgpu_reset_dump_register_list_read,
>> + .write = amdgpu_reset_dump_register_list_write,
>> + .llseek = default_llseek
>> +};
>> +
>> int amdgpu_debugfs_init(struct amdgpu_device *adev)
>> {
>> struct dentry *root = adev_to_drm(adev)->primary->debugfs_root;
>> @@ -1672,6 +1750,8 @@ int amdgpu_debugfs_init(struct amdgpu_device
>> *adev)
>> &amdgpu_debugfs_test_ib_fops);
>> debugfs_create_file("amdgpu_vm_info", 0444, root, adev,
>> &amdgpu_debugfs_vm_info_fops);
>> + debugfs_create_file("amdgpu_reset_dump_register_list", 0644,
>> root, adev,
>> + &amdgpu_reset_dump_register_list);
>> adev->debugfs_vbios_blob.data = adev->bios;
>> adev->debugfs_vbios_blob.size = adev->bios_size;
>
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v3 1/2] drm/amdgpu: add debugfs for reset registers list
2022-02-14 13:15 ` Somalapuram, Amaranath
@ 2022-02-14 13:26 ` Christian König
0 siblings, 0 replies; 6+ messages in thread
From: Christian König @ 2022-02-14 13:26 UTC (permalink / raw)
To: Somalapuram, Amaranath, Somalapuram Amaranath, amd-gfx
Cc: alexander.deucher, shashank.sharma
Am 14.02.22 um 14:15 schrieb Somalapuram, Amaranath:
>
> On 2/14/2022 2:59 PM, Christian König wrote:
>>
>>
>> Am 14.02.22 um 10:16 schrieb Somalapuram Amaranath:
>>> List of register populated for dump collection during the GPU reset.
>>>
>>> Signed-off-by: Somalapuram Amaranath <Amaranath.Somalapuram@amd.com>
>>> ---
>>> drivers/gpu/drm/amd/amdgpu/amdgpu.h | 4 ++
>>> drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c | 80
>>> +++++++++++++++++++++
>>> 2 files changed, 84 insertions(+)
>>>
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>>> b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>>> index b85b67a88a3d..2e8c2318276d 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>>> @@ -1097,6 +1097,10 @@ struct amdgpu_device {
>>> struct amdgpu_reset_control *reset_cntl;
>>> uint32_t ip_versions[HW_ID_MAX][HWIP_MAX_INSTANCE];
>>> +
>>> + /* reset dump register */
>>> + uint32_t *reset_dump_reg_list;
>>> + int n_regs;
>>> };
>>> static inline struct amdgpu_device *drm_to_adev(struct
>>> drm_device *ddev)
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
>>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
>>> index 164d6a9e9fbb..6d49bed5b761 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
>>> @@ -1609,6 +1609,84 @@ DEFINE_DEBUGFS_ATTRIBUTE(fops_ib_preempt, NULL,
>>> DEFINE_DEBUGFS_ATTRIBUTE(fops_sclk_set, NULL,
>>> amdgpu_debugfs_sclk_set, "%llu\n");
>>> +static ssize_t amdgpu_reset_dump_register_list_read(struct file *f,
>>> + char __user *buf, size_t size, loff_t *pos)
>>> +{
>>> + struct amdgpu_device *adev = (struct amdgpu_device
>>> *)file_inode(f)->i_private;
>>> + char *reg_offset;
>>> + int i, r, len;
>>> +
>>> + if (adev->n_regs == 0)
>>> + return 0;
>>> +
>>> + reg_offset = kmalloc((adev->n_regs * 11) + 1, GFP_KERNEL);
>>> + memset(reg_offset, 0, (adev->n_regs * 11) + 1);
>>> +
>>> + for (i = 0; i < adev->n_regs; i++)
>>> + sprintf(reg_offset + strlen(reg_offset), "0x%x ",
>>> adev->reset_dump_reg_list[i]);
>>> +
>>> + sprintf(reg_offset + strlen(reg_offset), "\n");
>>> + len = strlen(reg_offset);
>>> +
>>> + if (*pos >= len)
>>> + return 0;
>>> +
>>> + r = copy_to_user(buf, reg_offset, len);
>>
>> Maybe better copy that to userspace one register at a time. This is
>> not performance critical in any way.
>>
>> Same for the write function.
>>
>> Regards,
>> Christian.
>>
> I tried to push all list of register in one go, so that the list can
> be overwritten/updated (every write makes new list)
> if we add one register at a time from user-space the design will
> change to appending the list and cant be edited or updated, it should
> be OK ?
> and don't see much use of **_read api (as we can see the list in
> trace) i will remove it (debugfs interface will change from string to
> uint32_t )!?
You misunderstood me, that's not what I've meant.
What you should do is to have multiple copy_to_user calls dumping only
one register at at time to avoid allocating all that temporary memory.
Regards,
Christian.
>
> Regards,
> S.Amarnath
>>> + *pos += len - r;
>>> + kfree(reg_offset);
>>> +
>>> + return len - r;
>>> +}
>>> +
>>> +static ssize_t amdgpu_reset_dump_register_list_write(struct file *f,
>>> + const char __user *buf, size_t size, loff_t *pos)
>>> +{
>>> + struct amdgpu_device *adev = (struct amdgpu_device
>>> *)file_inode(f)->i_private;
>>> + char *reg_offset, *reg;
>>> + int ret, i = 0;
>>> +
>>> + reg_offset = kmalloc(size, GFP_KERNEL);
>>> + memset(reg_offset, 0, size);
>>> + ret = copy_from_user(reg_offset, buf, size);
>>> +
>>> + if (ret)
>>> + return -EFAULT;
>>> +
>>> + if (adev->n_regs > 0) {
>>> + adev->n_regs = 0;
>>> + kfree(adev->reset_dump_reg_list);
>>> + adev->reset_dump_reg_list = NULL;
>>> + }
>>> +
>>> + while ((reg = strsep(®_offset, " ")) != NULL) {
>>> + adev->reset_dump_reg_list = krealloc_array(
>>> + adev->reset_dump_reg_list, 1,
>>> + sizeof(uint32_t), GFP_KERNEL);
>>> + ret = kstrtouint(reg, 16, &adev->reset_dump_reg_list[i]);
>>> +
>>> + if (ret) {
>>> + kfree(adev->reset_dump_reg_list);
>>> + kfree(reg_offset);
>>> + adev->reset_dump_reg_list = NULL;
>>> + return -EINVAL;
>>> + }
>>> +
>>> + i++;
>>> + }
>>> +
>>> + adev->n_regs = i;
>>> + kfree(reg_offset);
>>> +
>>> + return size;
>>> +}
>>> +
>>> +static const struct file_operations amdgpu_reset_dump_register_list
>>> = {
>>> + .owner = THIS_MODULE,
>>> + .read = amdgpu_reset_dump_register_list_read,
>>> + .write = amdgpu_reset_dump_register_list_write,
>>> + .llseek = default_llseek
>>> +};
>>> +
>>> int amdgpu_debugfs_init(struct amdgpu_device *adev)
>>> {
>>> struct dentry *root = adev_to_drm(adev)->primary->debugfs_root;
>>> @@ -1672,6 +1750,8 @@ int amdgpu_debugfs_init(struct amdgpu_device
>>> *adev)
>>> &amdgpu_debugfs_test_ib_fops);
>>> debugfs_create_file("amdgpu_vm_info", 0444, root, adev,
>>> &amdgpu_debugfs_vm_info_fops);
>>> + debugfs_create_file("amdgpu_reset_dump_register_list", 0644,
>>> root, adev,
>>> + &amdgpu_reset_dump_register_list);
>>> adev->debugfs_vbios_blob.data = adev->bios;
>>> adev->debugfs_vbios_blob.size = adev->bios_size;
>>
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2022-02-14 13:26 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2022-02-14 9:16 [PATCH v3 1/2] drm/amdgpu: add debugfs for reset registers list Somalapuram Amaranath
2022-02-14 9:16 ` [PATCH v3 2/2] drm/amdgpu: add reset register dump trace function on GPU reset Somalapuram Amaranath
2022-02-14 9:31 ` Christian König
2022-02-14 9:29 ` [PATCH v3 1/2] drm/amdgpu: add debugfs for reset registers list Christian König
2022-02-14 13:15 ` Somalapuram, Amaranath
2022-02-14 13:26 ` Christian König
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