From: "Lazar, Lijo" <lijo.lazar@amd.com>
To: "Zha, YiFan(Even)" <Yifan.Zha@amd.com>,
"amd-gfx@lists.freedesktop.org" <amd-gfx@lists.freedesktop.org>,
"Deucher, Alexander" <Alexander.Deucher@amd.com>,
"Zhang, Hawking" <Hawking.Zhang@amd.com>
Cc: "Chen, Horace" <Horace.Chen@amd.com>,
"Chang, HaiJun" <HaiJun.Chang@amd.com>,
"Yin, ZhenGuo (Chris)" <ZhenGuo.Yin@amd.com>,
"cao, lin" <lin.cao@amd.com>
Subject: Re: [PATCH] drm/amd/pm: Update smu_v13_0_0 SRIOV VF flag in msg mapping table
Date: Wed, 22 Jan 2025 16:47:56 +0530 [thread overview]
Message-ID: <0ff4e9bb-e5e8-44f2-95f3-2f24b984712e@amd.com> (raw)
In-Reply-To: <LV2PR12MB577498745B1C8D813EA7CA1DF9E62@LV2PR12MB5774.namprd12.prod.outlook.com>
On 1/22/2025 3:58 PM, Zha, YiFan(Even) wrote:
> [AMD Official Use Only - AMD Internal Distribution Only]
>
>
> Hi Lijo,
>
> This will not affect 1VF mode. I just matched SMU supported/unsupported
> VF msg .
Thanks for checking.
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Thanks,
Lijo
> Messages for 1 VF mode are still enabled, such as handle smu features,
> handle soft frequences, etc.
>
> Thanks.
>
>
>
> Best regard,
>
> Yifan Zha
>
>
>
>
> ------------------------------------------------------------------------
> *From:* Lazar, Lijo <Lijo.Lazar@amd.com>
> *Sent:* Tuesday, January 21, 2025 5:48 PM
> *To:* Zha, YiFan(Even) <Yifan.Zha@amd.com>; amd-
> gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org>; Deucher,
> Alexander <Alexander.Deucher@amd.com>; Zhang, Hawking
> <Hawking.Zhang@amd.com>
> *Cc:* Chen, Horace <Horace.Chen@amd.com>; Chang, HaiJun
> <HaiJun.Chang@amd.com>
> *Subject:* Re: [PATCH] drm/amd/pm: Update smu_v13_0_0 SRIOV VF flag in
> msg mapping table
>
>
>
> On 1/20/2025 9:19 AM, Yifan Zha wrote:
>> [Why]
>> Under SRIOV VF, driver send a VF unsupportted smu message causing
>> a failure.
>>
>> [How]
>> Update smu_v13_0_0 message mapping table based on PMFW.
>>
>
> Does this hold good for 1VF case also?
>
> Thanks,
> Lijo
>
>> Signed-off-by: Yifan Zha <Yifan.Zha@amd.com>
>> ---
>> drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c | 6 +++---
>> 1 file changed, 3 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c b/
> drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
>> index 0551a3311217..985355bf78b2 100644
>> --- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
>> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
>> @@ -126,7 +126,7 @@ static struct cmn2asic_msg_mapping
> smu_v13_0_0_message_map[SMU_MSG_MAX_COUNT] =
>> MSG_MAP(DisableSmuFeaturesHigh,
> PPSMC_MSG_DisableSmuFeaturesHigh, 1),
>> MSG_MAP(GetEnabledSmuFeaturesLow,
> PPSMC_MSG_GetRunningSmuFeaturesLow, 1),
>> MSG_MAP(GetEnabledSmuFeaturesHigh,
> PPSMC_MSG_GetRunningSmuFeaturesHigh, 1),
>> - MSG_MAP(SetWorkloadMask,
> PPSMC_MSG_SetWorkloadMask, 1),
>> + MSG_MAP(SetWorkloadMask,
> PPSMC_MSG_SetWorkloadMask, 0),
>> MSG_MAP(SetPptLimit,
> PPSMC_MSG_SetPptLimit, 0),
>> MSG_MAP(SetDriverDramAddrHigh,
> PPSMC_MSG_SetDriverDramAddrHigh, 1),
>> MSG_MAP(SetDriverDramAddrLow,
> PPSMC_MSG_SetDriverDramAddrLow, 1),
>> @@ -140,7 +140,7 @@ static struct cmn2asic_msg_mapping
> smu_v13_0_0_message_map[SMU_MSG_MAX_COUNT] =
>> MSG_MAP(ExitBaco,
> PPSMC_MSG_ExitBaco, 0),
>> MSG_MAP(SetSoftMinByFreq,
> PPSMC_MSG_SetSoftMinByFreq, 1),
>> MSG_MAP(SetSoftMaxByFreq,
> PPSMC_MSG_SetSoftMaxByFreq, 1),
>> - MSG_MAP(SetHardMinByFreq,
> PPSMC_MSG_SetHardMinByFreq, 1),
>> + MSG_MAP(SetHardMinByFreq,
> PPSMC_MSG_SetHardMinByFreq, 0),
>> MSG_MAP(SetHardMaxByFreq,
> PPSMC_MSG_SetHardMaxByFreq, 0),
>> MSG_MAP(GetMinDpmFreq,
> PPSMC_MSG_GetMinDpmFreq, 1),
>> MSG_MAP(GetMaxDpmFreq,
> PPSMC_MSG_GetMaxDpmFreq, 1),
>> @@ -149,7 +149,7 @@ static struct cmn2asic_msg_mapping
> smu_v13_0_0_message_map[SMU_MSG_MAX_COUNT] =
>> MSG_MAP(PowerDownVcn,
> PPSMC_MSG_PowerDownVcn, 0),
>> MSG_MAP(PowerUpJpeg,
> PPSMC_MSG_PowerUpJpeg, 0),
>> MSG_MAP(PowerDownJpeg,
> PPSMC_MSG_PowerDownJpeg, 0),
>> - MSG_MAP(GetDcModeMaxDpmFreq,
> PPSMC_MSG_GetDcModeMaxDpmFreq, 1),
>> + MSG_MAP(GetDcModeMaxDpmFreq,
> PPSMC_MSG_GetDcModeMaxDpmFreq, 0),
>> MSG_MAP(OverridePcieParameters,
> PPSMC_MSG_OverridePcieParameters, 0),
>> MSG_MAP(DramLogSetDramAddrHigh,
> PPSMC_MSG_DramLogSetDramAddrHigh, 0),
>> MSG_MAP(DramLogSetDramAddrLow,
> PPSMC_MSG_DramLogSetDramAddrLow, 0),
>
prev parent reply other threads:[~2025-01-22 11:18 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-20 3:49 [PATCH] drm/amd/pm: Update smu_v13_0_0 SRIOV VF flag in msg mapping table Yifan Zha
2025-01-21 9:48 ` Lazar, Lijo
2025-01-22 10:28 ` Zha, YiFan(Even)
2025-01-22 11:17 ` Lazar, Lijo [this message]
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