[PATCH 3/3] drm/amd/amdgpu: Add Polaris version check

[James Zhu <James.Zhu-5C7GfCeVMHo@public.gmane.org>]

Add Polaris version check if firmware support UVD encode

Signed-off-by: James Zhu <James.Zhu@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
index 319d4b3..e720c4f 100644
--- a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
@@ -37,8 +37,12 @@
 #include "gmc/gmc_8_1_d.h"
 #include "vi.h"
 
+/* Polaris10/11/12 firmware version */
+#define FW_1_130_16 ((1 << 24) | (130 << 16) | (16 << 8))
+
 static void uvd_v6_0_set_ring_funcs(struct amdgpu_device *adev);
 static void uvd_v6_0_set_enc_ring_funcs(struct amdgpu_device *adev);
+static void uvd_v6_0_unset_enc_ring_funcs(struct amdgpu_device *adev);
 
 static void uvd_v6_0_set_irq_funcs(struct amdgpu_device *adev);
 static int uvd_v6_0_start(struct amdgpu_device *adev);
@@ -402,6 +406,11 @@ static int uvd_v6_0_sw_init(void *handle)
 	if (r)
 		return r;
 
+	if (adev->uvd.fw_version < FW_1_130_16) {
+		uvd_v6_0_unset_enc_ring_funcs(adev);
+		adev->uvd.num_enc_rings = 0;
+	}
+
 	if (adev->uvd.num_enc_rings) {
 		struct drm_sched_rq *rq;
 
@@ -1640,6 +1649,18 @@ static void uvd_v6_0_set_enc_ring_funcs(struct amdgpu_device *adev)
 	DRM_INFO("UVD ENC is enabled in VM mode\n");
 }
 
+static void uvd_v6_0_unset_enc_ring_funcs(struct amdgpu_device *adev)
+{
+	int i;
+
+	for (i = 0; i < adev->uvd.num_enc_rings; ++i)
+		adev->uvd.ring_enc[i].funcs = NULL;
+
+	adev->uvd.irq.num_types = 1;
+
+	DRM_INFO("UVD ENC is disabled\n");
+}
+
 static const struct amdgpu_irq_src_funcs uvd_v6_0_irq_funcs = {
 	.set = uvd_v6_0_set_interrupt_state,
 	.process = uvd_v6_0_process_interrupt,
-- 
2.7.4

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