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From: Rex Zhu <Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Cc: Rex Zhu <Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
Subject: [PATCH 2/7] drm/amd/pp: Rename enable_per_cu_power_gating to powergate_gfx
Date: Wed, 13 Jun 2018 19:18:01 +0800	[thread overview]
Message-ID: <1528888686-18896-2-git-send-email-Rex.Zhu@amd.com> (raw)
In-Reply-To: <1528888686-18896-1-git-send-email-Rex.Zhu-5C7GfCeVMHo@public.gmane.org>

keep consistent with powergate_uvd/vce/mmhub

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
---
 drivers/gpu/drm/amd/powerplay/amd_powerplay.c               | 6 +++---
 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c | 2 +-
 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.h | 2 +-
 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c            | 2 +-
 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h                   | 2 +-
 5 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
index da98208..b69da11 100644
--- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
+++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
@@ -236,13 +236,13 @@ static int pp_set_powergating_state(void *handle,
 			pr_err("gfx off control failed!\n");
 	}
 
-	if (hwmgr->hwmgr_func->enable_per_cu_power_gating == NULL) {
-		pr_debug("%s was not implemented.\n", __func__);
+	if (hwmgr->hwmgr_func->powergate_gfx == NULL) {
+		pr_info("%s was not implemented.\n", __func__);
 		return 0;
 	}
 
 	/* Enable/disable GFX per cu powergating through SMU */
-	return hwmgr->hwmgr_func->enable_per_cu_power_gating(hwmgr,
+	return hwmgr->hwmgr_func->powergate_gfx(hwmgr,
 			state == AMD_PG_STATE_GATE);
 }
 
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c
index 4149562..683b29a 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c
@@ -416,7 +416,7 @@ int smu7_update_clock_gatings(struct pp_hwmgr *hwmgr,
  * Powerplay will only control the static per CU Power Gating.
  * Dynamic per CU Power Gating will be done in gfx.
  */
-int smu7_enable_per_cu_power_gating(struct pp_hwmgr *hwmgr, bool enable)
+int smu7_powergate_gfx(struct pp_hwmgr *hwmgr, bool enable)
 {
 	struct amdgpu_device *adev = hwmgr->adev;
 
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.h b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.h
index be7f66d..fc8f8a6 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.h
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.h
@@ -33,6 +33,6 @@
 int smu7_disable_clock_power_gating(struct pp_hwmgr *hwmgr);
 int smu7_update_clock_gatings(struct pp_hwmgr *hwmgr,
 					const uint32_t *msg_id);
-int smu7_enable_per_cu_power_gating(struct pp_hwmgr *hwmgr, bool enable);
+int smu7_powergate_gfx(struct pp_hwmgr *hwmgr, bool enable);
 
 #endif
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
index b73e200..b4c93a9 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
@@ -5044,7 +5044,7 @@ static int smu7_set_power_profile_mode(struct pp_hwmgr *hwmgr, long *input, uint
 	.get_fan_control_mode = smu7_get_fan_control_mode,
 	.force_clock_level = smu7_force_clock_level,
 	.print_clock_levels = smu7_print_clock_levels,
-	.enable_per_cu_power_gating = smu7_enable_per_cu_power_gating,
+	.powergate_gfx = smu7_powergate_gfx,
 	.get_sclk_od = smu7_get_sclk_od,
 	.set_sclk_od = smu7_set_sclk_od,
 	.get_mclk_od = smu7_get_mclk_od,
diff --git a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
index 9b07d6e..95e29a2 100644
--- a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
@@ -302,7 +302,7 @@ struct pp_hwmgr_func {
 	int (*power_off_asic)(struct pp_hwmgr *hwmgr);
 	int (*force_clock_level)(struct pp_hwmgr *hwmgr, enum pp_clock_type type, uint32_t mask);
 	int (*print_clock_levels)(struct pp_hwmgr *hwmgr, enum pp_clock_type type, char *buf);
-	int (*enable_per_cu_power_gating)(struct pp_hwmgr *hwmgr, bool enable);
+	int (*powergate_gfx)(struct pp_hwmgr *hwmgr, bool enable);
 	int (*get_sclk_od)(struct pp_hwmgr *hwmgr);
 	int (*set_sclk_od)(struct pp_hwmgr *hwmgr, uint32_t value);
 	int (*get_mclk_od)(struct pp_hwmgr *hwmgr);
-- 
1.9.1

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  parent reply	other threads:[~2018-06-13 11:18 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-06-13 11:18 [PATCH 1/7] drm/amdgpu: Rename set_mmhub_powergating_by_smu to powergate_mmhub Rex Zhu
     [not found] ` <1528888686-18896-1-git-send-email-Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
2018-06-13 11:18   ` Rex Zhu [this message]
     [not found]     ` <1528888686-18896-2-git-send-email-Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
2018-06-20  2:04       ` [PATCH 2/7] drm/amd/pp: Rename enable_per_cu_power_gating to powergate_gfx Quan, Evan
2018-06-13 11:18   ` [PATCH 3/7] drm/amd/pp: Unify powergate_uvd/vce/mmhub to set_powergating_by_smu Rex Zhu
2018-06-13 11:18   ` [PATCH 4/7] drm/amd/pp: Add gfx pg support in smu through set_powergating_by_smu Rex Zhu
     [not found]     ` <1528888686-18896-4-git-send-email-Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
2018-06-13 15:10       ` Zhu, Rex
2018-06-13 11:18   ` [PATCH 5/7] drm/amd/pp: Add powergate_gfx backend function on Raven Rex Zhu
2018-06-13 11:18   ` [PATCH 6/7] drm/amdgpu: Change PG enable sequence Rex Zhu
2018-06-13 11:18   ` [PATCH 7/7] drm/amdgpu: Make gfx_off control by GFX ip Rex Zhu
2018-06-20  2:03   ` [PATCH 1/7] drm/amdgpu: Rename set_mmhub_powergating_by_smu to powergate_mmhub Quan, Evan

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