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* [PATCH v2 6/7] drm/amdgpu: Make gfx_off control by GFX ip
@ 2018-06-13 11:36 Rex Zhu
       [not found] ` <1528889805-22563-1-git-send-email-Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
  0 siblings, 1 reply; 2+ messages in thread
From: Rex Zhu @ 2018-06-13 11:36 UTC (permalink / raw)
  To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW; +Cc: Rex Zhu

gfx off should be controlled by GFX IP.
Powerplay only export interface to gfx ip.
This logic is same as uvd/vce cg/pg.

1. Delete the gfx pg/off ctrl code in pp_set_powergating_state
   this ip function is for smu pg enablement.
2. call set_powergating_by_smu to enable/disalbe power off feature.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c    | 19 +++++++------------
 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c         |  4 ++++
 drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 25 +------------------------
 3 files changed, 12 insertions(+), 36 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 3adef57..caf588d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -1732,16 +1732,11 @@ static int amdgpu_device_ip_late_set_cg_state(struct amdgpu_device *adev)
 		}
 	}
 
-	if (adev->powerplay.pp_feature & PP_GFXOFF_MASK) {
+	if (adev->powerplay.pp_feature & PP_GFXOFF_MASK)
 		/* enable gfx powergating */
 		amdgpu_device_ip_set_powergating_state(adev,
 						       AMD_IP_BLOCK_TYPE_GFX,
 						       AMD_PG_STATE_GATE);
-		/* enable gfxoff */
-		amdgpu_device_ip_set_powergating_state(adev,
-						       AMD_IP_BLOCK_TYPE_SMC,
-						       AMD_PG_STATE_GATE);
-	}
 
 	return 0;
 }
@@ -1814,6 +1809,8 @@ static int amdgpu_device_ip_fini(struct amdgpu_device *adev)
 					  adev->ip_blocks[i].version->funcs->name, r);
 				return r;
 			}
+			if (adev->powerplay.pp_funcs->set_powergating_by_smu)
+				amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_GFX, false);
 			r = adev->ip_blocks[i].version->funcs->hw_fini((void *)adev);
 			/* XXX handle errors */
 			if (r) {
@@ -1923,12 +1920,6 @@ int amdgpu_device_ip_suspend(struct amdgpu_device *adev)
 	if (amdgpu_sriov_vf(adev))
 		amdgpu_virt_request_full_gpu(adev, false);
 
-	/* ungate SMC block powergating */
-	if (adev->powerplay.pp_feature & PP_GFXOFF_MASK)
-		amdgpu_device_ip_set_powergating_state(adev,
-						       AMD_IP_BLOCK_TYPE_SMC,
-						       AMD_CG_STATE_UNGATE);
-
 	/* ungate SMC block first */
 	r = amdgpu_device_ip_set_clockgating_state(adev, AMD_IP_BLOCK_TYPE_SMC,
 						   AMD_CG_STATE_UNGATE);
@@ -1936,6 +1927,10 @@ int amdgpu_device_ip_suspend(struct amdgpu_device *adev)
 		DRM_ERROR("set_clockgating_state(ungate) SMC failed %d\n", r);
 	}
 
+	/* call smu to disable gfx off feature first when suspend */
+	if (adev->powerplay.pp_funcs->set_powergating_by_smu)
+		amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_GFX, false);
+
 	for (i = adev->num_ip_blocks - 1; i >= 0; i--) {
 		if (!adev->ip_blocks[i].status.valid)
 			continue;
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index ae35bbe..bec5592 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -3715,6 +3715,10 @@ static int gfx_v9_0_set_powergating_state(void *handle,
 
 		/* update mgcg state */
 		gfx_v9_0_update_gfx_mg_power_gating(adev, enable);
+
+		/* set gfx off through smu */
+		if (enable && adev->powerplay.pp_funcs->set_powergating_by_smu)
+			amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_GFX, true);
 		break;
 	default:
 		break;
diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
index cb2dd7c..387a1eb 100644
--- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
+++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
@@ -221,30 +221,7 @@ static int pp_sw_reset(void *handle)
 static int pp_set_powergating_state(void *handle,
 				    enum amd_powergating_state state)
 {
-	struct amdgpu_device *adev = handle;
-	struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle;
-	int ret;
-
-	if (!hwmgr || !hwmgr->pm_en)
-		return 0;
-
-	if (hwmgr->hwmgr_func->gfx_off_control) {
-		/* Enable/disable GFX off through SMU */
-		ret = hwmgr->hwmgr_func->gfx_off_control(hwmgr,
-							 state == AMD_PG_STATE_GATE);
-		if (ret)
-			pr_err("gfx off control failed!\n");
-	}
-
-	if (hwmgr->hwmgr_func->powergate_gfx == NULL) {
-		pr_info("%s was not implemented.\n", __func__);
-		return 0;
-	}
-
-	/* Enable/disable GFX per cu powergating through SMU */
-	return hwmgr->hwmgr_func->powergate_gfx(hwmgr,
-			state == AMD_PG_STATE_GATE);
-
+	return 0;
 }
 
 static int pp_suspend(void *handle)
-- 
1.9.1

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply related	[flat|nested] 2+ messages in thread
* RE: [PATCH v2 6/7] drm/amdgpu: Make gfx_off control by GFX ip
       [not found] ` <1528889805-22563-1-git-send-email-Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
@ 2018-06-20  2:15   ` Quan, Evan
  0 siblings, 0 replies; 2+ messages in thread
From: Quan, Evan @ 2018-06-20  2:15 UTC (permalink / raw)
  To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org; +Cc: Zhu, Rex

Reviewed-by: Evan Quan <evan.quan@amd.com>

> -----Original Message-----
> From: amd-gfx [mailto:amd-gfx-bounces@lists.freedesktop.org] On Behalf
> Of Rex Zhu
> Sent: Wednesday, June 13, 2018 7:37 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Zhu, Rex <Rex.Zhu@amd.com>
> Subject: [PATCH v2 6/7] drm/amdgpu: Make gfx_off control by GFX ip
> 
> gfx off should be controlled by GFX IP.
> Powerplay only export interface to gfx ip.
> This logic is same as uvd/vce cg/pg.
> 
> 1. Delete the gfx pg/off ctrl code in pp_set_powergating_state
>    this ip function is for smu pg enablement.
> 2. call set_powergating_by_smu to enable/disalbe power off feature.
> 
> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_device.c    | 19 +++++++------------
>  drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c         |  4 ++++
>  drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 25 +---------------------
> ---
>  3 files changed, 12 insertions(+), 36 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> index 3adef57..caf588d 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> @@ -1732,16 +1732,11 @@ static int
> amdgpu_device_ip_late_set_cg_state(struct amdgpu_device *adev)
>  		}
>  	}
> 
> -	if (adev->powerplay.pp_feature & PP_GFXOFF_MASK) {
> +	if (adev->powerplay.pp_feature & PP_GFXOFF_MASK)
>  		/* enable gfx powergating */
>  		amdgpu_device_ip_set_powergating_state(adev,
> 
> AMD_IP_BLOCK_TYPE_GFX,
>  						       AMD_PG_STATE_GATE);
> -		/* enable gfxoff */
> -		amdgpu_device_ip_set_powergating_state(adev,
> -
> AMD_IP_BLOCK_TYPE_SMC,
> -						       AMD_PG_STATE_GATE);
> -	}
> 
>  	return 0;
>  }
> @@ -1814,6 +1809,8 @@ static int amdgpu_device_ip_fini(struct
> amdgpu_device *adev)
>  					  adev->ip_blocks[i].version->funcs-
> >name, r);
>  				return r;
>  			}
> +			if (adev->powerplay.pp_funcs-
> >set_powergating_by_smu)
> +
> 	amdgpu_dpm_set_powergating_by_smu(adev,
> AMD_IP_BLOCK_TYPE_GFX,
> +false);
>  			r = adev->ip_blocks[i].version->funcs->hw_fini((void
> *)adev);
>  			/* XXX handle errors */
>  			if (r) {
> @@ -1923,12 +1920,6 @@ int amdgpu_device_ip_suspend(struct
> amdgpu_device *adev)
>  	if (amdgpu_sriov_vf(adev))
>  		amdgpu_virt_request_full_gpu(adev, false);
> 
> -	/* ungate SMC block powergating */
> -	if (adev->powerplay.pp_feature & PP_GFXOFF_MASK)
> -		amdgpu_device_ip_set_powergating_state(adev,
> -
> AMD_IP_BLOCK_TYPE_SMC,
> -
> AMD_CG_STATE_UNGATE);
> -
>  	/* ungate SMC block first */
>  	r = amdgpu_device_ip_set_clockgating_state(adev,
> AMD_IP_BLOCK_TYPE_SMC,
>  						   AMD_CG_STATE_UNGATE);
> @@ -1936,6 +1927,10 @@ int amdgpu_device_ip_suspend(struct
> amdgpu_device *adev)
>  		DRM_ERROR("set_clockgating_state(ungate) SMC
> failed %d\n", r);
>  	}
> 
> +	/* call smu to disable gfx off feature first when suspend */
> +	if (adev->powerplay.pp_funcs->set_powergating_by_smu)
> +		amdgpu_dpm_set_powergating_by_smu(adev,
> AMD_IP_BLOCK_TYPE_GFX,
> +false);
> +
>  	for (i = adev->num_ip_blocks - 1; i >= 0; i--) {
>  		if (!adev->ip_blocks[i].status.valid)
>  			continue;
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> index ae35bbe..bec5592 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> @@ -3715,6 +3715,10 @@ static int gfx_v9_0_set_powergating_state(void
> *handle,
> 
>  		/* update mgcg state */
>  		gfx_v9_0_update_gfx_mg_power_gating(adev, enable);
> +
> +		/* set gfx off through smu */
> +		if (enable && adev->powerplay.pp_funcs-
> >set_powergating_by_smu)
> +			amdgpu_dpm_set_powergating_by_smu(adev,
> AMD_IP_BLOCK_TYPE_GFX,
> +true);
>  		break;
>  	default:
>  		break;
> diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
> b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
> index cb2dd7c..387a1eb 100644
> --- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
> +++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
> @@ -221,30 +221,7 @@ static int pp_sw_reset(void *handle)  static int
> pp_set_powergating_state(void *handle,
>  				    enum amd_powergating_state state)  {
> -	struct amdgpu_device *adev = handle;
> -	struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle;
> -	int ret;
> -
> -	if (!hwmgr || !hwmgr->pm_en)
> -		return 0;
> -
> -	if (hwmgr->hwmgr_func->gfx_off_control) {
> -		/* Enable/disable GFX off through SMU */
> -		ret = hwmgr->hwmgr_func->gfx_off_control(hwmgr,
> -							 state ==
> AMD_PG_STATE_GATE);
> -		if (ret)
> -			pr_err("gfx off control failed!\n");
> -	}
> -
> -	if (hwmgr->hwmgr_func->powergate_gfx == NULL) {
> -		pr_info("%s was not implemented.\n", __func__);
> -		return 0;
> -	}
> -
> -	/* Enable/disable GFX per cu powergating through SMU */
> -	return hwmgr->hwmgr_func->powergate_gfx(hwmgr,
> -			state == AMD_PG_STATE_GATE);
> -
> +	return 0;
>  }
> 
>  static int pp_suspend(void *handle)
> --
> 1.9.1
> 
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 2+ messages in thread
end of thread, other threads:[~2018-06-20  2:15 UTC | newest]

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2018-06-13 11:36 [PATCH v2 6/7] drm/amdgpu: Make gfx_off control by GFX ip Rex Zhu
     [not found] ` <1528889805-22563-1-git-send-email-Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
2018-06-20  2:15   ` Quan, Evan

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