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* [PATCH v2 7/7] drm/amdgpu: Change PG enable sequence
@ 2018-06-13 11:38 Rex Zhu
       [not found] ` <1528889918-22713-1-git-send-email-Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
  0 siblings, 1 reply; 2+ messages in thread
From: Rex Zhu @ 2018-06-13 11:38 UTC (permalink / raw)
  To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW; +Cc: Rex Zhu

Enable PG state after CG enabled.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 33 +++++++++++++++++++++++++-----
 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c      |  4 ----
 2 files changed, 28 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index caf588d..9647f54 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -1732,12 +1732,34 @@ static int amdgpu_device_ip_late_set_cg_state(struct amdgpu_device *adev)
 		}
 	}
 
-	if (adev->powerplay.pp_feature & PP_GFXOFF_MASK)
-		/* enable gfx powergating */
-		amdgpu_device_ip_set_powergating_state(adev,
-						       AMD_IP_BLOCK_TYPE_GFX,
-						       AMD_PG_STATE_GATE);
+	return 0;
+}
+
+static int amdgpu_device_ip_late_set_pg_state(struct amdgpu_device *adev)
+{
+	int i = 0, r;
 
+	if (amdgpu_emu_mode == 1)
+		return 0;
+
+	for (i = 0; i < adev->num_ip_blocks; i++) {
+		if (!adev->ip_blocks[i].status.valid)
+			continue;
+		/* skip CG for VCE/UVD, it's handled specially */
+		if (adev->ip_blocks[i].version->type != AMD_IP_BLOCK_TYPE_UVD &&
+		    adev->ip_blocks[i].version->type != AMD_IP_BLOCK_TYPE_VCE &&
+		    adev->ip_blocks[i].version->type != AMD_IP_BLOCK_TYPE_VCN &&
+		    adev->ip_blocks[i].version->funcs->set_powergating_state) {
+			/* enable powergating to save power */
+			r = adev->ip_blocks[i].version->funcs->set_powergating_state((void *)adev,
+										     AMD_PG_STATE_GATE);
+			if (r) {
+				DRM_ERROR("set_powergating_state(gate) of IP block <%s> failed %d\n",
+					  adev->ip_blocks[i].version->funcs->name, r);
+				return r;
+			}
+		}
+	}
 	return 0;
 }
 
@@ -1900,6 +1922,7 @@ static void amdgpu_device_ip_late_init_func_handler(struct work_struct *work)
 	struct amdgpu_device *adev =
 		container_of(work, struct amdgpu_device, late_init_work.work);
 	amdgpu_device_ip_late_set_cg_state(adev);
+	amdgpu_device_ip_late_set_pg_state(adev);
 }
 
 /**
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index 916776a..2a860ef 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@ -5581,10 +5581,6 @@ static int gfx_v8_0_late_init(void *handle)
 		return r;
 	}
 
-	amdgpu_device_ip_set_powergating_state(adev,
-					       AMD_IP_BLOCK_TYPE_GFX,
-					       AMD_PG_STATE_GATE);
-
 	return 0;
 }
 
-- 
1.9.1

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply related	[flat|nested] 2+ messages in thread

* RE: [PATCH v2 7/7] drm/amdgpu: Change PG enable sequence
       [not found] ` <1528889918-22713-1-git-send-email-Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
@ 2018-06-20  2:15   ` Quan, Evan
  0 siblings, 0 replies; 2+ messages in thread
From: Quan, Evan @ 2018-06-20  2:15 UTC (permalink / raw)
  To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org; +Cc: Zhu, Rex

Reviewed-by: Evan Quan <evan.quan@amd.com>

> -----Original Message-----
> From: amd-gfx [mailto:amd-gfx-bounces@lists.freedesktop.org] On Behalf
> Of Rex Zhu
> Sent: Wednesday, June 13, 2018 7:39 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Zhu, Rex <Rex.Zhu@amd.com>
> Subject: [PATCH v2 7/7] drm/amdgpu: Change PG enable sequence
> 
> Enable PG state after CG enabled.
> 
> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 33
> +++++++++++++++++++++++++-----
>  drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c      |  4 ----
>  2 files changed, 28 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> index caf588d..9647f54 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> @@ -1732,12 +1732,34 @@ static int
> amdgpu_device_ip_late_set_cg_state(struct amdgpu_device *adev)
>  		}
>  	}
> 
> -	if (adev->powerplay.pp_feature & PP_GFXOFF_MASK)
> -		/* enable gfx powergating */
> -		amdgpu_device_ip_set_powergating_state(adev,
> -
> AMD_IP_BLOCK_TYPE_GFX,
> -						       AMD_PG_STATE_GATE);
> +	return 0;
> +}
> +
> +static int amdgpu_device_ip_late_set_pg_state(struct amdgpu_device
> +*adev) {
> +	int i = 0, r;
> 
> +	if (amdgpu_emu_mode == 1)
> +		return 0;
> +
> +	for (i = 0; i < adev->num_ip_blocks; i++) {
> +		if (!adev->ip_blocks[i].status.valid)
> +			continue;
> +		/* skip CG for VCE/UVD, it's handled specially */
> +		if (adev->ip_blocks[i].version->type !=
> AMD_IP_BLOCK_TYPE_UVD &&
> +		    adev->ip_blocks[i].version->type !=
> AMD_IP_BLOCK_TYPE_VCE &&
> +		    adev->ip_blocks[i].version->type !=
> AMD_IP_BLOCK_TYPE_VCN &&
> +		    adev->ip_blocks[i].version->funcs-
> >set_powergating_state) {
> +			/* enable powergating to save power */
> +			r = adev->ip_blocks[i].version->funcs-
> >set_powergating_state((void *)adev,
> +
> 	     AMD_PG_STATE_GATE);
> +			if (r) {
> +				DRM_ERROR("set_powergating_state(gate)
> of IP block <%s> failed %d\n",
> +					  adev->ip_blocks[i].version->funcs-
> >name, r);
> +				return r;
> +			}
> +		}
> +	}
>  	return 0;
>  }
> 
> @@ -1900,6 +1922,7 @@ static void
> amdgpu_device_ip_late_init_func_handler(struct work_struct *work)
>  	struct amdgpu_device *adev =
>  		container_of(work, struct amdgpu_device,
> late_init_work.work);
>  	amdgpu_device_ip_late_set_cg_state(adev);
> +	amdgpu_device_ip_late_set_pg_state(adev);
>  }
> 
>  /**
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> index 916776a..2a860ef 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> @@ -5581,10 +5581,6 @@ static int gfx_v8_0_late_init(void *handle)
>  		return r;
>  	}
> 
> -	amdgpu_device_ip_set_powergating_state(adev,
> -					       AMD_IP_BLOCK_TYPE_GFX,
> -					       AMD_PG_STATE_GATE);
> -
>  	return 0;
>  }
> 
> --
> 1.9.1
> 
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 2+ messages in thread

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2018-06-13 11:38 [PATCH v2 7/7] drm/amdgpu: Change PG enable sequence Rex Zhu
     [not found] ` <1528889918-22713-1-git-send-email-Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
2018-06-20  2:15   ` Quan, Evan

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