From: Evan Quan <evan.quan-5C7GfCeVMHo@public.gmane.org>
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Cc: Evan Quan <evan.quan-5C7GfCeVMHo@public.gmane.org>
Subject: [PATCH 11/13] drm/amd/powerplay: set vega12 pre display configurations
Date: Tue, 19 Jun 2018 15:39:03 +0800 [thread overview]
Message-ID: <1529393945-16629-11-git-send-email-evan.quan@amd.com> (raw)
In-Reply-To: <1529393945-16629-1-git-send-email-evan.quan-5C7GfCeVMHo@public.gmane.org>
PPSMC_MSG_NumOfDisplays is set as 0 and uclk is forced as
highest.
Change-Id: I2400279d3c979d99f4dd4b8d53f051cd8f8e0c33
Signed-off-by: Evan Quan <evan.quan@amd.com>
---
drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c | 41 ++++++++++++++++++++++
1 file changed, 41 insertions(+)
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c
index 26bdfff..1fadb71 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c
@@ -2110,6 +2110,45 @@ static int vega12_apply_clocks_adjust_rules(struct pp_hwmgr *hwmgr)
return 0;
}
+static int vega12_set_uclk_to_highest_dpm_level(struct pp_hwmgr *hwmgr,
+ struct vega12_single_dpm_table *dpm_table)
+{
+ struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend);
+ int ret = 0;
+
+ if (data->smu_features[GNLD_DPM_UCLK].enabled) {
+ PP_ASSERT_WITH_CODE(dpm_table->count > 0,
+ "[SetUclkToHightestDpmLevel] Dpm table has no entry!",
+ return -EINVAL);
+ PP_ASSERT_WITH_CODE(dpm_table->count <= NUM_UCLK_DPM_LEVELS,
+ "[SetUclkToHightestDpmLevel] Dpm table has too many entries!",
+ return -EINVAL);
+
+ dpm_table->dpm_state.hard_min_level = dpm_table->dpm_levels[dpm_table->count - 1].value;
+ PP_ASSERT_WITH_CODE(!(ret = smum_send_msg_to_smc_with_parameter(hwmgr,
+ PPSMC_MSG_SetHardMinByFreq,
+ (PPCLK_UCLK << 16 ) | dpm_table->dpm_state.hard_min_level)),
+ "[SetUclkToHightestDpmLevel] Set hard min uclk failed!",
+ return ret);
+ }
+
+ return ret;
+}
+
+static int vega12_pre_display_configuration_changed_task(struct pp_hwmgr *hwmgr)
+{
+ struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend);
+ int ret = 0;
+
+ smum_send_msg_to_smc_with_parameter(hwmgr,
+ PPSMC_MSG_NumOfDisplays, 0);
+
+ ret = vega12_set_uclk_to_highest_dpm_level(hwmgr,
+ &data->dpm_table.mem_table);
+
+ return ret;
+}
+
static int vega12_display_configuration_changed_task(struct pp_hwmgr *hwmgr)
{
struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend);
@@ -2358,6 +2397,8 @@ static const struct pp_hwmgr_func vega12_hwmgr_funcs = {
.print_clock_levels = vega12_print_clock_levels,
.apply_clocks_adjust_rules =
vega12_apply_clocks_adjust_rules,
+ .pre_display_config_changed =
+ vega12_pre_display_configuration_changed_task,
.display_config_changed = vega12_display_configuration_changed_task,
.powergate_uvd = vega12_power_gate_uvd,
.powergate_vce = vega12_power_gate_vce,
--
2.7.4
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
next prev parent reply other threads:[~2018-06-19 7:39 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-06-19 7:38 [PATCH 01/13] drm/amd/powerplay: correct vega12 bootup values settings Evan Quan
[not found] ` <1529393945-16629-1-git-send-email-evan.quan-5C7GfCeVMHo@public.gmane.org>
2018-06-19 7:38 ` [PATCH 02/13] drm/amd/powerplay: smc_dpm_info structure change Evan Quan
[not found] ` <1529393945-16629-2-git-send-email-evan.quan-5C7GfCeVMHo@public.gmane.org>
2018-06-19 14:57 ` Alex Deucher
2018-06-19 7:38 ` [PATCH 03/13] drm/amd/powerplay: drop the acg fix Evan Quan
[not found] ` <1529393945-16629-3-git-send-email-evan.quan-5C7GfCeVMHo@public.gmane.org>
2018-06-19 14:57 ` Alex Deucher
2018-06-19 7:38 ` [PATCH 04/13] drm/amd/powerplay: revise default dpm tables setup Evan Quan
[not found] ` <1529393945-16629-4-git-send-email-evan.quan-5C7GfCeVMHo@public.gmane.org>
2018-06-19 14:59 ` Alex Deucher
2018-06-19 7:38 ` [PATCH 05/13] drm/amd/powerplay: retrieve all clock ranges on startup Evan Quan
[not found] ` <1529393945-16629-5-git-send-email-evan.quan-5C7GfCeVMHo@public.gmane.org>
2018-06-19 15:03 ` Alex Deucher
2018-06-19 7:38 ` [PATCH 06/13] drm/amd/powerplay: revise clock level setup Evan Quan
[not found] ` <1529393945-16629-6-git-send-email-evan.quan-5C7GfCeVMHo@public.gmane.org>
2018-06-19 15:07 ` Alex Deucher
2018-06-19 7:38 ` [PATCH 07/13] drm/amd/powerplay: initialize uvd/vce powergate status Evan Quan
[not found] ` <1529393945-16629-7-git-send-email-evan.quan-5C7GfCeVMHo@public.gmane.org>
2018-06-19 15:10 ` Alex Deucher
[not found] ` <CADnq5_NSa8Bh_ffmz12Zu2XH4b3GawMdz_6vTF5NbFp_pLaLYA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2018-06-20 6:34 ` Quan, Evan
2018-06-19 7:39 ` [PATCH 08/13] drm/amd/powerplay: correct smc display config setting Evan Quan
[not found] ` <1529393945-16629-8-git-send-email-evan.quan-5C7GfCeVMHo@public.gmane.org>
2018-06-19 15:13 ` Alex Deucher
2018-06-19 7:39 ` [PATCH 09/13] drm/amd/powerplay: correct vega12 max num of dpm level Evan Quan
[not found] ` <1529393945-16629-9-git-send-email-evan.quan-5C7GfCeVMHo@public.gmane.org>
2018-06-19 15:13 ` Alex Deucher
2018-06-19 7:39 ` [PATCH 10/13] drm/amd/powerplay: apply clocks adjust rules on power state change Evan Quan
[not found] ` <1529393945-16629-10-git-send-email-evan.quan-5C7GfCeVMHo@public.gmane.org>
2018-06-19 15:16 ` Alex Deucher
[not found] ` <CADnq5_PqQ0aRcA=8iUq9qLow+W6rwpXhsj2GKRskn3xjwEbicw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2018-06-19 15:43 ` Zhu, Rex
[not found] ` <CY4PR12MB1687A705AE09BB6492A5C156FB700-rpdhrqHFk06Y0SjTqZDccQdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
2018-06-20 6:22 ` Quan, Evan
2018-06-20 6:17 ` Quan, Evan
[not found] ` <SN6PR12MB26567D8241FEECAF286CEBA8E4770-kxOKjb6HO/FeL/N0e1LXkAdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
2018-06-20 14:05 ` Deucher, Alexander
2018-06-19 7:39 ` Evan Quan [this message]
[not found] ` <1529393945-16629-11-git-send-email-evan.quan-5C7GfCeVMHo@public.gmane.org>
2018-06-19 15:18 ` [PATCH 11/13] drm/amd/powerplay: set vega12 pre display configurations Alex Deucher
2018-06-19 7:39 ` [PATCH 12/13] drm/amd/powerplay: correct vega12 thermal support as true Evan Quan
[not found] ` <1529393945-16629-12-git-send-email-evan.quan-5C7GfCeVMHo@public.gmane.org>
2018-06-19 15:18 ` Alex Deucher
2018-06-19 7:39 ` [PATCH 13/13] drm/amd/powerplay: cosmetic fix Evan Quan
[not found] ` <1529393945-16629-13-git-send-email-evan.quan-5C7GfCeVMHo@public.gmane.org>
2018-06-19 15:19 ` Alex Deucher
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1529393945-16629-11-git-send-email-evan.quan@amd.com \
--to=evan.quan-5c7gfcevmho@public.gmane.org \
--cc=amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox