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* [PATCH 1/3] drm/amd/pp: Expose the smu support for SDMA PG cntl
@ 2018-09-25 13:32 Rex Zhu
       [not found] ` <1537882377-4763-1-git-send-email-Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
  0 siblings, 1 reply; 4+ messages in thread
From: Rex Zhu @ 2018-09-25 13:32 UTC (permalink / raw)
  To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW; +Cc: Rex Zhu

SDMA IP can be power up/down via smu message

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
---
 drivers/gpu/drm/amd/powerplay/amd_powerplay.c     | 18 ++++++++++++++++++
 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c |  8 ++++++++
 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h         |  1 +
 3 files changed, 27 insertions(+)

diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
index 60392cb..325075d 100644
--- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
+++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
@@ -1224,6 +1224,21 @@ static void pp_dpm_powergate_acp(void *handle, bool gate)
 	hwmgr->hwmgr_func->powergate_acp(hwmgr, gate);
 }
 
+static void pp_dpm_powergate_sdma(void *handle, bool gate)
+{
+	struct pp_hwmgr *hwmgr = handle;
+
+	if (!hwmgr)
+		return;
+
+	if (hwmgr->hwmgr_func->powergate_sdma == NULL) {
+		pr_info("%s was not implemented.\n", __func__);
+		return;
+	}
+
+	hwmgr->hwmgr_func->powergate_sdma(hwmgr, gate);
+}
+
 static int pp_set_powergating_by_smu(void *handle,
 				uint32_t block_type, bool gate)
 {
@@ -1246,6 +1261,9 @@ static int pp_set_powergating_by_smu(void *handle,
 	case AMD_IP_BLOCK_TYPE_ACP:
 		pp_dpm_powergate_acp(handle, gate);
 		break;
+	case AMD_IP_BLOCK_TYPE_SDMA:
+		pp_dpm_powergate_sdma(handle, gate);
+		break;
 	default:
 		break;
 	}
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c
index 5d1dae2..b7a9d0c 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c
@@ -1153,6 +1153,14 @@ static int smu10_powergate_mmhub(struct pp_hwmgr *hwmgr)
 	return smum_send_msg_to_smc(hwmgr, PPSMC_MSG_PowerGateMmHub);
 }
 
+static int smu10_powergate_sdma(struct pp_hwmgr *hwmgr, bool gate)
+{
+	if (gate)
+		return smum_send_msg_to_smc(hwmgr, PPSMC_MSG_PowerDownSdma);
+	else
+		return smum_send_msg_to_smc(hwmgr, PPSMC_MSG_PowerUpSdma);
+}
+
 static void smu10_powergate_vcn(struct pp_hwmgr *hwmgr, bool bgate)
 {
 	if (bgate) {
diff --git a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
index a6d9212..d1183b1 100644
--- a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
@@ -328,6 +328,7 @@ struct pp_hwmgr_func {
 	int (*set_power_limit)(struct pp_hwmgr *hwmgr, uint32_t n);
 	int (*powergate_mmhub)(struct pp_hwmgr *hwmgr);
 	int (*smus_notify_pwe)(struct pp_hwmgr *hwmgr);
+	int (*powergate_sdma)(struct pp_hwmgr *hwmgr, bool bgate);
 };
 
 struct pp_table_func {
-- 
1.9.1

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply related	[flat|nested] 4+ messages in thread

* [PATCH 2/3] drm/amdgpu: Move out power up/down sdma out of smu
       [not found] ` <1537882377-4763-1-git-send-email-Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
@ 2018-09-25 13:32   ` Rex Zhu
  2018-09-25 13:32   ` [PATCH 3/3] drm/amd/pp: Remove uncessary extra vcn pg cntl in smu Rex Zhu
  2018-09-25 13:39   ` [PATCH 1/3] drm/amd/pp: Expose the smu support for SDMA PG cntl Huang Rui
  2 siblings, 0 replies; 4+ messages in thread
From: Rex Zhu @ 2018-09-25 13:32 UTC (permalink / raw)
  To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW; +Cc: Rex Zhu

smu only expose interface to other ip blocks.
in order to reduce dependence between smu and other ip blocks

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c              |  6 ++++++
 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c   |  1 +
 drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c | 15 ---------------
 3 files changed, 7 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
index 517a721..71fa79e 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
@@ -1364,6 +1364,9 @@ static int sdma_v4_0_hw_init(void *handle)
 	int r;
 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;
 
+	if (adev->asic_type == CHIP_RAVEN && adev->powerplay.pp_funcs->set_powergating_by_smu)
+		amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_SDMA, false);
+
 	sdma_v4_0_init_golden_registers(adev);
 
 	r = sdma_v4_0_start(adev);
@@ -1381,6 +1384,9 @@ static int sdma_v4_0_hw_fini(void *handle)
 	sdma_v4_0_ctx_switch_enable(adev, false);
 	sdma_v4_0_enable(adev, false);
 
+	if (adev->asic_type == CHIP_RAVEN && adev->powerplay.pp_funcs->set_powergating_by_smu)
+		amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_SDMA, true);
+
 	return 0;
 }
 
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c
index b7a9d0c..dd18cb7 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c
@@ -1216,6 +1216,7 @@ static void smu10_powergate_vcn(struct pp_hwmgr *hwmgr, bool bgate)
 	.smus_notify_pwe = smu10_smus_notify_pwe,
 	.display_clock_voltage_request = smu10_display_clock_voltage_request,
 	.powergate_gfx = smu10_gfx_off_control,
+	.powergate_sdma = smu10_powergate_sdma,
 };
 
 int smu10_init_function_pointers(struct pp_hwmgr *hwmgr)
diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c
index 6f961de..d78d864 100644
--- a/drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c
+++ b/drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c
@@ -186,19 +186,6 @@ static int smu10_verify_smc_interface(struct pp_hwmgr *hwmgr)
 	return 0;
 }
 
-/* sdma is disabled by default in vbios, need to re-enable in driver */
-static void smu10_smc_enable_sdma(struct pp_hwmgr *hwmgr)
-{
-	smu10_send_msg_to_smc(hwmgr,
-			PPSMC_MSG_PowerUpSdma);
-}
-
-static void smu10_smc_disable_sdma(struct pp_hwmgr *hwmgr)
-{
-	smu10_send_msg_to_smc(hwmgr,
-			PPSMC_MSG_PowerDownSdma);
-}
-
 /* vcn is disabled by default in vbios, need to re-enable in driver */
 static void smu10_smc_enable_vcn(struct pp_hwmgr *hwmgr)
 {
@@ -218,7 +205,6 @@ static int smu10_smu_fini(struct pp_hwmgr *hwmgr)
 			(struct smu10_smumgr *)(hwmgr->smu_backend);
 
 	if (priv) {
-		smu10_smc_disable_sdma(hwmgr);
 		smu10_smc_disable_vcn(hwmgr);
 		amdgpu_bo_free_kernel(&priv->smu_tables.entry[SMU10_WMTABLE].handle,
 					&priv->smu_tables.entry[SMU10_WMTABLE].mc_addr,
@@ -243,7 +229,6 @@ static int smu10_start_smu(struct pp_hwmgr *hwmgr)
 
 	if (smu10_verify_smc_interface(hwmgr))
 		return -EINVAL;
-	smu10_smc_enable_sdma(hwmgr);
 	smu10_smc_enable_vcn(hwmgr);
 	return 0;
 }
-- 
1.9.1

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply related	[flat|nested] 4+ messages in thread

* [PATCH 3/3] drm/amd/pp: Remove uncessary extra vcn pg cntl in smu
       [not found] ` <1537882377-4763-1-git-send-email-Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
  2018-09-25 13:32   ` [PATCH 2/3] drm/amdgpu: Move out power up/down sdma out of smu Rex Zhu
@ 2018-09-25 13:32   ` Rex Zhu
  2018-09-25 13:39   ` [PATCH 1/3] drm/amd/pp: Expose the smu support for SDMA PG cntl Huang Rui
  2 siblings, 0 replies; 4+ messages in thread
From: Rex Zhu @ 2018-09-25 13:32 UTC (permalink / raw)
  To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW; +Cc: Rex Zhu

the vcn power will be controlled by VCN.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
---
 drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c | 16 +---------------
 1 file changed, 1 insertion(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c
index d78d864..d0eb8ab 100644
--- a/drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c
+++ b/drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c
@@ -186,26 +186,12 @@ static int smu10_verify_smc_interface(struct pp_hwmgr *hwmgr)
 	return 0;
 }
 
-/* vcn is disabled by default in vbios, need to re-enable in driver */
-static void smu10_smc_enable_vcn(struct pp_hwmgr *hwmgr)
-{
-	smu10_send_msg_to_smc_with_parameter(hwmgr,
-			PPSMC_MSG_PowerUpVcn, 0);
-}
-
-static void smu10_smc_disable_vcn(struct pp_hwmgr *hwmgr)
-{
-	smu10_send_msg_to_smc_with_parameter(hwmgr,
-			PPSMC_MSG_PowerDownVcn, 0);
-}
-
 static int smu10_smu_fini(struct pp_hwmgr *hwmgr)
 {
 	struct smu10_smumgr *priv =
 			(struct smu10_smumgr *)(hwmgr->smu_backend);
 
 	if (priv) {
-		smu10_smc_disable_vcn(hwmgr);
 		amdgpu_bo_free_kernel(&priv->smu_tables.entry[SMU10_WMTABLE].handle,
 					&priv->smu_tables.entry[SMU10_WMTABLE].mc_addr,
 					&priv->smu_tables.entry[SMU10_WMTABLE].table);
@@ -229,7 +215,7 @@ static int smu10_start_smu(struct pp_hwmgr *hwmgr)
 
 	if (smu10_verify_smc_interface(hwmgr))
 		return -EINVAL;
-	smu10_smc_enable_vcn(hwmgr);
+
 	return 0;
 }
 
-- 
1.9.1

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply related	[flat|nested] 4+ messages in thread

* Re: [PATCH 1/3] drm/amd/pp: Expose the smu support for SDMA PG cntl
       [not found] ` <1537882377-4763-1-git-send-email-Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
  2018-09-25 13:32   ` [PATCH 2/3] drm/amdgpu: Move out power up/down sdma out of smu Rex Zhu
  2018-09-25 13:32   ` [PATCH 3/3] drm/amd/pp: Remove uncessary extra vcn pg cntl in smu Rex Zhu
@ 2018-09-25 13:39   ` Huang Rui
  2 siblings, 0 replies; 4+ messages in thread
From: Huang Rui @ 2018-09-25 13:39 UTC (permalink / raw)
  To: Rex Zhu; +Cc: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW

Patch 1, 2:
Reviewed-by: Huang Rui <ray.huang@amd.com>

Patch 3 make raven2 hang during load vcn ucode.

Thanks,
Ray

On Tue, Sep 25, 2018 at 09:32:55PM +0800, Rex Zhu wrote:
> SDMA IP can be power up/down via smu message
> 
> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
> ---
>  drivers/gpu/drm/amd/powerplay/amd_powerplay.c     | 18 ++++++++++++++++++
>  drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c |  8 ++++++++
>  drivers/gpu/drm/amd/powerplay/inc/hwmgr.h         |  1 +
>  3 files changed, 27 insertions(+)
> 
> diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
> index 60392cb..325075d 100644
> --- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
> +++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
> @@ -1224,6 +1224,21 @@ static void pp_dpm_powergate_acp(void *handle, bool gate)
>  	hwmgr->hwmgr_func->powergate_acp(hwmgr, gate);
>  }
>  
> +static void pp_dpm_powergate_sdma(void *handle, bool gate)
> +{
> +	struct pp_hwmgr *hwmgr = handle;
> +
> +	if (!hwmgr)
> +		return;
> +
> +	if (hwmgr->hwmgr_func->powergate_sdma == NULL) {
> +		pr_info("%s was not implemented.\n", __func__);
> +		return;
> +	}
> +
> +	hwmgr->hwmgr_func->powergate_sdma(hwmgr, gate);
> +}
> +
>  static int pp_set_powergating_by_smu(void *handle,
>  				uint32_t block_type, bool gate)
>  {
> @@ -1246,6 +1261,9 @@ static int pp_set_powergating_by_smu(void *handle,
>  	case AMD_IP_BLOCK_TYPE_ACP:
>  		pp_dpm_powergate_acp(handle, gate);
>  		break;
> +	case AMD_IP_BLOCK_TYPE_SDMA:
> +		pp_dpm_powergate_sdma(handle, gate);
> +		break;
>  	default:
>  		break;
>  	}
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c
> index 5d1dae2..b7a9d0c 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c
> @@ -1153,6 +1153,14 @@ static int smu10_powergate_mmhub(struct pp_hwmgr *hwmgr)
>  	return smum_send_msg_to_smc(hwmgr, PPSMC_MSG_PowerGateMmHub);
>  }
>  
> +static int smu10_powergate_sdma(struct pp_hwmgr *hwmgr, bool gate)
> +{
> +	if (gate)
> +		return smum_send_msg_to_smc(hwmgr, PPSMC_MSG_PowerDownSdma);
> +	else
> +		return smum_send_msg_to_smc(hwmgr, PPSMC_MSG_PowerUpSdma);
> +}
> +
>  static void smu10_powergate_vcn(struct pp_hwmgr *hwmgr, bool bgate)
>  {
>  	if (bgate) {
> diff --git a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
> index a6d9212..d1183b1 100644
> --- a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
> +++ b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
> @@ -328,6 +328,7 @@ struct pp_hwmgr_func {
>  	int (*set_power_limit)(struct pp_hwmgr *hwmgr, uint32_t n);
>  	int (*powergate_mmhub)(struct pp_hwmgr *hwmgr);
>  	int (*smus_notify_pwe)(struct pp_hwmgr *hwmgr);
> +	int (*powergate_sdma)(struct pp_hwmgr *hwmgr, bool bgate);
>  };
>  
>  struct pp_table_func {
> -- 
> 1.9.1
> 
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2018-09-25 13:39 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2018-09-25 13:32 [PATCH 1/3] drm/amd/pp: Expose the smu support for SDMA PG cntl Rex Zhu
     [not found] ` <1537882377-4763-1-git-send-email-Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
2018-09-25 13:32   ` [PATCH 2/3] drm/amdgpu: Move out power up/down sdma out of smu Rex Zhu
2018-09-25 13:32   ` [PATCH 3/3] drm/amd/pp: Remove uncessary extra vcn pg cntl in smu Rex Zhu
2018-09-25 13:39   ` [PATCH 1/3] drm/amd/pp: Expose the smu support for SDMA PG cntl Huang Rui

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