From: "Marek Olšák" <maraeo-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Subject: [PATCH 3/3] drm/amdgpu: put HQD EOP buffers into VRAM
Date: Fri, 5 Oct 2018 17:01:44 -0400 [thread overview]
Message-ID: <20181005210144.13999-3-maraeo@gmail.com> (raw)
In-Reply-To: <20181005210144.13999-1-maraeo-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
From: Marek Olšák <marek.olsak@amd.com>
This increases performance of compute queues.
EOP events (PKT3_RELEASE_MEM) are stored into these buffers.
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
---
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 2 +-
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 2 +-
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
index 0e72bc09939a..000180d79f30 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
@@ -2774,21 +2774,21 @@ static int gfx_v7_0_mec_init(struct amdgpu_device *adev)
bitmap_zero(adev->gfx.mec.queue_bitmap, AMDGPU_MAX_COMPUTE_QUEUES);
/* take ownership of the relevant compute queues */
amdgpu_gfx_compute_queue_acquire(adev);
/* allocate space for ALL pipes (even the ones we don't own) */
mec_hpd_size = adev->gfx.mec.num_mec * adev->gfx.mec.num_pipe_per_mec
* GFX7_MEC_HPD_SIZE * 2;
r = amdgpu_bo_create_reserved(adev, mec_hpd_size, PAGE_SIZE,
- AMDGPU_GEM_DOMAIN_GTT,
+ AMDGPU_GEM_DOMAIN_VRAM,
&adev->gfx.mec.hpd_eop_obj,
&adev->gfx.mec.hpd_eop_gpu_addr,
(void **)&hpd);
if (r) {
dev_warn(adev->dev, "(%d) create, pin or map of HDP EOP bo failed\n", r);
gfx_v7_0_mec_fini(adev);
return r;
}
/* clear memory. Not sure if this is required or not */
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index 191feafc3b60..8b6dae7a10bf 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@ -1436,21 +1436,21 @@ static int gfx_v8_0_mec_init(struct amdgpu_device *adev)
size_t mec_hpd_size;
bitmap_zero(adev->gfx.mec.queue_bitmap, AMDGPU_MAX_COMPUTE_QUEUES);
/* take ownership of the relevant compute queues */
amdgpu_gfx_compute_queue_acquire(adev);
mec_hpd_size = adev->gfx.num_compute_rings * GFX8_MEC_HPD_SIZE;
r = amdgpu_bo_create_reserved(adev, mec_hpd_size, PAGE_SIZE,
- AMDGPU_GEM_DOMAIN_GTT,
+ AMDGPU_GEM_DOMAIN_VRAM,
&adev->gfx.mec.hpd_eop_obj,
&adev->gfx.mec.hpd_eop_gpu_addr,
(void **)&hpd);
if (r) {
dev_warn(adev->dev, "(%d) create HDP EOP bo failed\n", r);
return r;
}
memset(hpd, 0, mec_hpd_size);
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index a9d3d6a3fb41..3aaacf61d85e 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -1247,21 +1247,21 @@ static int gfx_v9_0_mec_init(struct amdgpu_device *adev)
const struct gfx_firmware_header_v1_0 *mec_hdr;
bitmap_zero(adev->gfx.mec.queue_bitmap, AMDGPU_MAX_COMPUTE_QUEUES);
/* take ownership of the relevant compute queues */
amdgpu_gfx_compute_queue_acquire(adev);
mec_hpd_size = adev->gfx.num_compute_rings * GFX9_MEC_HPD_SIZE;
r = amdgpu_bo_create_reserved(adev, mec_hpd_size, PAGE_SIZE,
- AMDGPU_GEM_DOMAIN_GTT,
+ AMDGPU_GEM_DOMAIN_VRAM,
&adev->gfx.mec.hpd_eop_obj,
&adev->gfx.mec.hpd_eop_gpu_addr,
(void **)&hpd);
if (r) {
dev_warn(adev->dev, "(%d) create HDP EOP bo failed\n", r);
gfx_v9_0_mec_fini(adev);
return r;
}
memset(hpd, 0, adev->gfx.mec.hpd_eop_obj->tbo.mem.size);
--
2.17.1
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next prev parent reply other threads:[~2018-10-05 21:01 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-10-05 21:01 [PATCH 1/3] drm/amdgpu: set GTT_USWC on reserved VRAM allocations Marek Olšák
[not found] ` <20181005210144.13999-1-maraeo-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2018-10-05 21:01 ` [PATCH 2/3] drm/amdgpu: increase the size of HQD EOP buffers Marek Olšák
[not found] ` <20181005210144.13999-2-maraeo-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2018-10-09 16:17 ` Alex Deucher
[not found] ` <CADnq5_M-uz+ABbZpm1-SFS26f1Q8T-w00FwXiMxj9HeAx8PhQw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2018-10-18 19:46 ` Marek Olšák
2018-10-18 19:57 ` Alex Deucher
2018-10-05 21:01 ` Marek Olšák [this message]
[not found] ` <20181005210144.13999-3-maraeo-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2018-10-09 16:18 ` [PATCH 3/3] drm/amdgpu: put HQD EOP buffers into VRAM Alex Deucher
2018-10-06 11:44 ` [PATCH 1/3] drm/amdgpu: set GTT_USWC on reserved VRAM allocations Christian König
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