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From: Huang Rui <ray.huang-5C7GfCeVMHo@public.gmane.org>
To: "Christian König"
	<ckoenig.leichtzumerken-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Cc: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Subject: Re: [PATCH 5/8] drm/amdgpu: remove SRIOV specific handling from sdma_v4_0_gfx_resume
Date: Tue, 9 Oct 2018 17:35:16 +0800	[thread overview]
Message-ID: <20181009093515.GE8763@hr-amur2> (raw)
In-Reply-To: <20181008133521.3237-5-christian.koenig-5C7GfCeVMHo@public.gmane.org>

On Mon, Oct 08, 2018 at 03:35:18PM +0200, Christian König wrote:
> Just use the same code path for both SRIOV and bare metal.
> 
> Signed-off-by: Christian König <christian.koenig@amd.com>

Reviewed-by: Huang Rui <ray.huang@amd.com>

> ---
>  drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 8 +-------
>  1 file changed, 1 insertion(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
> index 1124b45d166d..61da9b862ede 100644
> --- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
> @@ -723,11 +723,6 @@ static void sdma_v4_0_gfx_resume(struct amdgpu_device *adev, unsigned int i)
>  	/* before programing wptr to a less value, need set minor_ptr_update first */
>  	WREG32(sdma_v4_0_get_reg_offset(adev, i, mmSDMA0_GFX_MINOR_PTR_UPDATE), 1);
>  
> -	if (!amdgpu_sriov_vf(adev)) { /* only bare-metal use register write for wptr */
> -		WREG32(sdma_v4_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_WPTR), lower_32_bits(ring->wptr) << 2);
> -		WREG32(sdma_v4_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_WPTR_HI), upper_32_bits(ring->wptr) << 2);
> -	}
> -
>  	doorbell = RREG32(sdma_v4_0_get_reg_offset(adev, i, mmSDMA0_GFX_DOORBELL));
>  	doorbell_offset = RREG32(sdma_v4_0_get_reg_offset(adev, i, mmSDMA0_GFX_DOORBELL_OFFSET));
>  
> @@ -743,8 +738,7 @@ static void sdma_v4_0_gfx_resume(struct amdgpu_device *adev, unsigned int i)
>  	adev->nbio_funcs->sdma_doorbell_range(adev, i, ring->use_doorbell,
>  					      ring->doorbell_index);
>  
> -	if (amdgpu_sriov_vf(adev))
> -		sdma_v4_0_ring_set_wptr(ring);
> +	sdma_v4_0_ring_set_wptr(ring);
>  
>  	/* set minor_ptr_update to 0 after wptr programed */
>  	WREG32(sdma_v4_0_get_reg_offset(adev, i, mmSDMA0_GFX_MINOR_PTR_UPDATE), 0);
> -- 
> 2.14.1
> 
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
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  parent reply	other threads:[~2018-10-09  9:35 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-10-08 13:35 [PATCH 1/8] drm/amdgpu: fix incorrect use of amdgpu_irq_add_id in si_dma.c Christian König
     [not found] ` <20181008133521.3237-1-christian.koenig-5C7GfCeVMHo@public.gmane.org>
2018-10-08 13:35   ` [PATCH 2/8] drm/amdgpu: fix sdma v4 startup under SRIOV Christian König
     [not found]     ` <20181008133521.3237-2-christian.koenig-5C7GfCeVMHo@public.gmane.org>
2018-10-09  9:17       ` Huang Rui
2018-10-09 10:56         ` Christian König
     [not found]           ` <5ae6a2fe-80d6-858e-dcd2-2d44ab0b76ce-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2018-10-09 11:45             ` Liu, Monk
     [not found]               ` <CY4PR1201MB024521C2A0EA4BAE7272EA6584E70-1iTaO6aE1DBfNQakwlCMTGrFom/aUZj6nBOFsp37pqbUKgpGm//BTAC/G2K4zDHf@public.gmane.org>
2018-10-09 13:03                 ` Koenig, Christian
     [not found]                   ` <dbab4a65-d9ec-8ac7-75bb-86033de043f5-5C7GfCeVMHo@public.gmane.org>
2018-10-10  6:53                     ` Liu, Monk
     [not found]                       ` <CY4PR1201MB0245F26FFD7EE7558A7401B984E00-1iTaO6aE1DBfNQakwlCMTGrFom/aUZj6nBOFsp37pqbUKgpGm//BTAC/G2K4zDHf@public.gmane.org>
2018-10-10  7:24                         ` Ma, Sigil
     [not found]                           ` <CY4PR12MB1351B3D0E5E5A75BFAF7F0D487E00-rpdhrqHFk04aRV2spazHLQdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
2018-10-10  7:52                             ` Liu, Monk
     [not found]                               ` <CY4PR1201MB024507BB222336DFA92304C784E00-1iTaO6aE1DBfNQakwlCMTGrFom/aUZj6nBOFsp37pqbUKgpGm//BTAC/G2K4zDHf@public.gmane.org>
2018-10-12 14:27                                 ` Koenig, Christian
     [not found]                                   ` <8d7c9d2e-6d4d-34d3-d8dc-102e253610f2-5C7GfCeVMHo@public.gmane.org>
2018-10-16 12:34                                     ` Christian König
     [not found]                                       ` <2512cfee-a603-75c4-bf10-9ae0b4b8c5c7-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2018-10-16 14:42                                         ` Huang Rui
2018-10-08 13:35   ` [PATCH 3/8] drm/amdgpu: add basics for SDMA page queue support Christian König
     [not found]     ` <20181008133521.3237-3-christian.koenig-5C7GfCeVMHo@public.gmane.org>
2018-10-09  9:31       ` Huang Rui
2018-10-08 13:35   ` [PATCH 4/8] drm/amdgpu: remove non gfx specific handling from sdma_v4_0_gfx_resume Christian König
     [not found]     ` <20181008133521.3237-4-christian.koenig-5C7GfCeVMHo@public.gmane.org>
2018-10-09  9:34       ` Huang Rui
2018-10-08 13:35   ` [PATCH 5/8] drm/amdgpu: remove SRIOV " Christian König
     [not found]     ` <20181008133521.3237-5-christian.koenig-5C7GfCeVMHo@public.gmane.org>
2018-10-09  9:35       ` Huang Rui [this message]
2018-10-08 13:35   ` [PATCH 6/8] drm/amdgpu: add some [WR]REG32_SDMA macros to sdma_v4_0.c Christian König
     [not found]     ` <20181008133521.3237-6-christian.koenig-5C7GfCeVMHo@public.gmane.org>
2018-10-09  9:36       ` Huang Rui
2018-10-08 13:35   ` [PATCH 7/8] drm/amdgpu: activate paging queue on SDMA v4 Christian König
     [not found]     ` <20181008133521.3237-7-christian.koenig-5C7GfCeVMHo@public.gmane.org>
2018-10-09  9:40       ` Huang Rui
2018-10-08 13:35   ` [PATCH 8/8] drm/amdgpu: use paging queue for VM page table updates Christian König
     [not found]     ` <20181008133521.3237-8-christian.koenig-5C7GfCeVMHo@public.gmane.org>
2018-10-09  9:43       ` Huang Rui
2018-10-09  8:37   ` [PATCH 1/8] drm/amdgpu: fix incorrect use of amdgpu_irq_add_id in si_dma.c Huang Rui

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