From: Alex Deucher <alexdeucher-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Cc: Dennis Li <dennis.li-5C7GfCeVMHo@public.gmane.org>,
Hawking Zhang <Hawking.Zhang-5C7GfCeVMHo@public.gmane.org>
Subject: [PATCH 08/26] drm/amdgpu: querry umc error count
Date: Wed, 31 Jul 2019 12:58:00 -0500 [thread overview]
Message-ID: <20190731175818.20159-9-alexander.deucher@amd.com> (raw)
In-Reply-To: <20190731175818.20159-1-alexander.deucher-5C7GfCeVMHo@public.gmane.org>
From: Hawking Zhang <Hawking.Zhang@amd.com>
check umc error count in both ras querry function and
ras interrupt handler
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Dennis Li <dennis.li@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 11 ++++++++++-
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 3 +++
2 files changed, 13 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
index 3be306bf1603..845e75f35b19 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
@@ -586,11 +586,19 @@ int amdgpu_ras_error_query(struct amdgpu_device *adev,
struct ras_query_if *info)
{
struct ras_manager *obj = amdgpu_ras_find_obj(adev, &info->head);
+ struct ras_err_data err_data = {0, 0};
if (!obj)
return -EINVAL;
- /* TODO might read the register to read the count */
+ switch (info->head.block) {
+ case AMDGPU_RAS_BLOCK__UMC:
+ if (adev->umc_funcs->query_ras_error_count)
+ adev->umc_funcs->query_ras_error_count(adev, &err_data);
+ break;
+ default:
+ break;
+ }
info->ue_count = obj->err_data.ue_count;
info->ce_count = obj->err_data.ce_count;
@@ -984,6 +992,7 @@ static void amdgpu_ras_interrupt_handler(struct ras_manager *obj)
struct ras_ih_data *data = &obj->ih_data;
struct amdgpu_iv_entry entry;
int ret;
+ struct ras_err_data err_data = {0, 0};
while (data->rptr != data->wptr) {
rmb();
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index 4116841eb0e3..2748bd110fab 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -241,7 +241,10 @@ static int gmc_v9_0_ecc_interrupt_state(struct amdgpu_device *adev,
static int gmc_v9_0_process_ras_data_cb(struct amdgpu_device *adev,
struct amdgpu_iv_entry *entry)
{
+ struct ras_err_data err_data = {0, 0};
kgd2kfd_set_sram_ecc_flag(adev->kfd.dev);
+ if (adev->umc_funcs->query_ras_error_count)
+ adev->umc_funcs->query_ras_error_count(adev, &err_data);
amdgpu_ras_reset_gpu(adev, 0);
return AMDGPU_RAS_UE;
}
--
2.20.1
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
next prev parent reply other threads:[~2019-07-31 17:58 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-07-31 17:57 [PATCH 00/26] Further RAS enablement for vega20 Alex Deucher
[not found] ` <20190731175818.20159-1-alexander.deucher-5C7GfCeVMHo@public.gmane.org>
2019-07-31 17:57 ` [PATCH 01/26] drm/amdgpu: move some ras data structure to amdgpu_ras.h Alex Deucher
2019-07-31 17:57 ` [PATCH 02/26] drm/amdgpu: init RSMU and UMC ip base address for vega20 Alex Deucher
2019-07-31 17:57 ` [PATCH 03/26] drm/amdgpu: add amdgpu_umc_functions structure Alex Deucher
2019-07-31 17:57 ` [PATCH 04/26] drm/amdgpu: add rsmu v_0_0_2 ip headers Alex Deucher
2019-07-31 17:57 ` [PATCH 05/26] drm/amdgpu: add umc v6_1_1 IP headers Alex Deucher
2019-07-31 17:57 ` [PATCH 06/26] drm/amdgpu: add umc v6_1 query error count support Alex Deucher
2019-07-31 17:57 ` [PATCH 07/26] drm/amdgpu: init umc v6_1 functions for vega20 Alex Deucher
2019-07-31 17:58 ` Alex Deucher [this message]
2019-07-31 17:58 ` [PATCH 09/26] drm/amdgpu: add ras error count after each query (v2) Alex Deucher
2019-07-31 17:58 ` [PATCH 10/26] drm/amdgpu: add RREG64/WREG64(_PCIE) operations Alex Deucher
2019-07-31 17:58 ` [PATCH 11/26] drm/amdgpu: use 64bit operation macros for umc Alex Deucher
2019-07-31 17:58 ` [PATCH 12/26] drm/amdgpu: switch to amdgpu_umc structure Alex Deucher
2019-07-31 17:58 ` [PATCH 13/26] drm/amdgpu: update algorithm of umc uncorrectable error counting Alex Deucher
2019-07-31 17:58 ` [PATCH 14/26] drm/amdgpu: add support for recording ras error address Alex Deucher
2019-07-31 17:58 ` [PATCH 15/26] drm/amdgpu: add structures for umc error address translation Alex Deucher
2019-07-31 17:58 ` [PATCH 16/26] drm/amdgpu: query umc ras error address Alex Deucher
2019-07-31 17:58 ` [PATCH 17/26] drm/amdgpu: allow ras interrupt callback to return error data Alex Deucher
2019-07-31 17:58 ` [PATCH 18/26] drm/amdgpu: update interrupt callback for all ras clients Alex Deucher
2019-07-31 17:58 ` [PATCH 19/26] drm/amdgpu: add check for ras error type Alex Deucher
2019-07-31 17:58 ` [PATCH 20/26] drm/amdgpu: remove ras_reserve_vram in ras injection Alex Deucher
2019-07-31 17:58 ` [PATCH 21/26] drm/amd/include: add bitfield define for EDC registers Alex Deucher
2019-07-31 17:58 ` [PATCH 22/26] drm/amd/include: add define of TCP_EDC_CNT_NEW Alex Deucher
2019-07-31 17:58 ` [PATCH 23/26] drm/amdgpu: add define for gfx ras subblock Alex Deucher
2019-07-31 17:58 ` [PATCH 24/26] drm/amdgpu: add RAS callback for gfx Alex Deucher
[not found] ` <20190731175818.20159-25-alexander.deucher-5C7GfCeVMHo@public.gmane.org>
2019-08-01 5:40 ` Kevin Wang
2019-07-31 17:58 ` [PATCH 25/26] drm/amdgpu: support gfx ras error injection and err_cnt query Alex Deucher
2019-07-31 17:58 ` [PATCH 26/26] drm/amdgpu: disable inject for failed subblocks of gfx Alex Deucher
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20190731175818.20159-9-alexander.deucher@amd.com \
--to=alexdeucher-re5jqeeqqe8avxtiumwx3w@public.gmane.org \
--cc=Hawking.Zhang-5C7GfCeVMHo@public.gmane.org \
--cc=amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org \
--cc=dennis.li-5C7GfCeVMHo@public.gmane.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox