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From: Sasha Levin <sashal@kernel.org>
To: linux-kernel@vger.kernel.org, stable@vger.kernel.org
Cc: "Yu Zhao" <yuzhao@google.com>,
	"Michel Dänzer" <michel.daenzer@amd.com>,
	"Alex Deucher" <alexander.deucher@amd.com>,
	"Sasha Levin" <sashal@kernel.org>,
	amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Subject: [PATCH AUTOSEL 4.19 044/167] drm/amdgpu: validate user pitch alignment
Date: Tue,  3 Sep 2019 12:23:16 -0400	[thread overview]
Message-ID: <20190903162519.7136-44-sashal@kernel.org> (raw)
In-Reply-To: <20190903162519.7136-1-sashal@kernel.org>

From: Yu Zhao <yuzhao@google.com>

[ Upstream commit 89f23b6efef554766177bf51aa754bce14c3e7da ]

Userspace may request pitch alignment that is not supported by GPU.
Some requests 32, but GPU ignores it and uses default 64 when cpp is
4. If GEM object is allocated based on the smaller alignment, GPU
DMA will go out of bound.

Cc: stable@vger.kernel.org # v4.2+
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Yu Zhao <yuzhao@google.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index 686a26de50f91..6e67814d33e29 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
@@ -527,6 +527,16 @@ amdgpu_display_user_framebuffer_create(struct drm_device *dev,
 	struct drm_gem_object *obj;
 	struct amdgpu_framebuffer *amdgpu_fb;
 	int ret;
+	struct amdgpu_device *adev = dev->dev_private;
+	int cpp = drm_format_plane_cpp(mode_cmd->pixel_format, 0);
+	int pitch = mode_cmd->pitches[0] / cpp;
+
+	pitch = amdgpu_align_pitch(adev, pitch, cpp, false);
+	if (mode_cmd->pitches[0] != pitch) {
+		DRM_DEBUG_KMS("Invalid pitch: expecting %d but got %d\n",
+			      pitch, mode_cmd->pitches[0]);
+		return ERR_PTR(-EINVAL);
+	}
 
 	obj = drm_gem_object_lookup(file_priv, mode_cmd->handles[0]);
 	if (obj ==  NULL) {
-- 
2.20.1

  parent reply	other threads:[~2019-09-03 16:23 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <20190903162519.7136-1-sashal@kernel.org>
2019-09-03 16:22 ` [PATCH AUTOSEL 4.19 009/167] drm/amdgpu/gfx9: Update gfx9 golden settings Sasha Levin
2019-09-03 16:22 ` [PATCH AUTOSEL 4.19 010/167] drm/amdgpu: Update gc_9_0 " Sasha Levin
2019-09-03 16:22 ` [PATCH AUTOSEL 4.19 022/167] powerplay: Respect units on max dcfclk watermark Sasha Levin
2019-09-03 16:23 ` Sasha Levin [this message]
2019-09-03 16:40   ` [PATCH AUTOSEL 4.19 044/167] drm/amdgpu: validate user pitch alignment Michel Dänzer
2019-09-03 17:03     ` Greg KH
2019-09-03 20:01       ` Sasha Levin
2019-09-03 20:16         ` Daniel Vetter
2019-09-04  8:55           ` Michel Dänzer
2019-09-04 12:08             ` Sasha Levin
2019-09-04 15:05               ` Michel Dänzer
2019-09-07 15:50               ` Joe Perches
2019-09-07 14:58           ` Alex Deucher
     [not found]             ` <CADnq5_Mfee4xmzMJ-Hmw251QCMfabWPKd8PX+o70D97qdCDJ8g-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2019-09-09 15:25               ` Michel Dänzer
2019-09-03 16:23 ` [PATCH AUTOSEL 4.19 045/167] drm/amdgpu: validate user GEM object size Sasha Levin
     [not found] ` <20190903162519.7136-1-sashal-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
2019-09-03 16:22   ` [PATCH AUTOSEL 4.19 023/167] drm/amd/pp: Fix truncated clock value when set watermark Sasha Levin
2019-09-03 16:22   ` [PATCH AUTOSEL 4.19 024/167] drm/amd/dm: Understand why attaching path/tile properties are needed Sasha Levin
2019-09-03 16:24   ` [PATCH AUTOSEL 4.19 114/167] drm/amdkfd: Add missing Polaris10 ID Sasha Levin
2019-09-03 16:24   ` [PATCH AUTOSEL 4.19 116/167] drm/amdgpu: fix ring test failure issue during s3 in vce 3.0 (V2) Sasha Levin
2019-09-03 16:24   ` [PATCH AUTOSEL 4.19 117/167] drm/amdgpu/{uvd, vcn}: fetch ring's read_ptr after alloc Sasha Levin

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