From: Sonny Jiang <sonny.jiang@amd.com>
To: amd-gfx@lists.freedesktop.org
Cc: Sonny Jiang <sonny.jiang@amd.com>
Subject: [PATCH 1/7] drm amdgpu: SI UVD PACKET_TYPE0
Date: Wed, 17 Jun 2020 18:00:10 -0400 [thread overview]
Message-ID: <20200617220016.4844-1-sonny.jiang@amd.com> (raw)
---
drivers/gpu/drm/amd/amdgpu/sid.h | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/sid.h b/drivers/gpu/drm/amd/amdgpu/sid.h
index 7cf12adb3915..75b5d441b628 100644
--- a/drivers/gpu/drm/amd/amdgpu/sid.h
+++ b/drivers/gpu/drm/amd/amdgpu/sid.h
@@ -1646,9 +1646,10 @@
/*
* PM4
*/
-#define PACKET0(reg, n) ((RADEON_PACKET_TYPE0 << 30) | \
- (((reg) >> 2) & 0xFFFF) | \
- ((n) & 0x3FFF) << 16)
+#define PACKET_TYPE0 0
+#define PACKET0(reg, n) ((PACKET_TYPE0 << 30) | \
+ ((reg) & 0xFFFF) | \
+ ((n) & 0x3FFF) << 16)
#define CP_PACKET2 0x80000000
#define PACKET2_PAD_SHIFT 0
#define PACKET2_PAD_MASK (0x3fffffff << 0)
--
2.25.1
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next reply other threads:[~2020-06-17 22:00 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-17 22:00 Sonny Jiang [this message]
2020-06-17 22:00 ` [PATCH 2/7] drm amdgpu: SI UVD registers Sonny Jiang
2020-06-17 22:00 ` [PATCH 3/7] drm amdgpu: SI UVD v3_1 Sonny Jiang
2020-06-17 22:00 ` [PATCH 4/7] drm amdgpu: SI UVD context rreg/wreg Sonny Jiang
2020-06-17 22:00 ` [PATCH 5/7] drm amdgpu: SI UVD add uvd_v3_1 to makefile Sonny Jiang
2020-06-17 22:00 ` [PATCH 6/7] drm amdgpu: SI UVD enable for Oland Sonny Jiang
2020-06-17 22:00 ` [PATCH 7/7] drm amdgpu: SI UVD enabled on Verde, Tahiti, Pitcairn Sonny Jiang
2020-06-18 4:31 ` [PATCH 1/7] drm amdgpu: SI UVD PACKET_TYPE0 Alex Deucher
2020-06-22 18:14 ` Christian König
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