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From: Alex Deucher <alexdeucher@gmail.com>
To: amd-gfx@lists.freedesktop.org
Cc: Alex Deucher <alexander.deucher@amd.com>
Subject: [PATCH 1/8] drm/amdgpu: fix up DCHUBBUB_SDPIF_MMIO_CNTRL_0 handling
Date: Mon, 24 Aug 2020 12:15:20 -0400	[thread overview]
Message-ID: <20200824161527.2001591-1-alexander.deucher@amd.com> (raw)

Properly define this register using a relative offset rather
than an absolute offset and use the proper SOC15 macros to
access it.  It's also DCN, not DCE, so remove it from the
DCE12 header.

No functional change.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c                      | 7 +++++--
 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h | 2 --
 2 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index 6a780b674018..624f7fcf5eba 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -67,6 +67,9 @@
 #define HUBP0_DCSURF_PRI_VIEWPORT_DIMENSION__PRI_VIEWPORT_HEIGHT__SHIFT                                       0x10
 #define HUBP0_DCSURF_PRI_VIEWPORT_DIMENSION__PRI_VIEWPORT_WIDTH_MASK                                          0x00003FFFL
 #define HUBP0_DCSURF_PRI_VIEWPORT_DIMENSION__PRI_VIEWPORT_HEIGHT_MASK                                         0x3FFF0000L
+#define mmDCHUBBUB_SDPIF_MMIO_CNTRL_0                                                                  0x049d
+#define mmDCHUBBUB_SDPIF_MMIO_CNTRL_0_BASE_IDX                                                         2
+
 
 static const u32 golden_settings_vega10_hdp[] =
 {
@@ -1282,7 +1285,7 @@ static void gmc_v9_0_init_golden_registers(struct amdgpu_device *adev)
 static void gmc_v9_0_restore_registers(struct amdgpu_device *adev)
 {
 	if (adev->asic_type == CHIP_RAVEN)
-		WREG32(mmDCHUBBUB_SDPIF_MMIO_CNTRL_0, adev->gmc.sdpif_register);
+		WREG32_SOC15(DCE, 0, mmDCHUBBUB_SDPIF_MMIO_CNTRL_0, adev->gmc.sdpif_register);
 }
 
 /**
@@ -1394,7 +1397,7 @@ static int gmc_v9_0_hw_init(void *handle)
 static void gmc_v9_0_save_registers(struct amdgpu_device *adev)
 {
 	if (adev->asic_type == CHIP_RAVEN)
-		adev->gmc.sdpif_register = RREG32(mmDCHUBBUB_SDPIF_MMIO_CNTRL_0);
+		adev->gmc.sdpif_register = RREG32_SOC15(DCE, 0, mmDCHUBBUB_SDPIF_MMIO_CNTRL_0);
 }
 
 /**
diff --git a/drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h b/drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h
index 27bb8c1ab858..b6f74bf4af02 100644
--- a/drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h
+++ b/drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h
@@ -7376,8 +7376,6 @@
 #define mmCRTC4_CRTC_DRR_CONTROL                                                                       0x0f3e
 #define mmCRTC4_CRTC_DRR_CONTROL_BASE_IDX                                                              2
 
-#define mmDCHUBBUB_SDPIF_MMIO_CNTRL_0                                                                  0x395d
-#define mmDCHUBBUB_SDPIF_MMIO_CNTRL_0_BASE_IDX                                                         2
 
 // addressBlock: dce_dc_fmt4_dispdec
 // base address: 0x2000
-- 
2.25.4

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             reply	other threads:[~2020-08-24 16:15 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-08-24 16:15 Alex Deucher [this message]
2020-08-24 16:15 ` [PATCH 2/8] drm/amdgpu: add an asic callback for pre asic init Alex Deucher
2020-08-24 16:15 ` [PATCH 3/8] drm/amdgpu: add pre_asic_init callback for SI Alex Deucher
2020-08-28  8:06   ` Christian König
2020-08-28 13:38     ` Alex Deucher
2020-08-28 14:30       ` Christian König
2020-08-24 16:15 ` [PATCH 4/8] drm/amdgpu: add pre_asic_init callback for CIK Alex Deucher
2020-08-24 16:15 ` [PATCH 5/8] drm/amdgpu: add pre_asic_init callback for VI Alex Deucher
2020-08-24 16:15 ` [PATCH 6/8] drm/amdgpu: add pre_asic_init callback for SOC15 Alex Deucher
2020-08-24 16:15 ` [PATCH 7/8] drm/amdgpu: add pre_asic_init callback for navi Alex Deucher
2020-08-24 16:15 ` [PATCH 8/8] drm/amdgpu: add a wrapper for atom asic_init Alex Deucher
2020-08-24 18:13   ` Nirmoy

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