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From: Evan Quan <evan.quan@amd.com>
To: amd-gfx@lists.freedesktop.org
Cc: alexander.deucher@amd.com, Evan Quan <evan.quan@amd.com>
Subject: [PATCH 9/9] drm/amd/pm: make namings and comments more readable
Date: Wed,  2 Sep 2020 16:31:34 +0800	[thread overview]
Message-ID: <20200902083134.25569-9-evan.quan@amd.com> (raw)
In-Reply-To: <20200902083134.25569-1-evan.quan@amd.com>

And to fit more accurately what the cod does.

Change-Id: I2d917e66b55925c3a14aa96ac8e0c8c2110848c0
Signed-off-by: Evan Quan <evan.quan@amd.com>
---
 drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
index 801c92eb439f..cd5394d4beb0 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
@@ -2185,7 +2185,7 @@ static int navi10_run_btc(struct smu_context *smu)
 	return ret;
 }
 
-static bool navi10_need_umc_cdr_12gbps_workaround(struct smu_context *smu)
+static bool navi10_need_umc_cdr_workaround(struct smu_context *smu)
 {
 	struct amdgpu_device *adev = smu->adev;
 
@@ -2276,7 +2276,7 @@ static int navi10_set_dummy_pstates_table_location(struct smu_context *smu)
 					       NULL);
 }
 
-static int navi10_disable_umc_cdr_12gbps_workaround(struct smu_context *smu)
+static int navi10_run_umc_cdr_workaround(struct smu_context *smu)
 {
 	struct amdgpu_device *adev = smu->adev;
 	uint8_t umc_fw_greater_than_v136 = false;
@@ -2284,7 +2284,7 @@ static int navi10_disable_umc_cdr_12gbps_workaround(struct smu_context *smu)
 	uint32_t param;
 	int ret = 0;
 
-	if (!navi10_need_umc_cdr_12gbps_workaround(smu))
+	if (!navi10_need_umc_cdr_workaround(smu))
 		return 0;
 
 	ret = smu_cmn_send_smc_msg_with_param(smu,
@@ -2655,7 +2655,7 @@ static int navi10_post_smu_init(struct smu_context *smu)
 		return ret;
 	}
 
-	ret = navi10_disable_umc_cdr_12gbps_workaround(smu);
+	ret = navi10_run_umc_cdr_workaround(smu);
 	if (ret)
 		dev_err(adev->dev, "Failed to apply umc cdr workaround!\n");
 
-- 
2.28.0

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  parent reply	other threads:[~2020-09-02  8:32 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-02  8:31 [PATCH 1/9] drm/amd/pm: wrapper for postponing some setup job after DAL initializatioa(V2) Evan Quan
2020-09-02  8:31 ` [PATCH 2/9] drm/amd/pm: postpone SOCCLK/UCLK enablement after DAL initialization(V2) Evan Quan
2020-09-02  8:31 ` [PATCH 3/9] drm/amd/pm: put Navi1X umc cdr workaround in post_smu_init Evan Quan
2020-09-02  8:31 ` [PATCH 4/9] drm/amd/pm: revise the umc hybrid cdr workaround Evan Quan
2020-09-02  8:31 ` [PATCH 5/9] drm/amd/pm: allocate a new buffer for pstate dummy reading Evan Quan
2020-09-02  8:31 ` [PATCH 6/9] drm/amd/pm: implement a new umc cdr workaround Evan Quan
2020-09-02  8:31 ` [PATCH 7/9] drm/amd/pm: apply the CDR workarounds only with some specific UMC firmwares Evan Quan
2020-09-02  8:31 ` [PATCH 8/9] drm/amd/pm: correct the requirement for umc cdr workaround Evan Quan
2020-09-02  8:31 ` Evan Quan [this message]
2020-09-03 13:41   ` [PATCH 9/9] drm/amd/pm: make namings and comments more readable Alex Deucher

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