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From: Daniel Vetter <daniel@ffwll.ch>
To: "Michel Dänzer" <michel@daenzer.net>
Cc: Leo Li <sunpeng.li@amd.com>,
	dri-devel@lists.freedesktop.org, amd-gfx@lists.freedesktop.org,
	Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>,
	Daniel Vetter <daniel@ffwll.ch>
Subject: Re: [PATCH v2] drm/amdgpu/dc: Require primary plane to be enabled whenever the CRTC is
Date: Mon, 7 Sep 2020 09:57:16 +0200	[thread overview]
Message-ID: <20200907075716.GO2352366@phenom.ffwll.local> (raw)
In-Reply-To: <20200904104304.41246-1-michel@daenzer.net>

On Fri, Sep 04, 2020 at 12:43:04PM +0200, Michel Dänzer wrote:
> From: Michel Dänzer <mdaenzer@redhat.com>
> 
> Don't check drm_crtc_state::active for this either, per its
> documentation in include/drm/drm_crtc.h:
> 
>  * Hence drivers must not consult @active in their various
>  * &drm_mode_config_funcs.atomic_check callback to reject an atomic
>  * commit.
> 
> atomic_remove_fb disables the CRTC as needed for disabling the primary
> plane.
> 
> This prevents at least the following problems if the primary plane gets
> disabled (e.g. due to destroying the FB assigned to the primary plane,
> as happens e.g. with mutter in Wayland mode):
> 
> * The legacy cursor ioctl returned EINVAL for a non-0 cursor FB ID
>   (which enables the cursor plane).
> * If the cursor plane was enabled, changing the legacy DPMS property
>   value from off to on returned EINVAL.
> 
> v2:
> * Minor changes to code comment and commit log, per review feedback.
> 
> GitLab: https://gitlab.gnome.org/GNOME/mutter/-/issues/1108
> GitLab: https://gitlab.gnome.org/GNOME/mutter/-/issues/1165
> GitLab: https://gitlab.gnome.org/GNOME/mutter/-/issues/1344
> Suggested-by: Daniel Vetter <daniel.vetter@ffwll.ch>
> Signed-off-by: Michel Dänzer <mdaenzer@redhat.com>

Commit message agrees with my understand of this maze now, so:

Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
> ---
>  .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 32 ++++++-------------
>  1 file changed, 10 insertions(+), 22 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> index 45f5f4b7024d..c5f9452490d6 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> @@ -5269,19 +5269,6 @@ static void dm_crtc_helper_disable(struct drm_crtc *crtc)
>  {
>  }
>  
> -static bool does_crtc_have_active_cursor(struct drm_crtc_state *new_crtc_state)
> -{
> -	struct drm_device *dev = new_crtc_state->crtc->dev;
> -	struct drm_plane *plane;
> -
> -	drm_for_each_plane_mask(plane, dev, new_crtc_state->plane_mask) {
> -		if (plane->type == DRM_PLANE_TYPE_CURSOR)
> -			return true;
> -	}
> -
> -	return false;
> -}
> -
>  static int count_crtc_active_planes(struct drm_crtc_state *new_crtc_state)
>  {
>  	struct drm_atomic_state *state = new_crtc_state->state;
> @@ -5345,19 +5332,20 @@ static int dm_crtc_helper_atomic_check(struct drm_crtc *crtc,
>  		return ret;
>  	}
>  
> -	/* In some use cases, like reset, no stream is attached */
> -	if (!dm_crtc_state->stream)
> -		return 0;
> -
>  	/*
> -	 * We want at least one hardware plane enabled to use
> -	 * the stream with a cursor enabled.
> +	 * We require the primary plane to be enabled whenever the CRTC is, otherwise
> +	 * drm_mode_cursor_universal may end up trying to enable the cursor plane while all other
> +	 * planes are disabled, which is not supported by the hardware. And there is legacy
> +	 * userspace which stops using the HW cursor altogether in response to the resulting EINVAL.
>  	 */
> -	if (state->enable && state->active &&
> -	    does_crtc_have_active_cursor(state) &&
> -	    dm_crtc_state->active_planes == 0)
> +	if (state->enable &&
> +	    !(state->plane_mask & drm_plane_mask(crtc->primary)))
>  		return -EINVAL;
>  
> +	/* In some use cases, like reset, no stream is attached */
> +	if (!dm_crtc_state->stream)
> +		return 0;
> +
>  	if (dc_validate_stream(dc, dm_crtc_state->stream) == DC_OK)
>  		return 0;
>  
> -- 
> 2.28.0
> 

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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  reply	other threads:[~2020-09-07  7:57 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-08-21 16:57 [PATCH] drm/amdgpu/dc: Require primary plane to be enabled whenever the CRTC is Michel Dänzer
2020-08-21 18:07 ` Kazlauskas, Nicholas
2020-08-22  9:59   ` Michel Dänzer
2020-08-24  7:43     ` Pekka Paalanen
2020-08-25 14:55       ` Michel Dänzer
2020-09-01  7:57         ` Daniel Vetter
2020-09-01  8:56           ` Michel Dänzer
2020-09-01 10:34             ` Daniel Vetter
2020-08-25 16:58     ` Kazlauskas, Nicholas
2020-08-26  8:24       ` Pekka Paalanen
2020-08-26  8:58         ` Michel Dänzer
2020-09-01  7:54         ` Daniel Vetter
2020-09-01 13:58           ` Harry Wentland
2020-09-02  7:02             ` Daniel Vetter
2020-09-02  9:26               ` Michel Dänzer
2020-09-04 10:43 ` [PATCH v2] " Michel Dänzer
2020-09-07  7:57   ` Daniel Vetter [this message]
2020-09-14  7:52     ` Michel Dänzer
2020-09-14 14:37       ` Kazlauskas, Nicholas
2020-09-14 15:22         ` Michel Dänzer
2020-09-14 15:33           ` Kazlauskas, Nicholas
2020-09-14 15:44             ` Michel Dänzer
2020-09-15 21:00         ` Alex Deucher

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