From: Emily Deng <Emily.Deng@amd.com>
To: <amd-gfx@lists.freedesktop.org>
Cc: "Emily.Deng" <Emily.Deng@amd.com>
Subject: [PATCH v2] drm/amdgpu: Restore msix after FLR
Date: Tue, 30 Mar 2021 12:33:26 +0800 [thread overview]
Message-ID: <20210330043326.28540-1-Emily.Deng@amd.com> (raw)
From: "Emily.Deng" <Emily.Deng@amd.com>
After FLR, the msix will be cleared, so need to re-enable it.
v2:
Change name with amdgpu_irq prefix, remove #ifdef.
Signed-off-by: Emily.Deng <Emily.Deng@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
index 03412543427a..8936589bd7f9 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
@@ -277,6 +277,17 @@ static bool amdgpu_msi_ok(struct amdgpu_device *adev)
return true;
}
+void amdgpu_irq_restore_msix(struct amdgpu_device *adev)
+{
+ u16 ctrl;
+
+ pci_read_config_word(adev->pdev, adev->pdev->msix_cap + PCI_MSIX_FLAGS, &ctrl);
+ ctrl &= ~PCI_MSIX_FLAGS_ENABLE;
+ pci_write_config_word(adev->pdev, adev->pdev->msix_cap + PCI_MSIX_FLAGS, ctrl);
+ ctrl |= PCI_MSIX_FLAGS_ENABLE;
+ pci_write_config_word(adev->pdev, adev->pdev->msix_cap + PCI_MSIX_FLAGS, ctrl);
+}
+
/**
* amdgpu_irq_init - initialize interrupt handling
*
@@ -558,6 +569,7 @@ void amdgpu_irq_gpu_reset_resume_helper(struct amdgpu_device *adev)
{
int i, j, k;
+ amdgpu_irq_restore_msix(adev);
for (i = 0; i < AMDGPU_IRQ_CLIENTID_MAX; ++i) {
if (!adev->irq.client[i].sources)
continue;
--
2.25.1
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next reply other threads:[~2021-03-30 4:33 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-30 4:33 Emily Deng [this message]
-- strict thread matches above, loose matches on Subject: below --
2021-06-24 5:31 [PATCH v2] drm/amdgpu: Restore msix after FLR Peng Ju Zhou
2021-06-24 13:01 ` Christian König
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