* [PATCH v2] drm/amdgpu: Restore msix after FLR
@ 2021-03-30 4:33 Emily Deng
0 siblings, 0 replies; 3+ messages in thread
From: Emily Deng @ 2021-03-30 4:33 UTC (permalink / raw)
To: amd-gfx; +Cc: Emily.Deng
From: "Emily.Deng" <Emily.Deng@amd.com>
After FLR, the msix will be cleared, so need to re-enable it.
v2:
Change name with amdgpu_irq prefix, remove #ifdef.
Signed-off-by: Emily.Deng <Emily.Deng@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
index 03412543427a..8936589bd7f9 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
@@ -277,6 +277,17 @@ static bool amdgpu_msi_ok(struct amdgpu_device *adev)
return true;
}
+void amdgpu_irq_restore_msix(struct amdgpu_device *adev)
+{
+ u16 ctrl;
+
+ pci_read_config_word(adev->pdev, adev->pdev->msix_cap + PCI_MSIX_FLAGS, &ctrl);
+ ctrl &= ~PCI_MSIX_FLAGS_ENABLE;
+ pci_write_config_word(adev->pdev, adev->pdev->msix_cap + PCI_MSIX_FLAGS, ctrl);
+ ctrl |= PCI_MSIX_FLAGS_ENABLE;
+ pci_write_config_word(adev->pdev, adev->pdev->msix_cap + PCI_MSIX_FLAGS, ctrl);
+}
+
/**
* amdgpu_irq_init - initialize interrupt handling
*
@@ -558,6 +569,7 @@ void amdgpu_irq_gpu_reset_resume_helper(struct amdgpu_device *adev)
{
int i, j, k;
+ amdgpu_irq_restore_msix(adev);
for (i = 0; i < AMDGPU_IRQ_CLIENTID_MAX; ++i) {
if (!adev->irq.client[i].sources)
continue;
--
2.25.1
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^ permalink raw reply related [flat|nested] 3+ messages in thread* [PATCH v2] drm/amdgpu: Restore msix after FLR
@ 2021-06-24 5:31 Peng Ju Zhou
2021-06-24 13:01 ` Christian König
0 siblings, 1 reply; 3+ messages in thread
From: Peng Ju Zhou @ 2021-06-24 5:31 UTC (permalink / raw)
To: amd-gfx; +Cc: Emily.Deng
From: "Emily.Deng" <Emily.Deng@amd.com>
After FLR, the msix will be cleared, so need to re-enable it.
Signed-off-by: Emily.Deng <Emily.Deng@amd.com>
Signed-off-by: Peng Ju Zhou <PengJu.Zhou@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
index 90f50561b43a..ba9edafd4fc6 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
@@ -277,6 +277,18 @@ static bool amdgpu_msi_ok(struct amdgpu_device *adev)
return true;
}
+void amdgpu_restore_msix(struct amdgpu_device *adev)
+{
+#ifdef PCI_IRQ_MSIX
+ u16 ctrl;
+
+ pci_read_config_word(adev->pdev, adev->pdev->msix_cap + PCI_MSIX_FLAGS, &ctrl);
+ ctrl &= ~PCI_MSIX_FLAGS_ENABLE;
+ pci_write_config_word(adev->pdev, adev->pdev->msix_cap + PCI_MSIX_FLAGS, ctrl);
+ ctrl |= PCI_MSIX_FLAGS_ENABLE;
+ pci_write_config_word(adev->pdev, adev->pdev->msix_cap + PCI_MSIX_FLAGS, ctrl);
+#endif
+}
/**
* amdgpu_irq_init - initialize interrupt handling
*
@@ -558,6 +570,7 @@ void amdgpu_irq_gpu_reset_resume_helper(struct amdgpu_device *adev)
{
int i, j, k;
+ amdgpu_restore_msix(adev);
for (i = 0; i < AMDGPU_IRQ_CLIENTID_MAX; ++i) {
if (!adev->irq.client[i].sources)
continue;
--
2.17.1
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^ permalink raw reply related [flat|nested] 3+ messages in thread* Re: [PATCH v2] drm/amdgpu: Restore msix after FLR
2021-06-24 5:31 Peng Ju Zhou
@ 2021-06-24 13:01 ` Christian König
0 siblings, 0 replies; 3+ messages in thread
From: Christian König @ 2021-06-24 13:01 UTC (permalink / raw)
To: Peng Ju Zhou, amd-gfx; +Cc: Emily.Deng
Am 24.06.21 um 07:31 schrieb Peng Ju Zhou:
> From: "Emily.Deng" <Emily.Deng@amd.com>
>
> After FLR, the msix will be cleared, so need to re-enable it.
>
> Signed-off-by: Emily.Deng <Emily.Deng@amd.com>
> Signed-off-by: Peng Ju Zhou <PengJu.Zhou@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c | 13 +++++++++++++
> 1 file changed, 13 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
> index 90f50561b43a..ba9edafd4fc6 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
> @@ -277,6 +277,18 @@ static bool amdgpu_msi_ok(struct amdgpu_device *adev)
> return true;
> }
>
> +void amdgpu_restore_msix(struct amdgpu_device *adev)
> +{
> +#ifdef PCI_IRQ_MSIX
Please drop that ifdef, the macro is always defined upstream.
Christian.
> + u16 ctrl;
> +
> + pci_read_config_word(adev->pdev, adev->pdev->msix_cap + PCI_MSIX_FLAGS, &ctrl);
> + ctrl &= ~PCI_MSIX_FLAGS_ENABLE;
> + pci_write_config_word(adev->pdev, adev->pdev->msix_cap + PCI_MSIX_FLAGS, ctrl);
> + ctrl |= PCI_MSIX_FLAGS_ENABLE;
> + pci_write_config_word(adev->pdev, adev->pdev->msix_cap + PCI_MSIX_FLAGS, ctrl);
> +#endif
> +}
> /**
> * amdgpu_irq_init - initialize interrupt handling
> *
> @@ -558,6 +570,7 @@ void amdgpu_irq_gpu_reset_resume_helper(struct amdgpu_device *adev)
> {
> int i, j, k;
>
> + amdgpu_restore_msix(adev);
> for (i = 0; i < AMDGPU_IRQ_CLIENTID_MAX; ++i) {
> if (!adev->irq.client[i].sources)
> continue;
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^ permalink raw reply [flat|nested] 3+ messages in thread
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