* [PATCH 1/3] drm/amdgpu: add function to show ucode name via id
@ 2021-06-24 6:47 Lang Yu
2021-06-24 6:47 ` [PATCH 2/3] drm/amdgpu: add function to show psp_gfx_cmd " Lang Yu
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Lang Yu @ 2021-06-24 6:47 UTC (permalink / raw)
To: amd-gfx; +Cc: Alex Deucher, Huang Rui, Lang Yu
From: Lang Yu <Lang.Yu@amd.com>
Implement function amdgpu_ucode_show to show ucode name
via ucode id.
Signed-off-by: Lang Yu <Lang.Yu@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c | 78 +++++++++++++++++++++++
drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h | 2 +
2 files changed, 80 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
index 2834981f8c08..6a03abb009ef 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
@@ -416,6 +416,84 @@ amdgpu_ucode_get_load_type(struct amdgpu_device *adev, int load_type)
return AMDGPU_FW_LOAD_DIRECT;
}
+const char *amdgpu_ucode_show(enum AMDGPU_UCODE_ID ucode_id)
+{
+ switch (ucode_id) {
+ case AMDGPU_UCODE_ID_SDMA0:
+ return "SDMA0";
+ case AMDGPU_UCODE_ID_SDMA1:
+ return "SDMA1";
+ case AMDGPU_UCODE_ID_SDMA2:
+ return "SDMA2";
+ case AMDGPU_UCODE_ID_SDMA3:
+ return "SDMA3";
+ case AMDGPU_UCODE_ID_SDMA4:
+ return "SDMA4";
+ case AMDGPU_UCODE_ID_SDMA5:
+ return "SDMA5";
+ case AMDGPU_UCODE_ID_SDMA6:
+ return "SDMA6";
+ case AMDGPU_UCODE_ID_SDMA7:
+ return "SDMA7";
+ case AMDGPU_UCODE_ID_CP_CE:
+ return "CP_CE";
+ case AMDGPU_UCODE_ID_CP_PFP:
+ return "CP_PFP";
+ case AMDGPU_UCODE_ID_CP_ME:
+ return "CP_ME";
+ case AMDGPU_UCODE_ID_CP_MEC1:
+ return "CP_MEC1";
+ case AMDGPU_UCODE_ID_CP_MEC1_JT:
+ return "CP_MEC1_JT";
+ case AMDGPU_UCODE_ID_CP_MEC2:
+ return "CP_MEC2";
+ case AMDGPU_UCODE_ID_CP_MEC2_JT:
+ return "CP_MEC2_JT";
+ case AMDGPU_UCODE_ID_CP_MES:
+ return "CP_MES";
+ case AMDGPU_UCODE_ID_CP_MES_DATA:
+ return "CP_MES_DATA";
+ case AMDGPU_UCODE_ID_RLC_RESTORE_LIST_CNTL:
+ return "RLC_RESTORE_LIST_CNTL";
+ case AMDGPU_UCODE_ID_RLC_RESTORE_LIST_GPM_MEM:
+ return "RLC_RESTORE_LIST_GPM_MEM";
+ case AMDGPU_UCODE_ID_RLC_RESTORE_LIST_SRM_MEM:
+ return "RLC_RESTORE_LIST_SRM_MEM";
+ case AMDGPU_UCODE_ID_RLC_IRAM:
+ return "RLC_IRAM";
+ case AMDGPU_UCODE_ID_RLC_DRAM:
+ return "RLC_DRAM";
+ case AMDGPU_UCODE_ID_RLC_G:
+ return "RLC_G";
+ case AMDGPU_UCODE_ID_STORAGE:
+ return "STORAGE";
+ case AMDGPU_UCODE_ID_SMC:
+ return "SMC";
+ case AMDGPU_UCODE_ID_UVD:
+ return "UVD";
+ case AMDGPU_UCODE_ID_UVD1:
+ return "UVD1";
+ case AMDGPU_UCODE_ID_VCE:
+ return "VCE";
+ case AMDGPU_UCODE_ID_VCN:
+ return "VCN";
+ case AMDGPU_UCODE_ID_VCN1:
+ return "VCN1";
+ case AMDGPU_UCODE_ID_DMCU_ERAM:
+ return "DMCU_ERAM";
+ case AMDGPU_UCODE_ID_DMCU_INTV:
+ return "DMCU_INTV";
+ case AMDGPU_UCODE_ID_VCN0_RAM:
+ return "VCN0_RAM";
+ case AMDGPU_UCODE_ID_VCN1_RAM:
+ return "VCN1_RAM";
+ case AMDGPU_UCODE_ID_DMCUB:
+ return "DMCUB";
+ default:
+ return "UNKNOWN UCODE";
+ }
+}
+
#define FW_VERSION_ATTR(name, mode, field) \
static ssize_t show_##name(struct device *dev, \
struct device_attribute *attr, \
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h
index 270309e7f5f5..4b0d34f1d450 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h
@@ -449,4 +449,6 @@ void amdgpu_ucode_sysfs_fini(struct amdgpu_device *adev);
enum amdgpu_firmware_load_type
amdgpu_ucode_get_load_type(struct amdgpu_device *adev, int load_type);
+const char *amdgpu_ucode_show(enum AMDGPU_UCODE_ID ucode_id);
+
#endif
--
2.25.1
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^ permalink raw reply related [flat|nested] 4+ messages in thread* [PATCH 2/3] drm/amdgpu: add function to show psp_gfx_cmd name via id
2021-06-24 6:47 [PATCH 1/3] drm/amdgpu: add function to show ucode name via id Lang Yu
@ 2021-06-24 6:47 ` Lang Yu
2021-06-24 6:47 ` [PATCH 3/3] drm/amdgpu: show explicit name instead of id in psp_cmd_submit_buf Lang Yu
2021-06-24 8:29 ` [PATCH 1/3] drm/amdgpu: add function to show ucode name via id Huang Rui
2 siblings, 0 replies; 4+ messages in thread
From: Lang Yu @ 2021-06-24 6:47 UTC (permalink / raw)
To: amd-gfx; +Cc: Alex Deucher, Huang Rui, Lang Yu
From: Lang Yu <Lang.Yu@amd.com>
Implement function psp_gfx_cmd_show to show cmd name
via cmd id.
Signed-off-by: Lang Yu <Lang.Yu@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 38 +++++++++++++++++++++++++
1 file changed, 38 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index 40da29d8ec1e..ff26185b1485 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
@@ -353,6 +353,44 @@ int psp_wait_for(struct psp_context *psp, uint32_t reg_index,
return -ETIME;
}
+static const char *psp_gfx_cmd_show(enum psp_gfx_cmd_id cmd_id)
+{
+ switch (cmd_id) {
+ case GFX_CMD_ID_LOAD_TA:
+ return "LOAD_TA";
+ case GFX_CMD_ID_UNLOAD_TA:
+ return "UNLOAD_TA";
+ case GFX_CMD_ID_INVOKE_CMD:
+ return "INVOKE_CMD";
+ case GFX_CMD_ID_LOAD_ASD:
+ return "LOAD_ASD";
+ case GFX_CMD_ID_SETUP_TMR:
+ return "SETUP_TMR";
+ case GFX_CMD_ID_LOAD_IP_FW:
+ return "LOAD_IP_FW";
+ case GFX_CMD_ID_DESTROY_TMR:
+ return "DESTROY_TMR";
+ case GFX_CMD_ID_SAVE_RESTORE:
+ return "SAVE_RESTORE_IP_FW";
+ case GFX_CMD_ID_SETUP_VMR:
+ return "SETUP_VMR";
+ case GFX_CMD_ID_DESTROY_VMR:
+ return "DESTROY_VMR";
+ case GFX_CMD_ID_PROG_REG:
+ return "PROG_REG";
+ case GFX_CMD_ID_GET_FW_ATTESTATION:
+ return "GET_FW_ATTESTATION";
+ case GFX_CMD_ID_LOAD_TOC:
+ return "ID_LOAD_TOC";
+ case GFX_CMD_ID_AUTOLOAD_RLC:
+ return "AUTOLOAD_RLC";
+ case GFX_CMD_ID_BOOT_CFG:
+ return "BOOT_CFG";
+ default:
+ return "UNKNOWN CMD";
+ }
+}
+
static int
psp_cmd_submit_buf(struct psp_context *psp,
struct amdgpu_firmware_info *ucode,
--
2.25.1
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^ permalink raw reply related [flat|nested] 4+ messages in thread* [PATCH 3/3] drm/amdgpu: show explicit name instead of id in psp_cmd_submit_buf
2021-06-24 6:47 [PATCH 1/3] drm/amdgpu: add function to show ucode name via id Lang Yu
2021-06-24 6:47 ` [PATCH 2/3] drm/amdgpu: add function to show psp_gfx_cmd " Lang Yu
@ 2021-06-24 6:47 ` Lang Yu
2021-06-24 8:29 ` [PATCH 1/3] drm/amdgpu: add function to show ucode name via id Huang Rui
2 siblings, 0 replies; 4+ messages in thread
From: Lang Yu @ 2021-06-24 6:47 UTC (permalink / raw)
To: amd-gfx; +Cc: Alex Deucher, Huang Rui, Lang Yu
From: Lang Yu <Lang.Yu@amd.com>
Use amdgpu_ucode_show to show ucode name and psp_gfx_cmd_show to
show psp_gfx_cmd name in psp_cmd_submit_buf.
Signed-off-by: Lang Yu <Lang.Yu@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index ff26185b1485..76faf10bcd54 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
@@ -450,10 +450,10 @@ psp_cmd_submit_buf(struct psp_context *psp,
*/
if (!skip_unsupport && (psp->cmd_buf_mem->resp.status || !timeout) && !ras_intr) {
if (ucode)
- DRM_WARN("failed to load ucode id (%d) ",
- ucode->ucode_id);
- DRM_WARN("psp command (0x%X) failed and response status is (0x%X)\n",
- psp->cmd_buf_mem->cmd_id,
+ DRM_WARN("failed to load ucode (%s) ",
+ amdgpu_ucode_show(ucode->ucode_id));
+ DRM_WARN("psp gfx command (%s) failed and response status is (0x%X)\n",
+ psp_gfx_cmd_show(psp->cmd_buf_mem->cmd_id),
psp->cmd_buf_mem->resp.status);
if (!timeout) {
mutex_unlock(&psp->mutex);
--
2.25.1
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^ permalink raw reply related [flat|nested] 4+ messages in thread* Re: [PATCH 1/3] drm/amdgpu: add function to show ucode name via id
2021-06-24 6:47 [PATCH 1/3] drm/amdgpu: add function to show ucode name via id Lang Yu
2021-06-24 6:47 ` [PATCH 2/3] drm/amdgpu: add function to show psp_gfx_cmd " Lang Yu
2021-06-24 6:47 ` [PATCH 3/3] drm/amdgpu: show explicit name instead of id in psp_cmd_submit_buf Lang Yu
@ 2021-06-24 8:29 ` Huang Rui
2 siblings, 0 replies; 4+ messages in thread
From: Huang Rui @ 2021-06-24 8:29 UTC (permalink / raw)
To: Yu, Lang; +Cc: Deucher, Alexander, amd-gfx@lists.freedesktop.org
On Thu, Jun 24, 2021 at 02:47:22PM +0800, Yu, Lang wrote:
> From: Lang Yu <Lang.Yu@amd.com>
>
> Implement function amdgpu_ucode_show to show ucode name
> via ucode id.
>
> Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Series are Reviewed-by: Huang Rui <ray.huang@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c | 78 +++++++++++++++++++++++
> drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h | 2 +
> 2 files changed, 80 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
> index 2834981f8c08..6a03abb009ef 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
> @@ -416,6 +416,84 @@ amdgpu_ucode_get_load_type(struct amdgpu_device *adev, int load_type)
> return AMDGPU_FW_LOAD_DIRECT;
> }
>
> +const char *amdgpu_ucode_show(enum AMDGPU_UCODE_ID ucode_id)
> +{
> + switch (ucode_id) {
> + case AMDGPU_UCODE_ID_SDMA0:
> + return "SDMA0";
> + case AMDGPU_UCODE_ID_SDMA1:
> + return "SDMA1";
> + case AMDGPU_UCODE_ID_SDMA2:
> + return "SDMA2";
> + case AMDGPU_UCODE_ID_SDMA3:
> + return "SDMA3";
> + case AMDGPU_UCODE_ID_SDMA4:
> + return "SDMA4";
> + case AMDGPU_UCODE_ID_SDMA5:
> + return "SDMA5";
> + case AMDGPU_UCODE_ID_SDMA6:
> + return "SDMA6";
> + case AMDGPU_UCODE_ID_SDMA7:
> + return "SDMA7";
> + case AMDGPU_UCODE_ID_CP_CE:
> + return "CP_CE";
> + case AMDGPU_UCODE_ID_CP_PFP:
> + return "CP_PFP";
> + case AMDGPU_UCODE_ID_CP_ME:
> + return "CP_ME";
> + case AMDGPU_UCODE_ID_CP_MEC1:
> + return "CP_MEC1";
> + case AMDGPU_UCODE_ID_CP_MEC1_JT:
> + return "CP_MEC1_JT";
> + case AMDGPU_UCODE_ID_CP_MEC2:
> + return "CP_MEC2";
> + case AMDGPU_UCODE_ID_CP_MEC2_JT:
> + return "CP_MEC2_JT";
> + case AMDGPU_UCODE_ID_CP_MES:
> + return "CP_MES";
> + case AMDGPU_UCODE_ID_CP_MES_DATA:
> + return "CP_MES_DATA";
> + case AMDGPU_UCODE_ID_RLC_RESTORE_LIST_CNTL:
> + return "RLC_RESTORE_LIST_CNTL";
> + case AMDGPU_UCODE_ID_RLC_RESTORE_LIST_GPM_MEM:
> + return "RLC_RESTORE_LIST_GPM_MEM";
> + case AMDGPU_UCODE_ID_RLC_RESTORE_LIST_SRM_MEM:
> + return "RLC_RESTORE_LIST_SRM_MEM";
> + case AMDGPU_UCODE_ID_RLC_IRAM:
> + return "RLC_IRAM";
> + case AMDGPU_UCODE_ID_RLC_DRAM:
> + return "RLC_DRAM";
> + case AMDGPU_UCODE_ID_RLC_G:
> + return "RLC_G";
> + case AMDGPU_UCODE_ID_STORAGE:
> + return "STORAGE";
> + case AMDGPU_UCODE_ID_SMC:
> + return "SMC";
> + case AMDGPU_UCODE_ID_UVD:
> + return "UVD";
> + case AMDGPU_UCODE_ID_UVD1:
> + return "UVD1";
> + case AMDGPU_UCODE_ID_VCE:
> + return "VCE";
> + case AMDGPU_UCODE_ID_VCN:
> + return "VCN";
> + case AMDGPU_UCODE_ID_VCN1:
> + return "VCN1";
> + case AMDGPU_UCODE_ID_DMCU_ERAM:
> + return "DMCU_ERAM";
> + case AMDGPU_UCODE_ID_DMCU_INTV:
> + return "DMCU_INTV";
> + case AMDGPU_UCODE_ID_VCN0_RAM:
> + return "VCN0_RAM";
> + case AMDGPU_UCODE_ID_VCN1_RAM:
> + return "VCN1_RAM";
> + case AMDGPU_UCODE_ID_DMCUB:
> + return "DMCUB";
> + default:
> + return "UNKNOWN UCODE";
> + }
> +}
> +
> #define FW_VERSION_ATTR(name, mode, field) \
> static ssize_t show_##name(struct device *dev, \
> struct device_attribute *attr, \
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h
> index 270309e7f5f5..4b0d34f1d450 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h
> @@ -449,4 +449,6 @@ void amdgpu_ucode_sysfs_fini(struct amdgpu_device *adev);
> enum amdgpu_firmware_load_type
> amdgpu_ucode_get_load_type(struct amdgpu_device *adev, int load_type);
>
> +const char *amdgpu_ucode_show(enum AMDGPU_UCODE_ID ucode_id);
> +
> #endif
> --
> 2.25.1
>
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^ permalink raw reply [flat|nested] 4+ messages in thread
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2021-06-24 6:47 ` [PATCH 3/3] drm/amdgpu: show explicit name instead of id in psp_cmd_submit_buf Lang Yu
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