[PATCH V3 1/3] drm/amd/pm: fulfill SMU13.0.0 cstate control interface

[PATCH V3 1/3] drm/amd/pm: fulfill SMU13.0.0 cstate control interface

[Evan Quan]

Fulfill the functionality for cstate control.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Change-Id: I2b7253898503b8051bbf90f429b46221410146b0
---
 drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
index 1d454485e0d9..29529328152d 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
@@ -119,6 +119,7 @@ static struct cmn2asic_msg_mapping smu_v13_0_0_message_map[SMU_MSG_MAX_COUNT] =
 	MSG_MAP(NotifyPowerSource,		PPSMC_MSG_NotifyPowerSource,           0),
 	MSG_MAP(Mode1Reset,			PPSMC_MSG_Mode1Reset,                  0),
 	MSG_MAP(PrepareMp1ForUnload,		PPSMC_MSG_PrepareMp1ForUnload,         0),
+	MSG_MAP(DFCstateControl,		PPSMC_MSG_SetExternalClientDfCstateAllow, 0),
 };
 
 static struct cmn2asic_mapping smu_v13_0_0_clk_map[SMU_CLK_COUNT] = {
@@ -1753,6 +1754,15 @@ static int smu_v13_0_0_set_mp1_state(struct smu_context *smu,
 	return ret;
 }
 
+static int smu_v13_0_0_set_df_cstate(struct smu_context *smu,
+				     enum pp_df_cstate state)
+{
+	return smu_cmn_send_smc_msg_with_param(smu,
+					       SMU_MSG_DFCstateControl,
+					       state,
+					       NULL);
+}
+
 static const struct pptable_funcs smu_v13_0_0_ppt_funcs = {
 	.get_allowed_feature_mask = smu_v13_0_0_get_allowed_feature_mask,
 	.set_default_dpm_table = smu_v13_0_0_set_default_dpm_table,
@@ -1822,6 +1832,7 @@ static const struct pptable_funcs smu_v13_0_0_ppt_funcs = {
 	.mode1_reset_is_support = smu_v13_0_0_is_mode1_reset_supported,
 	.mode1_reset = smu_v13_0_mode1_reset,
 	.set_mp1_state = smu_v13_0_0_set_mp1_state,
+	.set_df_cstate = smu_v13_0_0_set_df_cstate,
 };
 
 void smu_v13_0_0_set_ppt_funcs(struct smu_context *smu)
-- 
2.34.1

[PATCH V3 2/3] drm/amd/pm: fulfill SMU13.0.7 cstate control interface

[Evan Quan]

Fulfill the functionality for cstate control.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Change-Id: I3e7ec7d0434d3b34855a9267ab1989a3b85d5206
---
 drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
index c422bf8a09b1..c4102cfb734c 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
@@ -121,6 +121,7 @@ static struct cmn2asic_msg_mapping smu_v13_0_7_message_map[SMU_MSG_MAX_COUNT] =
 	MSG_MAP(Mode1Reset,             PPSMC_MSG_Mode1Reset,                  0),
 	MSG_MAP(PrepareMp1ForUnload,		PPSMC_MSG_PrepareMp1ForUnload,         0),
 	MSG_MAP(SetMGpuFanBoostLimitRpm,	PPSMC_MSG_SetMGpuFanBoostLimitRpm,     0),
+	MSG_MAP(DFCstateControl,		PPSMC_MSG_SetExternalClientDfCstateAllow, 0),
 };
 
 static struct cmn2asic_mapping smu_v13_0_7_clk_map[SMU_CLK_COUNT] = {
@@ -1587,6 +1588,16 @@ static bool smu_v13_0_7_is_mode1_reset_supported(struct smu_context *smu)
 
 	return true;
 }
+
+static int smu_v13_0_7_set_df_cstate(struct smu_context *smu,
+				     enum pp_df_cstate state)
+{
+	return smu_cmn_send_smc_msg_with_param(smu,
+					       SMU_MSG_DFCstateControl,
+					       state,
+					       NULL);
+}
+
 static const struct pptable_funcs smu_v13_0_7_ppt_funcs = {
 	.get_allowed_feature_mask = smu_v13_0_7_get_allowed_feature_mask,
 	.set_default_dpm_table = smu_v13_0_7_set_default_dpm_table,
@@ -1649,6 +1660,7 @@ static const struct pptable_funcs smu_v13_0_7_ppt_funcs = {
 	.mode1_reset_is_support = smu_v13_0_7_is_mode1_reset_supported,
 	.mode1_reset = smu_v13_0_mode1_reset,
 	.set_mp1_state = smu_v13_0_7_set_mp1_state,
+	.set_df_cstate = smu_v13_0_7_set_df_cstate,
 };
 
 void smu_v13_0_7_set_ppt_funcs(struct smu_context *smu)
-- 
2.34.1

[PATCH V3 3/3] drm/amd/pm: disable cstate feature for gpu reset scenario

[Evan Quan]

Suggested by PMFW team and same as what did for gfxoff feature.
This can address some Mode1Reset failures observed on SMU13.0.0.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Change-Id: Ieb4e204c49abd405b1dce559c2ff75bb3887b6f9
--
v1->v2:
  - revise the code comments(Alex)
  - limit this to SMU13.0.0 and 13.0.7
v2->v3:
  - make this happen before display suspending
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c         | 8 ++++++++
 drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c  | 7 +++++++
 drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c | 7 +++++++
 3 files changed, 22 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index ab8f970b2849..874bf623f394 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -2928,6 +2928,14 @@ static int amdgpu_device_ip_suspend_phase1(struct amdgpu_device *adev)
 	amdgpu_device_set_pg_state(adev, AMD_PG_STATE_UNGATE);
 	amdgpu_device_set_cg_state(adev, AMD_CG_STATE_UNGATE);
 
+	/*
+	 * Per PMFW team's suggestion, driver needs to handle gfxoff
+	 * and df cstate features disablement for gpu reset(e.g. Mode1Reset)
+	 * scenario. Add the missing df cstate disablement here.
+	 */
+	if (amdgpu_dpm_set_df_cstate(adev, DF_CSTATE_DISALLOW))
+		dev_warn(adev->dev, "Failed to disallow df cstate");
+
 	for (i = adev->num_ip_blocks - 1; i >= 0; i--) {
 		if (!adev->ip_blocks[i].status.valid)
 			continue;
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
index 445005571f76..7d34f40460eb 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
@@ -2245,6 +2245,13 @@ static int arcturus_set_df_cstate(struct smu_context *smu,
 	uint32_t smu_version;
 	int ret;
 
+	/*
+	 * Arcturus does not need the cstate disablement
+	 * prerequisite for gpu reset.
+	 */
+	if (amdgpu_in_reset(adev) || adev->in_suspend)
+		return 0;
+
 	ret = smu_cmn_get_smc_version(smu, NULL, &smu_version);
 	if (ret) {
 		dev_err(smu->adev->dev, "Failed to get smu version!\n");
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
index 619aee51b123..93a0f7f6a34e 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
@@ -1640,6 +1640,13 @@ static bool aldebaran_is_baco_supported(struct smu_context *smu)
 static int aldebaran_set_df_cstate(struct smu_context *smu,
 				   enum pp_df_cstate state)
 {
+	/*
+	 * Aldebaran does not need the cstate disablement
+	 * prerequisite for gpu reset.
+	 */
+	if (amdgpu_in_reset(adev) || adev->in_suspend)
+		return 0;
+
 	return smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_DFCstateControl, state, NULL);
 }
 
-- 
2.34.1

Re: [PATCH V3 3/3] drm/amd/pm: disable cstate feature for gpu reset scenario

[Lazar, Lijo]

On 10/13/2022 7:01 AM, Evan Quan wrote:
> Suggested by PMFW team and same as what did for gfxoff feature.
> This can address some Mode1Reset failures observed on SMU13.0.0.
> 
> Signed-off-by: Evan Quan <evan.quan@amd.com>
> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
> Change-Id: Ieb4e204c49abd405b1dce559c2ff75bb3887b6f9
> --
> v1->v2:
>    - revise the code comments(Alex)
>    - limit this to SMU13.0.0 and 13.0.7
> v2->v3:
>    - make this happen before display suspending

A better thing would be do
> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_device.c         | 8 ++++++++
>   drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c  | 7 +++++++
>   drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c | 7 +++++++
>   3 files changed, 22 insertions(+)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> index ab8f970b2849..874bf623f394 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> @@ -2928,6 +2928,14 @@ static int amdgpu_device_ip_suspend_phase1(struct amdgpu_device *adev)
>   	amdgpu_device_set_pg_state(adev, AMD_PG_STATE_UNGATE);
>   	amdgpu_device_set_cg_state(adev, AMD_CG_STATE_UNGATE);
>   
> +	/*
> +	 * Per PMFW team's suggestion, driver needs to handle gfxoff
> +	 * and df cstate features disablement for gpu reset(e.g. Mode1Reset)
> +	 * scenario. Add the missing df cstate disablement here.
> +	 */
> +	if (amdgpu_dpm_set_df_cstate(adev, DF_CSTATE_DISALLOW))
> +		dev_warn(adev->dev, "Failed to disallow df cstate");
> +

If it's only related to display, you could move this right after below 
line so that headless systems don't need to take care of this. That will 
avoid any special handling needed for Aldebaran/Arcuturus also.

                if (adev->ip_blocks[i].version->type != 
AMD_IP_BLOCK_TYPE_DCE)
                         continue;

Thanks,
Lijo

>   	for (i = adev->num_ip_blocks - 1; i >= 0; i--) {
>   		if (!adev->ip_blocks[i].status.valid)
>   			continue;
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
> index 445005571f76..7d34f40460eb 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
> @@ -2245,6 +2245,13 @@ static int arcturus_set_df_cstate(struct smu_context *smu,
>   	uint32_t smu_version;
>   	int ret;
>   
> +	/*
> +	 * Arcturus does not need the cstate disablement
> +	 * prerequisite for gpu reset.
> +	 */
> +	if (amdgpu_in_reset(adev) || adev->in_suspend)
> +		return 0;
> +
>   	ret = smu_cmn_get_smc_version(smu, NULL, &smu_version);
>   	if (ret) {
>   		dev_err(smu->adev->dev, "Failed to get smu version!\n");
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
> index 619aee51b123..93a0f7f6a34e 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
> @@ -1640,6 +1640,13 @@ static bool aldebaran_is_baco_supported(struct smu_context *smu)
>   static int aldebaran_set_df_cstate(struct smu_context *smu,
>   				   enum pp_df_cstate state)
>   {
> +	/*
> +	 * Aldebaran does not need the cstate disablement
> +	 * prerequisite for gpu reset.
> +	 */
> +	if (amdgpu_in_reset(adev) || adev->in_suspend)
> +		return 0;
> +
>   	return smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_DFCstateControl, state, NULL);
>   }
>   

RE: [PATCH V3 3/3] drm/amd/pm: disable cstate feature for gpu reset scenario

[Quan, Evan]

[AMD Official Use Only - General]



> -----Original Message-----
> From: Lazar, Lijo <Lijo.Lazar@amd.com>
> Sent: Thursday, October 13, 2022 12:14 PM
> To: Quan, Evan <Evan.Quan@amd.com>; amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander <Alexander.Deucher@amd.com>; Zhang, Hawking
> <Hawking.Zhang@amd.com>
> Subject: Re: [PATCH V3 3/3] drm/amd/pm: disable cstate feature for gpu
> reset scenario
> 
> 
> 
> On 10/13/2022 7:01 AM, Evan Quan wrote:
> > Suggested by PMFW team and same as what did for gfxoff feature.
> > This can address some Mode1Reset failures observed on SMU13.0.0.
> >
> > Signed-off-by: Evan Quan <evan.quan@amd.com>
> > Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
> > Change-Id: Ieb4e204c49abd405b1dce559c2ff75bb3887b6f9
> > --
> > v1->v2:
> >    - revise the code comments(Alex)
> >    - limit this to SMU13.0.0 and 13.0.7
> > v2->v3:
> >    - make this happen before display suspending
> 
> A better thing would be do
> > ---
> >   drivers/gpu/drm/amd/amdgpu/amdgpu_device.c         | 8 ++++++++
> >   drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c  | 7 +++++++
> >   drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c | 7 +++++++
> >   3 files changed, 22 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> > b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> > index ab8f970b2849..874bf623f394 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> > @@ -2928,6 +2928,14 @@ static int
> amdgpu_device_ip_suspend_phase1(struct amdgpu_device *adev)
> >   	amdgpu_device_set_pg_state(adev, AMD_PG_STATE_UNGATE);
> >   	amdgpu_device_set_cg_state(adev, AMD_CG_STATE_UNGATE);
> >
> > +	/*
> > +	 * Per PMFW team's suggestion, driver needs to handle gfxoff
> > +	 * and df cstate features disablement for gpu reset(e.g. Mode1Reset)
> > +	 * scenario. Add the missing df cstate disablement here.
> > +	 */
> > +	if (amdgpu_dpm_set_df_cstate(adev, DF_CSTATE_DISALLOW))
> > +		dev_warn(adev->dev, "Failed to disallow df cstate");
> > +
> 
> If it's only related to display, you could move this right after below line so that
> headless systems don't need to take care of this. That will avoid any special
> handling needed for Aldebaran/Arcuturus also.
[Quan, Evan] Not quite sure. I know df cstate affects DAL a lot(MALL related features).
But I'm not sure whether there is other clients/IPs which are affected by df cstate.
I want this(cstate disablement) performed before all 'consumers'.

BR
Evan
> 
>                 if (adev->ip_blocks[i].version->type !=
> AMD_IP_BLOCK_TYPE_DCE)
>                          continue;
> 
> Thanks,
> Lijo
> 
> >   	for (i = adev->num_ip_blocks - 1; i >= 0; i--) {
> >   		if (!adev->ip_blocks[i].status.valid)
> >   			continue;
> > diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
> > b/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
> > index 445005571f76..7d34f40460eb 100644
> > --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
> > +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
> > @@ -2245,6 +2245,13 @@ static int arcturus_set_df_cstate(struct
> smu_context *smu,
> >   	uint32_t smu_version;
> >   	int ret;
> >
> > +	/*
> > +	 * Arcturus does not need the cstate disablement
> > +	 * prerequisite for gpu reset.
> > +	 */
> > +	if (amdgpu_in_reset(adev) || adev->in_suspend)
> > +		return 0;
> > +
> >   	ret = smu_cmn_get_smc_version(smu, NULL, &smu_version);
> >   	if (ret) {
> >   		dev_err(smu->adev->dev, "Failed to get smu version!\n");
> diff
> > --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
> > b/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
> > index 619aee51b123..93a0f7f6a34e 100644
> > --- a/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
> > +++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
> > @@ -1640,6 +1640,13 @@ static bool aldebaran_is_baco_supported(struct
> smu_context *smu)
> >   static int aldebaran_set_df_cstate(struct smu_context *smu,
> >   				   enum pp_df_cstate state)
> >   {
> > +	/*
> > +	 * Aldebaran does not need the cstate disablement
> > +	 * prerequisite for gpu reset.
> > +	 */
> > +	if (amdgpu_in_reset(adev) || adev->in_suspend)
> > +		return 0;
> > +
> >   	return smu_cmn_send_smc_msg_with_param(smu,
> SMU_MSG_DFCstateControl, state, NULL);
> >   }
> >

Re: [PATCH V3 3/3] drm/amd/pm: disable cstate feature for gpu reset scenario

[Lazar, Lijo]

On 10/13/2022 10:56 AM, Quan, Evan wrote:
> [AMD Official Use Only - General]
> 
> 
> 
>> -----Original Message-----
>> From: Lazar, Lijo <Lijo.Lazar@amd.com>
>> Sent: Thursday, October 13, 2022 12:14 PM
>> To: Quan, Evan <Evan.Quan@amd.com>; amd-gfx@lists.freedesktop.org
>> Cc: Deucher, Alexander <Alexander.Deucher@amd.com>; Zhang, Hawking
>> <Hawking.Zhang@amd.com>
>> Subject: Re: [PATCH V3 3/3] drm/amd/pm: disable cstate feature for gpu
>> reset scenario
>>
>>
>>
>> On 10/13/2022 7:01 AM, Evan Quan wrote:
>>> Suggested by PMFW team and same as what did for gfxoff feature.
>>> This can address some Mode1Reset failures observed on SMU13.0.0.
>>>
>>> Signed-off-by: Evan Quan <evan.quan@amd.com>
>>> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
>>> Change-Id: Ieb4e204c49abd405b1dce559c2ff75bb3887b6f9
>>> --
>>> v1->v2:
>>>     - revise the code comments(Alex)
>>>     - limit this to SMU13.0.0 and 13.0.7
>>> v2->v3:
>>>     - make this happen before display suspending
>>
>> A better thing would be do
>>> ---
>>>    drivers/gpu/drm/amd/amdgpu/amdgpu_device.c         | 8 ++++++++
>>>    drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c  | 7 +++++++
>>>    drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c | 7 +++++++
>>>    3 files changed, 22 insertions(+)
>>>
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
>>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
>>> index ab8f970b2849..874bf623f394 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
>>> @@ -2928,6 +2928,14 @@ static int
>> amdgpu_device_ip_suspend_phase1(struct amdgpu_device *adev)
>>>    	amdgpu_device_set_pg_state(adev, AMD_PG_STATE_UNGATE);
>>>    	amdgpu_device_set_cg_state(adev, AMD_CG_STATE_UNGATE);
>>>
>>> +	/*
>>> +	 * Per PMFW team's suggestion, driver needs to handle gfxoff
>>> +	 * and df cstate features disablement for gpu reset(e.g. Mode1Reset)
>>> +	 * scenario. Add the missing df cstate disablement here.
>>> +	 */
>>> +	if (amdgpu_dpm_set_df_cstate(adev, DF_CSTATE_DISALLOW))
>>> +		dev_warn(adev->dev, "Failed to disallow df cstate");
>>> +
>>
>> If it's only related to display, you could move this right after below line so that
>> headless systems don't need to take care of this. That will avoid any special
>> handling needed for Aldebaran/Arcuturus also.
> [Quan, Evan] Not quite sure. I know df cstate affects DAL a lot(MALL related features).
> But I'm not sure whether there is other clients/IPs which are affected by df cstate.
> I want this(cstate disablement) performed before all 'consumers'.
>

Thanks for the clarification.

Series is
	Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>

Thanks,
Lijo

> BR
> Evan
>>
>>                  if (adev->ip_blocks[i].version->type !=
>> AMD_IP_BLOCK_TYPE_DCE)
>>                           continue;
>>
>> Thanks,
>> Lijo
>>
>>>    	for (i = adev->num_ip_blocks - 1; i >= 0; i--) {
>>>    		if (!adev->ip_blocks[i].status.valid)
>>>    			continue;
>>> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
>>> b/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
>>> index 445005571f76..7d34f40460eb 100644
>>> --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
>>> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
>>> @@ -2245,6 +2245,13 @@ static int arcturus_set_df_cstate(struct
>> smu_context *smu,
>>>    	uint32_t smu_version;
>>>    	int ret;
>>>
>>> +	/*
>>> +	 * Arcturus does not need the cstate disablement
>>> +	 * prerequisite for gpu reset.
>>> +	 */
>>> +	if (amdgpu_in_reset(adev) || adev->in_suspend)
>>> +		return 0;
>>> +
>>>    	ret = smu_cmn_get_smc_version(smu, NULL, &smu_version);
>>>    	if (ret) {
>>>    		dev_err(smu->adev->dev, "Failed to get smu version!\n");
>> diff
>>> --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
>>> b/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
>>> index 619aee51b123..93a0f7f6a34e 100644
>>> --- a/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
>>> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
>>> @@ -1640,6 +1640,13 @@ static bool aldebaran_is_baco_supported(struct
>> smu_context *smu)
>>>    static int aldebaran_set_df_cstate(struct smu_context *smu,
>>>    				   enum pp_df_cstate state)
>>>    {
>>> +	/*
>>> +	 * Aldebaran does not need the cstate disablement
>>> +	 * prerequisite for gpu reset.
>>> +	 */
>>> +	if (amdgpu_in_reset(adev) || adev->in_suspend)
>>> +		return 0;
>>> +
>>>    	return smu_cmn_send_smc_msg_with_param(smu,
>> SMU_MSG_DFCstateControl, state, NULL);
>>>    }
>>>